1d99a8ff6SStelian Pop /* 2d99a8ff6SStelian Pop * (C) Copyright 2007-2008 3d99a8ff6SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 4d99a8ff6SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 5d99a8ff6SStelian Pop * 6d99a8ff6SStelian Pop * Configuation settings for the AT91SAM9261EK board. 7d99a8ff6SStelian Pop * 8d99a8ff6SStelian Pop * See file CREDITS for list of people who contributed to this 9d99a8ff6SStelian Pop * project. 10d99a8ff6SStelian Pop * 11d99a8ff6SStelian Pop * This program is free software; you can redistribute it and/or 12d99a8ff6SStelian Pop * modify it under the terms of the GNU General Public License as 13d99a8ff6SStelian Pop * published by the Free Software Foundation; either version 2 of 14d99a8ff6SStelian Pop * the License, or (at your option) any later version. 15d99a8ff6SStelian Pop * 16d99a8ff6SStelian Pop * This program is distributed in the hope that it will be useful, 17d99a8ff6SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 18d99a8ff6SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19d99a8ff6SStelian Pop * GNU General Public License for more details. 20d99a8ff6SStelian Pop * 21d99a8ff6SStelian Pop * You should have received a copy of the GNU General Public License 22d99a8ff6SStelian Pop * along with this program; if not, write to the Free Software 23d99a8ff6SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24d99a8ff6SStelian Pop * MA 02111-1307 USA 25d99a8ff6SStelian Pop */ 26d99a8ff6SStelian Pop 27d99a8ff6SStelian Pop #ifndef __CONFIG_H 28d99a8ff6SStelian Pop #define __CONFIG_H 29d99a8ff6SStelian Pop 30d99a8ff6SStelian Pop /* ARM asynchronous clock */ 31820f2a95SStelian Pop #define AT91_CPU_NAME "AT91SAM9261" 32*ad229a44SStelian Pop #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 33*ad229a44SStelian Pop #define AT91_MASTER_CLOCK 100000000 /* peripheral */ 34*ad229a44SStelian Pop #define AT91_CPU_CLOCK 200000000 /* cpu */ 356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 36d99a8ff6SStelian Pop 37d99a8ff6SStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 38d99a8ff6SStelian Pop 39d99a8ff6SStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 40d99a8ff6SStelian Pop #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ 41d99a8ff6SStelian Pop #define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */ 42d99a8ff6SStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 43d99a8ff6SStelian Pop 44d99a8ff6SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 45d99a8ff6SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 46d99a8ff6SStelian Pop #define CONFIG_INITRD_TAG 1 47d99a8ff6SStelian Pop 48d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 49d99a8ff6SStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 50d99a8ff6SStelian Pop 51d99a8ff6SStelian Pop /* 52d99a8ff6SStelian Pop * Hardware drivers 53d99a8ff6SStelian Pop */ 54d99a8ff6SStelian Pop #define CONFIG_ATMEL_USART 1 55d99a8ff6SStelian Pop #undef CONFIG_USART0 56d99a8ff6SStelian Pop #undef CONFIG_USART1 57d99a8ff6SStelian Pop #undef CONFIG_USART2 58d99a8ff6SStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 59d99a8ff6SStelian Pop 60820f2a95SStelian Pop /* LCD */ 61820f2a95SStelian Pop #define CONFIG_LCD 1 62820f2a95SStelian Pop #define LCD_BPP LCD_COLOR8 63820f2a95SStelian Pop #define CONFIG_LCD_LOGO 1 64820f2a95SStelian Pop #undef LCD_TEST_PATTERN 65820f2a95SStelian Pop #define CONFIG_LCD_INFO 1 66820f2a95SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 68820f2a95SStelian Pop #define CONFIG_ATMEL_LCD 1 69820f2a95SStelian Pop #define CONFIG_ATMEL_LCD_BGR555 1 706d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 71820f2a95SStelian Pop 72d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY 3 73d99a8ff6SStelian Pop 74d99a8ff6SStelian Pop /* 75d99a8ff6SStelian Pop * BOOTP options 76d99a8ff6SStelian Pop */ 77d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 78d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 79d99a8ff6SStelian Pop #define CONFIG_BOOTP_GATEWAY 1 80d99a8ff6SStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 81d99a8ff6SStelian Pop 82d99a8ff6SStelian Pop /* 83d99a8ff6SStelian Pop * Command line configuration. 84d99a8ff6SStelian Pop */ 85d99a8ff6SStelian Pop #include <config_cmd_default.h> 86d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI 87d99a8ff6SStelian Pop #undef CONFIG_CMD_IMI 88d99a8ff6SStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 89d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA 90d99a8ff6SStelian Pop #undef CONFIG_CMD_LOADS 91d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS 92d99a8ff6SStelian Pop 93d99a8ff6SStelian Pop #define CONFIG_CMD_PING 1 94d99a8ff6SStelian Pop #define CONFIG_CMD_DHCP 1 95d99a8ff6SStelian Pop #define CONFIG_CMD_NAND 1 96d99a8ff6SStelian Pop #define CONFIG_CMD_USB 1 97d99a8ff6SStelian Pop 98d99a8ff6SStelian Pop /* SDRAM */ 99d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 100d99a8ff6SStelian Pop #define PHYS_SDRAM 0x20000000 101d99a8ff6SStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 102d99a8ff6SStelian Pop 103d99a8ff6SStelian Pop /* DataFlash */ 104d99a8ff6SStelian Pop #define CONFIG_HAS_DATAFLASH 1 1056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1066d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 1076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ 109d99a8ff6SStelian Pop #define AT91_SPI_CLK 15000000 110d99a8ff6SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 111d99a8ff6SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 112d99a8ff6SStelian Pop 113d99a8ff6SStelian Pop /* NAND flash */ 114d99a8ff6SStelian Pop #define NAND_MAX_CHIPS 1 1156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1166d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1176d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 118d99a8ff6SStelian Pop 119d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */ 1206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 121d99a8ff6SStelian Pop 122d99a8ff6SStelian Pop /* Ethernet */ 123d99a8ff6SStelian Pop #define CONFIG_DRIVER_DM9000 1 124d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE 0x30000000 125d99a8ff6SStelian Pop #define DM9000_IO CONFIG_DM9000_BASE 126d99a8ff6SStelian Pop #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 127d99a8ff6SStelian Pop #define CONFIG_DM9000_USE_16BIT 1 128d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT 20 129d99a8ff6SStelian Pop #define CONFIG_RESET_PHY_R 1 130d99a8ff6SStelian Pop 131d99a8ff6SStelian Pop /* USB */ 132d99a8ff6SStelian Pop #define CONFIG_USB_OHCI_NEW 1 133d99a8ff6SStelian Pop #define LITTLEENDIAN 1 134d99a8ff6SStelian Pop #define CONFIG_DOS_PARTITION 1 1356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 1376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" 1386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 139d99a8ff6SStelian Pop #define CONFIG_USB_STORAGE 1 140d99a8ff6SStelian Pop 1416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 142d99a8ff6SStelian Pop 1436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 145d99a8ff6SStelian Pop 1466d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USE_DATAFLASH_CS0 1 1476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_USE_NANDFLASH 148d99a8ff6SStelian Pop 1496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 150d99a8ff6SStelian Pop 151d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 152057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1540e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1560e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 157d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 158d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 159d99a8ff6SStelian Pop "root=/dev/mtdblock0 " \ 160d99a8ff6SStelian Pop "mtdparts=at91_nand:-(root) " \ 161d99a8ff6SStelian Pop "rw rootfstype=jffs2" 162d99a8ff6SStelian Pop 1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 164d99a8ff6SStelian Pop 165d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 16651bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1670e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1680e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1690e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 170d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 171d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 172d99a8ff6SStelian Pop "root=/dev/mtdblock5 " \ 173d99a8ff6SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro," \ 174d99a8ff6SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 175d99a8ff6SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 176d99a8ff6SStelian Pop "rw rootfstype=jffs2" 177d99a8ff6SStelian Pop 178d99a8ff6SStelian Pop #endif 179d99a8ff6SStelian Pop 180d99a8ff6SStelian Pop #define CONFIG_BAUDRATE 115200 1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 182d99a8ff6SStelian Pop 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 1846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 1856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 1866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1876d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 188d99a8ff6SStelian Pop #define CONFIG_CMDLINE_EDITING 1 189d99a8ff6SStelian Pop 190d99a8ff6SStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 191d99a8ff6SStelian Pop /* 192d99a8ff6SStelian Pop * Size of malloc() pool 193d99a8ff6SStelian Pop */ 1946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 196d99a8ff6SStelian Pop 197d99a8ff6SStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 198d99a8ff6SStelian Pop 199d99a8ff6SStelian Pop #ifdef CONFIG_USE_IRQ 200d99a8ff6SStelian Pop #error CONFIG_USE_IRQ not supported 201d99a8ff6SStelian Pop #endif 202d99a8ff6SStelian Pop 203d99a8ff6SStelian Pop #endif 204