1d99a8ff6SStelian Pop /* 2d99a8ff6SStelian Pop * (C) Copyright 2007-2008 3d99a8ff6SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 4d99a8ff6SStelian Pop * Lead Tech Design <www.leadtechdesign.com> 5d99a8ff6SStelian Pop * 6d99a8ff6SStelian Pop * Configuation settings for the AT91SAM9261EK board. 7d99a8ff6SStelian Pop * 8d99a8ff6SStelian Pop * See file CREDITS for list of people who contributed to this 9d99a8ff6SStelian Pop * project. 10d99a8ff6SStelian Pop * 11d99a8ff6SStelian Pop * This program is free software; you can redistribute it and/or 12d99a8ff6SStelian Pop * modify it under the terms of the GNU General Public License as 13d99a8ff6SStelian Pop * published by the Free Software Foundation; either version 2 of 14d99a8ff6SStelian Pop * the License, or (at your option) any later version. 15d99a8ff6SStelian Pop * 16d99a8ff6SStelian Pop * This program is distributed in the hope that it will be useful, 17d99a8ff6SStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 18d99a8ff6SStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19d99a8ff6SStelian Pop * GNU General Public License for more details. 20d99a8ff6SStelian Pop * 21d99a8ff6SStelian Pop * You should have received a copy of the GNU General Public License 22d99a8ff6SStelian Pop * along with this program; if not, write to the Free Software 23d99a8ff6SStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24d99a8ff6SStelian Pop * MA 02111-1307 USA 25d99a8ff6SStelian Pop */ 26d99a8ff6SStelian Pop 27d99a8ff6SStelian Pop #ifndef __CONFIG_H 28d99a8ff6SStelian Pop #define __CONFIG_H 29d99a8ff6SStelian Pop 30425de62dSJens Scharsig #define CONFIG_AT91_LEGACY 31425de62dSJens Scharsig 32d99a8ff6SStelian Pop /* ARM asynchronous clock */ 33*7c966a8bSAchim Ehrlich #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 346ebff365SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000 35d99a8ff6SStelian Pop 36d99a8ff6SStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 375ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9G10EK 385ccc2d99SSedji Gaouaou #define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ 395ccc2d99SSedji Gaouaou #else 40d99a8ff6SStelian Pop #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ 415ccc2d99SSedji Gaouaou #endif 42dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT 43d99a8ff6SStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 44d99a8ff6SStelian Pop 45d99a8ff6SStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 46d99a8ff6SStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 47d99a8ff6SStelian Pop #define CONFIG_INITRD_TAG 1 48d99a8ff6SStelian Pop 49d99a8ff6SStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 50d99a8ff6SStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 51d99a8ff6SStelian Pop 52d99a8ff6SStelian Pop /* 53d99a8ff6SStelian Pop * Hardware drivers 54d99a8ff6SStelian Pop */ 55ea8fbba7SJens Scharsig #define CONFIG_AT91_GPIO 1 56d99a8ff6SStelian Pop #define CONFIG_ATMEL_USART 1 57d99a8ff6SStelian Pop #undef CONFIG_USART0 58d99a8ff6SStelian Pop #undef CONFIG_USART1 59d99a8ff6SStelian Pop #undef CONFIG_USART2 60d99a8ff6SStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 61d99a8ff6SStelian Pop 62820f2a95SStelian Pop /* LCD */ 63820f2a95SStelian Pop #define CONFIG_LCD 1 64820f2a95SStelian Pop #define LCD_BPP LCD_COLOR8 65820f2a95SStelian Pop #define CONFIG_LCD_LOGO 1 66820f2a95SStelian Pop #undef LCD_TEST_PATTERN 67820f2a95SStelian Pop #define CONFIG_LCD_INFO 1 68820f2a95SStelian Pop #define CONFIG_LCD_INFO_BELOW_LOGO 1 696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_WHITE_ON_BLACK 1 70820f2a95SStelian Pop #define CONFIG_ATMEL_LCD 1 715ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9261EK 72820f2a95SStelian Pop #define CONFIG_ATMEL_LCD_BGR555 1 735ccc2d99SSedji Gaouaou #else 745ccc2d99SSedji Gaouaou #define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */ 755ccc2d99SSedji Gaouaou #endif 766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 77820f2a95SStelian Pop 78a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 79a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 80a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */ 81a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ 82a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ 83a484b00bSJean-Christophe PLAGNIOL-VILLARD 84d99a8ff6SStelian Pop #define CONFIG_BOOTDELAY 3 85d99a8ff6SStelian Pop 86d99a8ff6SStelian Pop /* 87d99a8ff6SStelian Pop * BOOTP options 88d99a8ff6SStelian Pop */ 89d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 90d99a8ff6SStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 91d99a8ff6SStelian Pop #define CONFIG_BOOTP_GATEWAY 1 92d99a8ff6SStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 93d99a8ff6SStelian Pop 94d99a8ff6SStelian Pop /* 95d99a8ff6SStelian Pop * Command line configuration. 96d99a8ff6SStelian Pop */ 97d99a8ff6SStelian Pop #include <config_cmd_default.h> 98d99a8ff6SStelian Pop #undef CONFIG_CMD_BDI 99d99a8ff6SStelian Pop #undef CONFIG_CMD_FPGA 10074de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 101d99a8ff6SStelian Pop #undef CONFIG_CMD_IMLS 10274de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 10374de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 104d99a8ff6SStelian Pop 105d99a8ff6SStelian Pop #define CONFIG_CMD_PING 1 106d99a8ff6SStelian Pop #define CONFIG_CMD_DHCP 1 107d99a8ff6SStelian Pop #define CONFIG_CMD_NAND 1 108d99a8ff6SStelian Pop #define CONFIG_CMD_USB 1 109d99a8ff6SStelian Pop 110d99a8ff6SStelian Pop /* SDRAM */ 111d99a8ff6SStelian Pop #define CONFIG_NR_DRAM_BANKS 1 112d99a8ff6SStelian Pop #define PHYS_SDRAM 0x20000000 113d99a8ff6SStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 114d99a8ff6SStelian Pop 115d99a8ff6SStelian Pop /* DataFlash */ 1164758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 117d99a8ff6SStelian Pop #define CONFIG_HAS_DATAFLASH 1 1186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 1206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ 122d99a8ff6SStelian Pop #define AT91_SPI_CLK 15000000 123d99a8ff6SStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 124d99a8ff6SStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 125d99a8ff6SStelian Pop 126d99a8ff6SStelian Pop /* NAND flash */ 12774c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 12874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 13274c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD22 */ 13374c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) 13474c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD21 */ 13574c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) 13674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 13774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 1382eb99ca8SWolfgang Denk 13974c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 140d99a8ff6SStelian Pop 141d99a8ff6SStelian Pop /* NOR flash - no real flash on this board */ 1426d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 143d99a8ff6SStelian Pop 144d99a8ff6SStelian Pop /* Ethernet */ 14560f61e6dSRemy Bohmer #define CONFIG_NET_MULTI 1 146d99a8ff6SStelian Pop #define CONFIG_DRIVER_DM9000 1 147d99a8ff6SStelian Pop #define CONFIG_DM9000_BASE 0x30000000 148d99a8ff6SStelian Pop #define DM9000_IO CONFIG_DM9000_BASE 149d99a8ff6SStelian Pop #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 150d99a8ff6SStelian Pop #define CONFIG_DM9000_USE_16BIT 1 151e5a3bc24SRemy Bohmer #define CONFIG_DM9000_NO_SROM 1 152d99a8ff6SStelian Pop #define CONFIG_NET_RETRY_COUNT 20 153d99a8ff6SStelian Pop #define CONFIG_RESET_PHY_R 1 154d99a8ff6SStelian Pop 155d99a8ff6SStelian Pop /* USB */ 1562b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL 157d99a8ff6SStelian Pop #define CONFIG_USB_OHCI_NEW 1 158d99a8ff6SStelian Pop #define CONFIG_DOS_PARTITION 1 1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ 1615ccc2d99SSedji Gaouaou #ifdef CONFIG_AT91SAM9G10EK 1625ccc2d99SSedji Gaouaou #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" 1635ccc2d99SSedji Gaouaou #else 1646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" 1655ccc2d99SSedji Gaouaou #endif 1666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 167d99a8ff6SStelian Pop #define CONFIG_USB_STORAGE 1 1683e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 169d99a8ff6SStelian Pop 1706d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 171d99a8ff6SStelian Pop 1726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 174d99a8ff6SStelian Pop 1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 176d99a8ff6SStelian Pop 177d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 178057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1800e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1820e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 183d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 184d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 185d99a8ff6SStelian Pop "root=/dev/mtdblock0 " \ 186918319c7SAlbin Tonnerre "mtdparts=atmel_nand:-(root) " \ 187d99a8ff6SStelian Pop "rw rootfstype=jffs2" 188d99a8ff6SStelian Pop 18989a7a87fSNicolas Ferre #elif CONFIG_SYS_USE_DATAFLASH_CS3 19089a7a87fSNicolas Ferre 19189a7a87fSNicolas Ferre /* bootstrap + u-boot + env + linux in dataflash on CS3 */ 19289a7a87fSNicolas Ferre #define CONFIG_ENV_IS_IN_DATAFLASH 1 19389a7a87fSNicolas Ferre #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) 19489a7a87fSNicolas Ferre #define CONFIG_ENV_OFFSET 0x4200 19589a7a87fSNicolas Ferre #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) 19689a7a87fSNicolas Ferre #define CONFIG_ENV_SIZE 0x4200 19789a7a87fSNicolas Ferre #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" 19889a7a87fSNicolas Ferre #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 19989a7a87fSNicolas Ferre "root=/dev/mtdblock0 " \ 200918319c7SAlbin Tonnerre "mtdparts=atmel_nand:-(root) " \ 20189a7a87fSNicolas Ferre "rw rootfstype=jffs2" 20289a7a87fSNicolas Ferre 2036d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 204d99a8ff6SStelian Pop 205d99a8ff6SStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 20651bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 2070e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 2080e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 2090e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 210d99a8ff6SStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 211d99a8ff6SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 212d99a8ff6SStelian Pop "root=/dev/mtdblock5 " \ 213918319c7SAlbin Tonnerre "mtdparts=atmel_nand:128k(bootstrap)ro," \ 214d99a8ff6SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 215d99a8ff6SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 216d99a8ff6SStelian Pop "rw rootfstype=jffs2" 217d99a8ff6SStelian Pop 218d99a8ff6SStelian Pop #endif 219d99a8ff6SStelian Pop 220d99a8ff6SStelian Pop #define CONFIG_BAUDRATE 115200 2216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 222d99a8ff6SStelian Pop 2236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 2246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 2256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 2276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 228d99a8ff6SStelian Pop #define CONFIG_CMDLINE_EDITING 1 229d99a8ff6SStelian Pop 230d99a8ff6SStelian Pop /* 231d99a8ff6SStelian Pop * Size of malloc() pool 232d99a8ff6SStelian Pop */ 2336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 2346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 235d99a8ff6SStelian Pop 236d99a8ff6SStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 237d99a8ff6SStelian Pop 238d99a8ff6SStelian Pop #ifdef CONFIG_USE_IRQ 239d99a8ff6SStelian Pop #error CONFIG_USE_IRQ not supported 240d99a8ff6SStelian Pop #endif 241d99a8ff6SStelian Pop 242d99a8ff6SStelian Pop #endif 243