10176d43eSStelian Pop /* 20176d43eSStelian Pop * (C) Copyright 2007-2008 3567fb852SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 40176d43eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 50176d43eSStelian Pop * 6*df486b1fSNicolas Ferre * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. 70176d43eSStelian Pop * 80176d43eSStelian Pop * See file CREDITS for list of people who contributed to this 90176d43eSStelian Pop * project. 100176d43eSStelian Pop * 110176d43eSStelian Pop * This program is free software; you can redistribute it and/or 120176d43eSStelian Pop * modify it under the terms of the GNU General Public License as 130176d43eSStelian Pop * published by the Free Software Foundation; either version 2 of 140176d43eSStelian Pop * the License, or (at your option) any later version. 150176d43eSStelian Pop * 160176d43eSStelian Pop * This program is distributed in the hope that it will be useful, 170176d43eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 180176d43eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 190176d43eSStelian Pop * GNU General Public License for more details. 200176d43eSStelian Pop * 210176d43eSStelian Pop * You should have received a copy of the GNU General Public License 220176d43eSStelian Pop * along with this program; if not, write to the Free Software 230176d43eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 240176d43eSStelian Pop * MA 02111-1307 USA 250176d43eSStelian Pop */ 260176d43eSStelian Pop 270176d43eSStelian Pop #ifndef __CONFIG_H 280176d43eSStelian Pop #define __CONFIG_H 290176d43eSStelian Pop 300176d43eSStelian Pop /* ARM asynchronous clock */ 31ad229a44SStelian Pop #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 323aed3aa2SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ 336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 340176d43eSStelian Pop 350176d43eSStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 360176d43eSStelian Pop 370176d43eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 38*df486b1fSNicolas Ferre 39*df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK 40*df486b1fSNicolas Ferre #define AT91_CPU_NAME "AT91SAM9G20" 41*df486b1fSNicolas Ferre #define AT91_MASTER_CLOCK 132000000 /* peripheral */ 42*df486b1fSNicolas Ferre #define AT91_CPU_CLOCK 396000000 /* cpu */ 43*df486b1fSNicolas Ferre #define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ 44*df486b1fSNicolas Ferre #else 45*df486b1fSNicolas Ferre #define AT91_CPU_NAME "AT91SAM9260" 46*df486b1fSNicolas Ferre #define AT91_MASTER_CLOCK 100000000 /* peripheral */ 47*df486b1fSNicolas Ferre #define AT91_CPU_CLOCK 200000000 /* cpu */ 480176d43eSStelian Pop #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ 49*df486b1fSNicolas Ferre #endif 50*df486b1fSNicolas Ferre 510176d43eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 520176d43eSStelian Pop 530176d43eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 540176d43eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 550176d43eSStelian Pop #define CONFIG_INITRD_TAG 1 560176d43eSStelian Pop 570176d43eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 580176d43eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 590176d43eSStelian Pop 600176d43eSStelian Pop /* 610176d43eSStelian Pop * Hardware drivers 620176d43eSStelian Pop */ 630176d43eSStelian Pop #define CONFIG_ATMEL_USART 1 640176d43eSStelian Pop #undef CONFIG_USART0 650176d43eSStelian Pop #undef CONFIG_USART1 660176d43eSStelian Pop #undef CONFIG_USART2 670176d43eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 680176d43eSStelian Pop 69a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 70a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 71a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ 72a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PA6 /* this is the user led */ 73a484b00bSJean-Christophe PLAGNIOL-VILLARD 740176d43eSStelian Pop #define CONFIG_BOOTDELAY 3 750176d43eSStelian Pop 760176d43eSStelian Pop /* 770176d43eSStelian Pop * BOOTP options 780176d43eSStelian Pop */ 790176d43eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 800176d43eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 810176d43eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 820176d43eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 830176d43eSStelian Pop 840176d43eSStelian Pop /* 850176d43eSStelian Pop * Command line configuration. 860176d43eSStelian Pop */ 870176d43eSStelian Pop #include <config_cmd_default.h> 880176d43eSStelian Pop #undef CONFIG_CMD_BDI 890176d43eSStelian Pop #undef CONFIG_CMD_IMI 900176d43eSStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 910176d43eSStelian Pop #undef CONFIG_CMD_FPGA 920176d43eSStelian Pop #undef CONFIG_CMD_LOADS 930176d43eSStelian Pop #undef CONFIG_CMD_IMLS 940176d43eSStelian Pop 950176d43eSStelian Pop #define CONFIG_CMD_PING 1 960176d43eSStelian Pop #define CONFIG_CMD_DHCP 1 970176d43eSStelian Pop #define CONFIG_CMD_NAND 1 980176d43eSStelian Pop #define CONFIG_CMD_USB 1 990176d43eSStelian Pop 1000176d43eSStelian Pop /* SDRAM */ 1010176d43eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 1020176d43eSStelian Pop #define PHYS_SDRAM 0x20000000 1030176d43eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 1040176d43eSStelian Pop 1050176d43eSStelian Pop /* DataFlash */ 1060176d43eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 1076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ 11179f0cb6eSStelian Pop #define AT91_SPI_CLK 15000000 112*df486b1fSNicolas Ferre 113*df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK 114*df486b1fSNicolas Ferre #define DATAFLASH_TCSS (0x22 << 16) 115*df486b1fSNicolas Ferre #else 1160176d43eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 117*df486b1fSNicolas Ferre #endif 1180176d43eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1190176d43eSStelian Pop 1200176d43eSStelian Pop /* NAND flash */ 12174c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 12274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 12674c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 12774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 12874c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 12974c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 13074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 13174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 13274c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1330176d43eSStelian Pop 1340176d43eSStelian Pop /* NOR flash - no real flash on this board */ 1356d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1360176d43eSStelian Pop 1370176d43eSStelian Pop /* Ethernet */ 1380176d43eSStelian Pop #define CONFIG_MACB 1 1390176d43eSStelian Pop #define CONFIG_RMII 1 1400176d43eSStelian Pop #define CONFIG_NET_MULTI 1 1410176d43eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1420176d43eSStelian Pop #define CONFIG_RESET_PHY_R 1 1430176d43eSStelian Pop 1440176d43eSStelian Pop /* USB */ 1450176d43eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1460176d43eSStelian Pop #define CONFIG_DOS_PARTITION 1 1476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ 1496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 1506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1510176d43eSStelian Pop #define CONFIG_USB_STORAGE 1 1523e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 1530176d43eSStelian Pop 1546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1550176d43eSStelian Pop 1566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1576d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1580176d43eSStelian Pop 1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 1600176d43eSStelian Pop 1610176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 162057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1640e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1660e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 16786c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 16896996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 16996996ac2SStelian Pop "root=/dev/mtdblock0 " \ 17096996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 17196996ac2SStelian Pop "rw rootfstype=jffs2" 1720176d43eSStelian Pop 1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #elif CONFIG_SYS_USE_DATAFLASH_CS1 1740176d43eSStelian Pop 1750176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS1 */ 176057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) 1780e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) 1800e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 18186c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" 18296996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 18396996ac2SStelian Pop "root=/dev/mtdblock0 " \ 18496996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 18596996ac2SStelian Pop "rw rootfstype=jffs2" 1860176d43eSStelian Pop 1876d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1880176d43eSStelian Pop 1890176d43eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 19051bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1910e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1920e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1930e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1940176d43eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 19596996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 19696996ac2SStelian Pop "root=/dev/mtdblock5 " \ 19796996ac2SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro," \ 19896996ac2SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 19996996ac2SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 20096996ac2SStelian Pop "rw rootfstype=jffs2" 2010176d43eSStelian Pop 2020176d43eSStelian Pop #endif 2030176d43eSStelian Pop 2040176d43eSStelian Pop #define CONFIG_BAUDRATE 115200 2056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 2060176d43eSStelian Pop 2076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 2086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 2096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 2120176d43eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 2130176d43eSStelian Pop 2140176d43eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 2150176d43eSStelian Pop /* 2160176d43eSStelian Pop * Size of malloc() pool 2170176d43eSStelian Pop */ 2186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 2196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 2200176d43eSStelian Pop 2210176d43eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 2220176d43eSStelian Pop 2230176d43eSStelian Pop #ifdef CONFIG_USE_IRQ 2240176d43eSStelian Pop #error CONFIG_USE_IRQ not supported 2250176d43eSStelian Pop #endif 2260176d43eSStelian Pop 2270176d43eSStelian Pop #endif 228