10176d43eSStelian Pop /* 20176d43eSStelian Pop * (C) Copyright 2007-2008 3567fb852SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 40176d43eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 50176d43eSStelian Pop * 6df486b1fSNicolas Ferre * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. 70176d43eSStelian Pop * 80176d43eSStelian Pop * See file CREDITS for list of people who contributed to this 90176d43eSStelian Pop * project. 100176d43eSStelian Pop * 110176d43eSStelian Pop * This program is free software; you can redistribute it and/or 120176d43eSStelian Pop * modify it under the terms of the GNU General Public License as 130176d43eSStelian Pop * published by the Free Software Foundation; either version 2 of 140176d43eSStelian Pop * the License, or (at your option) any later version. 150176d43eSStelian Pop * 160176d43eSStelian Pop * This program is distributed in the hope that it will be useful, 170176d43eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 180176d43eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 190176d43eSStelian Pop * GNU General Public License for more details. 200176d43eSStelian Pop * 210176d43eSStelian Pop * You should have received a copy of the GNU General Public License 220176d43eSStelian Pop * along with this program; if not, write to the Free Software 230176d43eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 240176d43eSStelian Pop * MA 02111-1307 USA 250176d43eSStelian Pop */ 260176d43eSStelian Pop 270176d43eSStelian Pop #ifndef __CONFIG_H 280176d43eSStelian Pop #define __CONFIG_H 290176d43eSStelian Pop 300176d43eSStelian Pop /* ARM asynchronous clock */ 31ad229a44SStelian Pop #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 330176d43eSStelian Pop 340176d43eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 35df486b1fSNicolas Ferre 36df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK 37df486b1fSNicolas Ferre #define AT91_CPU_NAME "AT91SAM9G20" 38df486b1fSNicolas Ferre #define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ 39df486b1fSNicolas Ferre #else 40df486b1fSNicolas Ferre #define AT91_CPU_NAME "AT91SAM9260" 410176d43eSStelian Pop #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ 42df486b1fSNicolas Ferre #endif 43df486b1fSNicolas Ferre 44*dc39ae95SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ARCH_CPU_INIT 450176d43eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 460176d43eSStelian Pop 470176d43eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 480176d43eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 490176d43eSStelian Pop #define CONFIG_INITRD_TAG 1 500176d43eSStelian Pop 510176d43eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 520176d43eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 530176d43eSStelian Pop 540176d43eSStelian Pop /* 550176d43eSStelian Pop * Hardware drivers 560176d43eSStelian Pop */ 570176d43eSStelian Pop #define CONFIG_ATMEL_USART 1 580176d43eSStelian Pop #undef CONFIG_USART0 590176d43eSStelian Pop #undef CONFIG_USART1 600176d43eSStelian Pop #undef CONFIG_USART2 610176d43eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 620176d43eSStelian Pop 63a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */ 64a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED 65a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ 66a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_GREEN_LED AT91_PIN_PA6 /* this is the user led */ 67a484b00bSJean-Christophe PLAGNIOL-VILLARD 680176d43eSStelian Pop #define CONFIG_BOOTDELAY 3 690176d43eSStelian Pop 700176d43eSStelian Pop /* 710176d43eSStelian Pop * BOOTP options 720176d43eSStelian Pop */ 730176d43eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 740176d43eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 750176d43eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 760176d43eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 770176d43eSStelian Pop 780176d43eSStelian Pop /* 790176d43eSStelian Pop * Command line configuration. 800176d43eSStelian Pop */ 810176d43eSStelian Pop #include <config_cmd_default.h> 820176d43eSStelian Pop #undef CONFIG_CMD_BDI 830176d43eSStelian Pop #undef CONFIG_CMD_FPGA 8474de7aefSWolfgang Denk #undef CONFIG_CMD_IMI 850176d43eSStelian Pop #undef CONFIG_CMD_IMLS 8674de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS 8774de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE 880176d43eSStelian Pop 890176d43eSStelian Pop #define CONFIG_CMD_PING 1 900176d43eSStelian Pop #define CONFIG_CMD_DHCP 1 910176d43eSStelian Pop #define CONFIG_CMD_NAND 1 920176d43eSStelian Pop #define CONFIG_CMD_USB 1 930176d43eSStelian Pop 940176d43eSStelian Pop /* SDRAM */ 950176d43eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 960176d43eSStelian Pop #define PHYS_SDRAM 0x20000000 970176d43eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 980176d43eSStelian Pop 990176d43eSStelian Pop /* DataFlash */ 1004758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI 1010176d43eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 1026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 1036d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 1046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 1056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ 10679f0cb6eSStelian Pop #define AT91_SPI_CLK 15000000 107df486b1fSNicolas Ferre 108df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK 109df486b1fSNicolas Ferre #define DATAFLASH_TCSS (0x22 << 16) 110df486b1fSNicolas Ferre #else 1110176d43eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 112df486b1fSNicolas Ferre #endif 1130176d43eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1140176d43eSStelian Pop 1150176d43eSStelian Pop /* NAND flash */ 11674c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND 11774c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL 1186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 12174c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */ 12274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 12374c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */ 12474c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 12574c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 12674c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 12774c076d6SJean-Christophe PLAGNIOL-VILLARD #endif 1280176d43eSStelian Pop 1290176d43eSStelian Pop /* NOR flash - no real flash on this board */ 1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1310176d43eSStelian Pop 1320176d43eSStelian Pop /* Ethernet */ 1330176d43eSStelian Pop #define CONFIG_MACB 1 1340176d43eSStelian Pop #define CONFIG_RMII 1 1350176d43eSStelian Pop #define CONFIG_NET_MULTI 1 1360176d43eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1370176d43eSStelian Pop #define CONFIG_RESET_PHY_R 1 1380176d43eSStelian Pop 1390176d43eSStelian Pop /* USB */ 1402b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL 1410176d43eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1420176d43eSStelian Pop #define CONFIG_DOS_PARTITION 1 1436d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1446d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ 1456d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 1466d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1470176d43eSStelian Pop #define CONFIG_USB_STORAGE 1 1483e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 1490176d43eSStelian Pop 1506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1510176d43eSStelian Pop 1526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1536d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1540176d43eSStelian Pop 1556d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 1560176d43eSStelian Pop 1570176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 158057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1600e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1620e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 16386c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 16496996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 16596996ac2SStelian Pop "root=/dev/mtdblock0 " \ 16696996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 16796996ac2SStelian Pop "rw rootfstype=jffs2" 1680176d43eSStelian Pop 1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #elif CONFIG_SYS_USE_DATAFLASH_CS1 1700176d43eSStelian Pop 1710176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS1 */ 172057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) 1740e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) 1760e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 17786c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" 17896996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 17996996ac2SStelian Pop "root=/dev/mtdblock0 " \ 18096996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 18196996ac2SStelian Pop "rw rootfstype=jffs2" 1820176d43eSStelian Pop 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1840176d43eSStelian Pop 1850176d43eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 18651bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1870e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1880e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1890e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1900176d43eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 19196996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 19296996ac2SStelian Pop "root=/dev/mtdblock5 " \ 19396996ac2SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro," \ 19496996ac2SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 19596996ac2SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 19696996ac2SStelian Pop "rw rootfstype=jffs2" 1970176d43eSStelian Pop 1980176d43eSStelian Pop #endif 1990176d43eSStelian Pop 2000176d43eSStelian Pop #define CONFIG_BAUDRATE 115200 2016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 2020176d43eSStelian Pop 2036d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 2046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 2056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 2066d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 2076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 2080176d43eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 2090176d43eSStelian Pop 2100176d43eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 2110176d43eSStelian Pop /* 2120176d43eSStelian Pop * Size of malloc() pool 2130176d43eSStelian Pop */ 2146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 2156d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 2160176d43eSStelian Pop 2170176d43eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 2180176d43eSStelian Pop 2190176d43eSStelian Pop #ifdef CONFIG_USE_IRQ 2200176d43eSStelian Pop #error CONFIG_USE_IRQ not supported 2210176d43eSStelian Pop #endif 2220176d43eSStelian Pop 2230176d43eSStelian Pop #endif 224