xref: /rk3399_rockchip-uboot/include/configs/at91sam9260ek.h (revision 86c8c8a414988c50104a3b02c29f50af2be738c0)
10176d43eSStelian Pop /*
20176d43eSStelian Pop  * (C) Copyright 2007-2008
3567fb852SStelian Pop  * Stelian Pop <stelian.pop@leadtechdesign.com>
40176d43eSStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
50176d43eSStelian Pop  *
60176d43eSStelian Pop  * Configuation settings for the AT91SAM9260EK board.
70176d43eSStelian Pop  *
80176d43eSStelian Pop  * See file CREDITS for list of people who contributed to this
90176d43eSStelian Pop  * project.
100176d43eSStelian Pop  *
110176d43eSStelian Pop  * This program is free software; you can redistribute it and/or
120176d43eSStelian Pop  * modify it under the terms of the GNU General Public License as
130176d43eSStelian Pop  * published by the Free Software Foundation; either version 2 of
140176d43eSStelian Pop  * the License, or (at your option) any later version.
150176d43eSStelian Pop  *
160176d43eSStelian Pop  * This program is distributed in the hope that it will be useful,
170176d43eSStelian Pop  * but WITHOUT ANY WARRANTY; without even the implied warranty of
180176d43eSStelian Pop  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
190176d43eSStelian Pop  * GNU General Public License for more details.
200176d43eSStelian Pop  *
210176d43eSStelian Pop  * You should have received a copy of the GNU General Public License
220176d43eSStelian Pop  * along with this program; if not, write to the Free Software
230176d43eSStelian Pop  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
240176d43eSStelian Pop  * MA 02111-1307 USA
250176d43eSStelian Pop  */
260176d43eSStelian Pop 
270176d43eSStelian Pop #ifndef __CONFIG_H
280176d43eSStelian Pop #define __CONFIG_H
290176d43eSStelian Pop 
300176d43eSStelian Pop /* ARM asynchronous clock */
310176d43eSStelian Pop #define AT91_MAIN_CLOCK		198656000	/* from 18.432 MHz crystal */
320176d43eSStelian Pop #define AT91_MASTER_CLOCK	99328000	/* peripheral = main / 2 */
330176d43eSStelian Pop #define CFG_HZ			1000000		/* 1us resolution */
340176d43eSStelian Pop 
350176d43eSStelian Pop #define AT91_SLOW_CLOCK		32768	/* slow clock */
360176d43eSStelian Pop 
370176d43eSStelian Pop #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
380176d43eSStelian Pop #define CONFIG_AT91SAM9260	1	/* It's an Atmel AT91SAM9260 SoC*/
390176d43eSStelian Pop #define CONFIG_AT91SAM9260EK	1	/* on an AT91SAM9260EK Board	*/
400176d43eSStelian Pop #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
410176d43eSStelian Pop 
420176d43eSStelian Pop #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
430176d43eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1
440176d43eSStelian Pop #define CONFIG_INITRD_TAG	1
450176d43eSStelian Pop 
460176d43eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT
470176d43eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT
480176d43eSStelian Pop 
490176d43eSStelian Pop /*
500176d43eSStelian Pop  * Hardware drivers
510176d43eSStelian Pop  */
520176d43eSStelian Pop #define CONFIG_ATMEL_USART	1
530176d43eSStelian Pop #undef CONFIG_USART0
540176d43eSStelian Pop #undef CONFIG_USART1
550176d43eSStelian Pop #undef CONFIG_USART2
560176d43eSStelian Pop #define CONFIG_USART3		1	/* USART 3 is DBGU */
570176d43eSStelian Pop 
580176d43eSStelian Pop #define CONFIG_BOOTDELAY	3
590176d43eSStelian Pop 
600176d43eSStelian Pop /* #define CONFIG_ENV_OVERWRITE	1 */
610176d43eSStelian Pop 
620176d43eSStelian Pop /*
630176d43eSStelian Pop  * BOOTP options
640176d43eSStelian Pop  */
650176d43eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE	1
660176d43eSStelian Pop #define CONFIG_BOOTP_BOOTPATH		1
670176d43eSStelian Pop #define CONFIG_BOOTP_GATEWAY		1
680176d43eSStelian Pop #define CONFIG_BOOTP_HOSTNAME		1
690176d43eSStelian Pop 
700176d43eSStelian Pop /*
710176d43eSStelian Pop  * Command line configuration.
720176d43eSStelian Pop  */
730176d43eSStelian Pop #include <config_cmd_default.h>
740176d43eSStelian Pop #undef CONFIG_CMD_BDI
750176d43eSStelian Pop #undef CONFIG_CMD_IMI
760176d43eSStelian Pop #undef CONFIG_CMD_AUTOSCRIPT
770176d43eSStelian Pop #undef CONFIG_CMD_FPGA
780176d43eSStelian Pop #undef CONFIG_CMD_LOADS
790176d43eSStelian Pop #undef CONFIG_CMD_IMLS
800176d43eSStelian Pop 
810176d43eSStelian Pop #define CONFIG_CMD_PING		1
820176d43eSStelian Pop #define CONFIG_CMD_DHCP		1
830176d43eSStelian Pop #define CONFIG_CMD_NAND		1
840176d43eSStelian Pop #define CONFIG_CMD_USB		1
850176d43eSStelian Pop 
860176d43eSStelian Pop /* SDRAM */
870176d43eSStelian Pop #define CONFIG_NR_DRAM_BANKS		1
880176d43eSStelian Pop #define PHYS_SDRAM			0x20000000
890176d43eSStelian Pop #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
900176d43eSStelian Pop 
910176d43eSStelian Pop /* DataFlash */
920176d43eSStelian Pop #define CONFIG_HAS_DATAFLASH		1
930176d43eSStelian Pop #define CFG_SPI_WRITE_TOUT		(5*CFG_HZ)
940176d43eSStelian Pop #define CFG_MAX_DATAFLASH_BANKS		2
950176d43eSStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
960176d43eSStelian Pop #define CFG_DATAFLASH_LOGIC_ADDR_CS1	0xD0000000	/* CS1 */
9779f0cb6eSStelian Pop #define AT91_SPI_CLK			15000000
980176d43eSStelian Pop #define DATAFLASH_TCSS			(0x1a << 16)
990176d43eSStelian Pop #define DATAFLASH_TCHS			(0x1 << 24)
1000176d43eSStelian Pop 
1010176d43eSStelian Pop /* NAND flash */
1020176d43eSStelian Pop #define NAND_MAX_CHIPS			1
1030176d43eSStelian Pop #define CFG_MAX_NAND_DEVICE		1
1040176d43eSStelian Pop #define CFG_NAND_BASE			0x40000000
105c1212b2fSStelian Pop #define CFG_NAND_DBW_8			1
1060176d43eSStelian Pop 
1070176d43eSStelian Pop /* NOR flash - no real flash on this board */
1080176d43eSStelian Pop #define CFG_NO_FLASH			1
1090176d43eSStelian Pop 
1100176d43eSStelian Pop /* Ethernet */
1110176d43eSStelian Pop #define CONFIG_MACB			1
1120176d43eSStelian Pop #define CONFIG_RMII			1
1130176d43eSStelian Pop #define CONFIG_NET_MULTI		1
1140176d43eSStelian Pop #define CONFIG_NET_RETRY_COUNT		20
1150176d43eSStelian Pop #define CONFIG_RESET_PHY_R		1
1160176d43eSStelian Pop 
1170176d43eSStelian Pop /* USB */
1180176d43eSStelian Pop #define CONFIG_USB_OHCI_NEW		1
1190176d43eSStelian Pop #define LITTLEENDIAN			1
1200176d43eSStelian Pop #define CONFIG_DOS_PARTITION		1
1210176d43eSStelian Pop #define CFG_USB_OHCI_CPU_INIT		1
1220176d43eSStelian Pop #define CFG_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9260_UHP_BASE */
1230176d43eSStelian Pop #define CFG_USB_OHCI_SLOT_NAME		"at91sam9260"
1240176d43eSStelian Pop #define CFG_USB_OHCI_MAX_ROOT_PORTS	2
1250176d43eSStelian Pop #define CONFIG_USB_STORAGE		1
1260176d43eSStelian Pop 
1270176d43eSStelian Pop #define CFG_LOAD_ADDR			0x22000000	/* load address */
1280176d43eSStelian Pop 
1290176d43eSStelian Pop #define CFG_MEMTEST_START		PHYS_SDRAM
1300176d43eSStelian Pop #define CFG_MEMTEST_END			0x23e00000
1310176d43eSStelian Pop 
1320176d43eSStelian Pop #undef CFG_USE_DATAFLASH_CS0
1330176d43eSStelian Pop #define CFG_USE_DATAFLASH_CS1		1
1340176d43eSStelian Pop #undef CFG_USE_NANDFLASH
1350176d43eSStelian Pop 
1360176d43eSStelian Pop #ifdef CFG_USE_DATAFLASH_CS0
1370176d43eSStelian Pop 
1380176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
1390176d43eSStelian Pop #define CFG_ENV_IS_IN_DATAFLASH	1
1400176d43eSStelian Pop #define CFG_MONITOR_BASE	(CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
1410176d43eSStelian Pop #define CFG_ENV_OFFSET		0x4200
1420176d43eSStelian Pop #define CFG_ENV_ADDR		(CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
1430176d43eSStelian Pop #define CFG_ENV_SIZE		0x4200
144*86c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
14596996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
14696996ac2SStelian Pop 				"root=/dev/mtdblock0 "			\
14796996ac2SStelian Pop 				"mtdparts=at91_nand:-(root) "		\
14896996ac2SStelian Pop 				"rw rootfstype=jffs2"
1490176d43eSStelian Pop 
1500176d43eSStelian Pop #elif CFG_USE_DATAFLASH_CS1
1510176d43eSStelian Pop 
1520176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS1 */
1530176d43eSStelian Pop #define CFG_ENV_IS_IN_DATAFLASH	1
1540176d43eSStelian Pop #define CFG_MONITOR_BASE	(CFG_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
1550176d43eSStelian Pop #define CFG_ENV_OFFSET		0x4200
1560176d43eSStelian Pop #define CFG_ENV_ADDR		(CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET)
1570176d43eSStelian Pop #define CFG_ENV_SIZE		0x4200
158*86c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND	"cp.b 0xD0042000 0x22000000 0x210000; bootm"
15996996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
16096996ac2SStelian Pop 				"root=/dev/mtdblock0 "			\
16196996ac2SStelian Pop 				"mtdparts=at91_nand:-(root) "		\
16296996ac2SStelian Pop 				"rw rootfstype=jffs2"
1630176d43eSStelian Pop 
1640176d43eSStelian Pop #else /* CFG_USE_NANDFLASH */
1650176d43eSStelian Pop 
1660176d43eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
1670176d43eSStelian Pop #define CFG_ENV_IS_IN_NAND	1
1680176d43eSStelian Pop #define CFG_ENV_OFFSET		0x60000
1690176d43eSStelian Pop #define CFG_ENV_OFFSET_REDUND	0x80000
1700176d43eSStelian Pop #define CFG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
1710176d43eSStelian Pop #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
17296996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
17396996ac2SStelian Pop 				"root=/dev/mtdblock5 "			\
17496996ac2SStelian Pop 				"mtdparts=at91_nand:128k(bootstrap)ro,"	\
17596996ac2SStelian Pop 				"256k(uboot)ro,128k(env1)ro,"		\
17696996ac2SStelian Pop 				"128k(env2)ro,2M(linux),-(root) "	\
17796996ac2SStelian Pop 				"rw rootfstype=jffs2"
1780176d43eSStelian Pop 
1790176d43eSStelian Pop #endif
1800176d43eSStelian Pop 
1810176d43eSStelian Pop #define CONFIG_BAUDRATE		115200
1820176d43eSStelian Pop #define CFG_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
1830176d43eSStelian Pop 
1840176d43eSStelian Pop #define CFG_PROMPT		"U-Boot> "
1850176d43eSStelian Pop #define CFG_CBSIZE		256
1860176d43eSStelian Pop #define CFG_MAXARGS		16
1870176d43eSStelian Pop #define CFG_PBSIZE		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
1880176d43eSStelian Pop #define CFG_LONGHELP		1
1890176d43eSStelian Pop #define CONFIG_CMDLINE_EDITING	1
1900176d43eSStelian Pop 
1910176d43eSStelian Pop #define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
1920176d43eSStelian Pop /*
1930176d43eSStelian Pop  * Size of malloc() pool
1940176d43eSStelian Pop  */
1950176d43eSStelian Pop #define CFG_MALLOC_LEN		ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
1960176d43eSStelian Pop #define CFG_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
1970176d43eSStelian Pop 
1980176d43eSStelian Pop #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
1990176d43eSStelian Pop 
2000176d43eSStelian Pop #ifdef CONFIG_USE_IRQ
2010176d43eSStelian Pop #error CONFIG_USE_IRQ not supported
2020176d43eSStelian Pop #endif
2030176d43eSStelian Pop 
2040176d43eSStelian Pop #endif
205