xref: /rk3399_rockchip-uboot/include/configs/at91sam9260ek.h (revision 4758ebdd53571d4d183be5c2db8f0ee4ef368915)
10176d43eSStelian Pop /*
20176d43eSStelian Pop  * (C) Copyright 2007-2008
3567fb852SStelian Pop  * Stelian Pop <stelian.pop@leadtechdesign.com>
40176d43eSStelian Pop  * Lead Tech Design <www.leadtechdesign.com>
50176d43eSStelian Pop  *
6df486b1fSNicolas Ferre  * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards.
70176d43eSStelian Pop  *
80176d43eSStelian Pop  * See file CREDITS for list of people who contributed to this
90176d43eSStelian Pop  * project.
100176d43eSStelian Pop  *
110176d43eSStelian Pop  * This program is free software; you can redistribute it and/or
120176d43eSStelian Pop  * modify it under the terms of the GNU General Public License as
130176d43eSStelian Pop  * published by the Free Software Foundation; either version 2 of
140176d43eSStelian Pop  * the License, or (at your option) any later version.
150176d43eSStelian Pop  *
160176d43eSStelian Pop  * This program is distributed in the hope that it will be useful,
170176d43eSStelian Pop  * but WITHOUT ANY WARRANTY; without even the implied warranty of
180176d43eSStelian Pop  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
190176d43eSStelian Pop  * GNU General Public License for more details.
200176d43eSStelian Pop  *
210176d43eSStelian Pop  * You should have received a copy of the GNU General Public License
220176d43eSStelian Pop  * along with this program; if not, write to the Free Software
230176d43eSStelian Pop  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
240176d43eSStelian Pop  * MA 02111-1307 USA
250176d43eSStelian Pop  */
260176d43eSStelian Pop 
270176d43eSStelian Pop #ifndef __CONFIG_H
280176d43eSStelian Pop #define __CONFIG_H
290176d43eSStelian Pop 
300176d43eSStelian Pop /* ARM asynchronous clock */
31ad229a44SStelian Pop #define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
323aed3aa2SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_AT91_PLLB	0x107c3e18	/* PLLB settings for USB */
336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ		1000000		/* 1us resolution */
340176d43eSStelian Pop 
350176d43eSStelian Pop #define AT91_SLOW_CLOCK		32768	/* slow clock */
360176d43eSStelian Pop 
370176d43eSStelian Pop #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
38df486b1fSNicolas Ferre 
39df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK
40df486b1fSNicolas Ferre #define AT91_CPU_NAME		"AT91SAM9G20"
41df486b1fSNicolas Ferre #define AT91_MASTER_CLOCK	132000000	/* peripheral */
42df486b1fSNicolas Ferre #define AT91_CPU_CLOCK		396000000	/* cpu */
43df486b1fSNicolas Ferre #define CONFIG_AT91SAM9G20	1	/* It's an Atmel AT91SAM9G20 SoC*/
44df486b1fSNicolas Ferre #else
45df486b1fSNicolas Ferre #define AT91_CPU_NAME		"AT91SAM9260"
46df486b1fSNicolas Ferre #define AT91_MASTER_CLOCK	100000000	/* peripheral */
47df486b1fSNicolas Ferre #define AT91_CPU_CLOCK		200000000	/* cpu */
480176d43eSStelian Pop #define CONFIG_AT91SAM9260	1	/* It's an Atmel AT91SAM9260 SoC*/
49df486b1fSNicolas Ferre #endif
50df486b1fSNicolas Ferre 
510176d43eSStelian Pop #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
520176d43eSStelian Pop 
530176d43eSStelian Pop #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
540176d43eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1
550176d43eSStelian Pop #define CONFIG_INITRD_TAG	1
560176d43eSStelian Pop 
570176d43eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT
580176d43eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT
590176d43eSStelian Pop 
600176d43eSStelian Pop /*
610176d43eSStelian Pop  * Hardware drivers
620176d43eSStelian Pop  */
630176d43eSStelian Pop #define CONFIG_ATMEL_USART	1
640176d43eSStelian Pop #undef CONFIG_USART0
650176d43eSStelian Pop #undef CONFIG_USART1
660176d43eSStelian Pop #undef CONFIG_USART2
670176d43eSStelian Pop #define CONFIG_USART3		1	/* USART 3 is DBGU */
680176d43eSStelian Pop 
69a484b00bSJean-Christophe PLAGNIOL-VILLARD /* LED */
70a484b00bSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_AT91_LED
71a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_RED_LED		AT91_PIN_PA9	/* this is the power led */
72a484b00bSJean-Christophe PLAGNIOL-VILLARD #define	CONFIG_GREEN_LED	AT91_PIN_PA6	/* this is the user led */
73a484b00bSJean-Christophe PLAGNIOL-VILLARD 
740176d43eSStelian Pop #define CONFIG_BOOTDELAY	3
750176d43eSStelian Pop 
760176d43eSStelian Pop /*
770176d43eSStelian Pop  * BOOTP options
780176d43eSStelian Pop  */
790176d43eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE	1
800176d43eSStelian Pop #define CONFIG_BOOTP_BOOTPATH		1
810176d43eSStelian Pop #define CONFIG_BOOTP_GATEWAY		1
820176d43eSStelian Pop #define CONFIG_BOOTP_HOSTNAME		1
830176d43eSStelian Pop 
840176d43eSStelian Pop /*
850176d43eSStelian Pop  * Command line configuration.
860176d43eSStelian Pop  */
870176d43eSStelian Pop #include <config_cmd_default.h>
880176d43eSStelian Pop #undef CONFIG_CMD_BDI
890176d43eSStelian Pop #undef CONFIG_CMD_FPGA
9074de7aefSWolfgang Denk #undef CONFIG_CMD_IMI
910176d43eSStelian Pop #undef CONFIG_CMD_IMLS
9274de7aefSWolfgang Denk #undef CONFIG_CMD_LOADS
9374de7aefSWolfgang Denk #undef CONFIG_CMD_SOURCE
940176d43eSStelian Pop 
950176d43eSStelian Pop #define CONFIG_CMD_PING		1
960176d43eSStelian Pop #define CONFIG_CMD_DHCP		1
970176d43eSStelian Pop #define CONFIG_CMD_NAND		1
980176d43eSStelian Pop #define CONFIG_CMD_USB		1
990176d43eSStelian Pop 
1000176d43eSStelian Pop /* SDRAM */
1010176d43eSStelian Pop #define CONFIG_NR_DRAM_BANKS		1
1020176d43eSStelian Pop #define PHYS_SDRAM			0x20000000
1030176d43eSStelian Pop #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
1040176d43eSStelian Pop 
1050176d43eSStelian Pop /* DataFlash */
106*4758ebddSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ATMEL_DATAFLASH_SPI
1070176d43eSStelian Pop #define CONFIG_HAS_DATAFLASH		1
1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1	0xD0000000	/* CS1 */
11279f0cb6eSStelian Pop #define AT91_SPI_CLK			15000000
113df486b1fSNicolas Ferre 
114df486b1fSNicolas Ferre #ifdef CONFIG_AT91SAM9G20EK
115df486b1fSNicolas Ferre #define DATAFLASH_TCSS			(0x22 << 16)
116df486b1fSNicolas Ferre #else
1170176d43eSStelian Pop #define DATAFLASH_TCSS			(0x1a << 16)
118df486b1fSNicolas Ferre #endif
1190176d43eSStelian Pop #define DATAFLASH_TCHS			(0x1 << 24)
1200176d43eSStelian Pop 
1210176d43eSStelian Pop /* NAND flash */
12274c076d6SJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_CMD_NAND
12374c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_NAND_ATMEL
1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE		1
1256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE			0x40000000
1266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8			1
12774c076d6SJean-Christophe PLAGNIOL-VILLARD /* our ALE is AD21 */
12874c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
12974c076d6SJean-Christophe PLAGNIOL-VILLARD /* our CLE is AD22 */
13074c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
13174c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
13274c076d6SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
13374c076d6SJean-Christophe PLAGNIOL-VILLARD #endif
1340176d43eSStelian Pop 
1350176d43eSStelian Pop /* NOR flash - no real flash on this board */
1366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH			1
1370176d43eSStelian Pop 
1380176d43eSStelian Pop /* Ethernet */
1390176d43eSStelian Pop #define CONFIG_MACB			1
1400176d43eSStelian Pop #define CONFIG_RMII			1
1410176d43eSStelian Pop #define CONFIG_NET_MULTI		1
1420176d43eSStelian Pop #define CONFIG_NET_RETRY_COUNT		20
1430176d43eSStelian Pop #define CONFIG_RESET_PHY_R		1
1440176d43eSStelian Pop 
1450176d43eSStelian Pop /* USB */
1462b7178afSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_USB_ATMEL
1470176d43eSStelian Pop #define CONFIG_USB_OHCI_NEW		1
1480176d43eSStelian Pop #define CONFIG_DOS_PARTITION		1
1496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
1506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9260_UHP_BASE */
1516d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
1526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
1530176d43eSStelian Pop #define CONFIG_USB_STORAGE		1
1543e0cda07SStelian Pop #define CONFIG_CMD_FAT			1
1550176d43eSStelian Pop 
1566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
1570176d43eSStelian Pop 
1586d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
1596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END			0x23e00000
1600176d43eSStelian Pop 
1616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
1620176d43eSStelian Pop 
1630176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */
164057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH	1
1656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
1660e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4200
1676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
1680e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
16986c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
17096996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
17196996ac2SStelian Pop 				"root=/dev/mtdblock0 "			\
17296996ac2SStelian Pop 				"mtdparts=at91_nand:-(root) "		\
17396996ac2SStelian Pop 				"rw rootfstype=jffs2"
1740176d43eSStelian Pop 
1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #elif CONFIG_SYS_USE_DATAFLASH_CS1
1760176d43eSStelian Pop 
1770176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS1 */
178057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH	1
1796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
1800e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4200
1816d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
1820e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x4200
18386c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND	"cp.b 0xD0042000 0x22000000 0x210000; bootm"
18496996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
18596996ac2SStelian Pop 				"root=/dev/mtdblock0 "			\
18696996ac2SStelian Pop 				"mtdparts=at91_nand:-(root) "		\
18796996ac2SStelian Pop 				"rw rootfstype=jffs2"
1880176d43eSStelian Pop 
1896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */
1900176d43eSStelian Pop 
1910176d43eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */
19251bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND	1
1930e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x60000
1940e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND	0x80000
1950e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
1960176d43eSStelian Pop #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
19796996ac2SStelian Pop #define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
19896996ac2SStelian Pop 				"root=/dev/mtdblock5 "			\
19996996ac2SStelian Pop 				"mtdparts=at91_nand:128k(bootstrap)ro,"	\
20096996ac2SStelian Pop 				"256k(uboot)ro,128k(env1)ro,"		\
20196996ac2SStelian Pop 				"128k(env2)ro,2M(linux),-(root) "	\
20296996ac2SStelian Pop 				"rw rootfstype=jffs2"
2030176d43eSStelian Pop 
2040176d43eSStelian Pop #endif
2050176d43eSStelian Pop 
2060176d43eSStelian Pop #define CONFIG_BAUDRATE		115200
2076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
2080176d43eSStelian Pop 
2096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"U-Boot> "
2106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE		256
2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16
2126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
2136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP		1
2140176d43eSStelian Pop #define CONFIG_CMDLINE_EDITING	1
2150176d43eSStelian Pop 
2160176d43eSStelian Pop #define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
2170176d43eSStelian Pop /*
2180176d43eSStelian Pop  * Size of malloc() pool
2190176d43eSStelian Pop  */
2206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
2216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
2220176d43eSStelian Pop 
2230176d43eSStelian Pop #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
2240176d43eSStelian Pop 
2250176d43eSStelian Pop #ifdef CONFIG_USE_IRQ
2260176d43eSStelian Pop #error CONFIG_USE_IRQ not supported
2270176d43eSStelian Pop #endif
2280176d43eSStelian Pop 
2290176d43eSStelian Pop #endif
230