10176d43eSStelian Pop /* 20176d43eSStelian Pop * (C) Copyright 2007-2008 3567fb852SStelian Pop * Stelian Pop <stelian.pop@leadtechdesign.com> 40176d43eSStelian Pop * Lead Tech Design <www.leadtechdesign.com> 50176d43eSStelian Pop * 60176d43eSStelian Pop * Configuation settings for the AT91SAM9260EK board. 70176d43eSStelian Pop * 80176d43eSStelian Pop * See file CREDITS for list of people who contributed to this 90176d43eSStelian Pop * project. 100176d43eSStelian Pop * 110176d43eSStelian Pop * This program is free software; you can redistribute it and/or 120176d43eSStelian Pop * modify it under the terms of the GNU General Public License as 130176d43eSStelian Pop * published by the Free Software Foundation; either version 2 of 140176d43eSStelian Pop * the License, or (at your option) any later version. 150176d43eSStelian Pop * 160176d43eSStelian Pop * This program is distributed in the hope that it will be useful, 170176d43eSStelian Pop * but WITHOUT ANY WARRANTY; without even the implied warranty of 180176d43eSStelian Pop * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 190176d43eSStelian Pop * GNU General Public License for more details. 200176d43eSStelian Pop * 210176d43eSStelian Pop * You should have received a copy of the GNU General Public License 220176d43eSStelian Pop * along with this program; if not, write to the Free Software 230176d43eSStelian Pop * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 240176d43eSStelian Pop * MA 02111-1307 USA 250176d43eSStelian Pop */ 260176d43eSStelian Pop 270176d43eSStelian Pop #ifndef __CONFIG_H 280176d43eSStelian Pop #define __CONFIG_H 290176d43eSStelian Pop 300176d43eSStelian Pop /* ARM asynchronous clock */ 31ad229a44SStelian Pop #define AT91_CPU_NAME "AT91SAM9260" 32ad229a44SStelian Pop #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ 33ad229a44SStelian Pop #define AT91_MASTER_CLOCK 100000000 /* peripheral */ 34ad229a44SStelian Pop #define AT91_CPU_CLOCK 200000000 /* cpu */ 35*3aed3aa2SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ 366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ 370176d43eSStelian Pop 380176d43eSStelian Pop #define AT91_SLOW_CLOCK 32768 /* slow clock */ 390176d43eSStelian Pop 400176d43eSStelian Pop #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 410176d43eSStelian Pop #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ 420176d43eSStelian Pop #define CONFIG_AT91SAM9260EK 1 /* on an AT91SAM9260EK Board */ 430176d43eSStelian Pop #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 440176d43eSStelian Pop 450176d43eSStelian Pop #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 460176d43eSStelian Pop #define CONFIG_SETUP_MEMORY_TAGS 1 470176d43eSStelian Pop #define CONFIG_INITRD_TAG 1 480176d43eSStelian Pop 490176d43eSStelian Pop #define CONFIG_SKIP_LOWLEVEL_INIT 500176d43eSStelian Pop #define CONFIG_SKIP_RELOCATE_UBOOT 510176d43eSStelian Pop 520176d43eSStelian Pop /* 530176d43eSStelian Pop * Hardware drivers 540176d43eSStelian Pop */ 550176d43eSStelian Pop #define CONFIG_ATMEL_USART 1 560176d43eSStelian Pop #undef CONFIG_USART0 570176d43eSStelian Pop #undef CONFIG_USART1 580176d43eSStelian Pop #undef CONFIG_USART2 590176d43eSStelian Pop #define CONFIG_USART3 1 /* USART 3 is DBGU */ 600176d43eSStelian Pop 610176d43eSStelian Pop #define CONFIG_BOOTDELAY 3 620176d43eSStelian Pop 630176d43eSStelian Pop /* 640176d43eSStelian Pop * BOOTP options 650176d43eSStelian Pop */ 660176d43eSStelian Pop #define CONFIG_BOOTP_BOOTFILESIZE 1 670176d43eSStelian Pop #define CONFIG_BOOTP_BOOTPATH 1 680176d43eSStelian Pop #define CONFIG_BOOTP_GATEWAY 1 690176d43eSStelian Pop #define CONFIG_BOOTP_HOSTNAME 1 700176d43eSStelian Pop 710176d43eSStelian Pop /* 720176d43eSStelian Pop * Command line configuration. 730176d43eSStelian Pop */ 740176d43eSStelian Pop #include <config_cmd_default.h> 750176d43eSStelian Pop #undef CONFIG_CMD_BDI 760176d43eSStelian Pop #undef CONFIG_CMD_IMI 770176d43eSStelian Pop #undef CONFIG_CMD_AUTOSCRIPT 780176d43eSStelian Pop #undef CONFIG_CMD_FPGA 790176d43eSStelian Pop #undef CONFIG_CMD_LOADS 800176d43eSStelian Pop #undef CONFIG_CMD_IMLS 810176d43eSStelian Pop 820176d43eSStelian Pop #define CONFIG_CMD_PING 1 830176d43eSStelian Pop #define CONFIG_CMD_DHCP 1 840176d43eSStelian Pop #define CONFIG_CMD_NAND 1 850176d43eSStelian Pop #define CONFIG_CMD_USB 1 860176d43eSStelian Pop 870176d43eSStelian Pop /* SDRAM */ 880176d43eSStelian Pop #define CONFIG_NR_DRAM_BANKS 1 890176d43eSStelian Pop #define PHYS_SDRAM 0x20000000 900176d43eSStelian Pop #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ 910176d43eSStelian Pop 920176d43eSStelian Pop /* DataFlash */ 930176d43eSStelian Pop #define CONFIG_HAS_DATAFLASH 1 946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) 956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ 9879f0cb6eSStelian Pop #define AT91_SPI_CLK 15000000 990176d43eSStelian Pop #define DATAFLASH_TCSS (0x1a << 16) 1000176d43eSStelian Pop #define DATAFLASH_TCHS (0x1 << 24) 1010176d43eSStelian Pop 1020176d43eSStelian Pop /* NAND flash */ 1030176d43eSStelian Pop #define NAND_MAX_CHIPS 1 1046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_NAND_DEVICE 1 1056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_BASE 0x40000000 1066d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NAND_DBW_8 1 1070176d43eSStelian Pop 1080176d43eSStelian Pop /* NOR flash - no real flash on this board */ 1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_NO_FLASH 1 1100176d43eSStelian Pop 1110176d43eSStelian Pop /* Ethernet */ 1120176d43eSStelian Pop #define CONFIG_MACB 1 1130176d43eSStelian Pop #define CONFIG_RMII 1 1140176d43eSStelian Pop #define CONFIG_NET_MULTI 1 1150176d43eSStelian Pop #define CONFIG_NET_RETRY_COUNT 20 1160176d43eSStelian Pop #define CONFIG_RESET_PHY_R 1 1170176d43eSStelian Pop 1180176d43eSStelian Pop /* USB */ 1190176d43eSStelian Pop #define CONFIG_USB_OHCI_NEW 1 1200176d43eSStelian Pop #define LITTLEENDIAN 1 1210176d43eSStelian Pop #define CONFIG_DOS_PARTITION 1 1226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 1236d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ 1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 1256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1260176d43eSStelian Pop #define CONFIG_USB_STORAGE 1 1273e0cda07SStelian Pop #define CONFIG_CMD_FAT 1 1280176d43eSStelian Pop 1296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 1300176d43eSStelian Pop 1316d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END 0x23e00000 1330176d43eSStelian Pop 1346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 1350176d43eSStelian Pop 1360176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 137057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1386d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) 1390e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) 1410e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 14286c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" 14396996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 14496996ac2SStelian Pop "root=/dev/mtdblock0 " \ 14596996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 14696996ac2SStelian Pop "rw rootfstype=jffs2" 1470176d43eSStelian Pop 1486d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #elif CONFIG_SYS_USE_DATAFLASH_CS1 1490176d43eSStelian Pop 1500176d43eSStelian Pop /* bootstrap + u-boot + env + linux in dataflash on CS1 */ 151057c849cSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_DATAFLASH 1 1526d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) 1530e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x4200 1546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) 1550e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x4200 15686c8c8a4SStelian Pop #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" 15796996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 15896996ac2SStelian Pop "root=/dev/mtdblock0 " \ 15996996ac2SStelian Pop "mtdparts=at91_nand:-(root) " \ 16096996ac2SStelian Pop "rw rootfstype=jffs2" 1610176d43eSStelian Pop 1626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #else /* CONFIG_SYS_USE_NANDFLASH */ 1630176d43eSStelian Pop 1640176d43eSStelian Pop /* bootstrap + u-boot + env + linux in nandflash */ 16551bfee19SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_NAND 1 1660e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET 0x60000 1670e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET_REDUND 0x80000 1680e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1690176d43eSStelian Pop #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" 17096996ac2SStelian Pop #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 17196996ac2SStelian Pop "root=/dev/mtdblock5 " \ 17296996ac2SStelian Pop "mtdparts=at91_nand:128k(bootstrap)ro," \ 17396996ac2SStelian Pop "256k(uboot)ro,128k(env1)ro," \ 17496996ac2SStelian Pop "128k(env2)ro,2M(linux),-(root) " \ 17596996ac2SStelian Pop "rw rootfstype=jffs2" 1760176d43eSStelian Pop 1770176d43eSStelian Pop #endif 1780176d43eSStelian Pop 1790176d43eSStelian Pop #define CONFIG_BAUDRATE 115200 1806d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 1810176d43eSStelian Pop 1826d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "U-Boot> " 1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 1846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 1856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP 1 1870176d43eSStelian Pop #define CONFIG_CMDLINE_EDITING 1 1880176d43eSStelian Pop 1890176d43eSStelian Pop #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) 1900176d43eSStelian Pop /* 1910176d43eSStelian Pop * Size of malloc() pool 1920176d43eSStelian Pop */ 1936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 1950176d43eSStelian Pop 1960176d43eSStelian Pop #define CONFIG_STACKSIZE (32*1024) /* regular stack */ 1970176d43eSStelian Pop 1980176d43eSStelian Pop #ifdef CONFIG_USE_IRQ 1990176d43eSStelian Pop #error CONFIG_USE_IRQ not supported 2000176d43eSStelian Pop #endif 2010176d43eSStelian Pop 2020176d43eSStelian Pop #endif 203