1a2ac68fbSChander Kashyap /* 2a2ac68fbSChander Kashyap * Copyright (C) 2013 Samsung Electronics 3a2ac68fbSChander Kashyap * 4a2ac68fbSChander Kashyap * SPDX-License-Identifier: GPL-2.0+ 5a2ac68fbSChander Kashyap * 6a2ac68fbSChander Kashyap * Configuration settings for the SAMSUNG Arndale board. 7a2ac68fbSChander Kashyap */ 8a2ac68fbSChander Kashyap 9a2ac68fbSChander Kashyap #ifndef __CONFIG_ARNDALE_H 10a2ac68fbSChander Kashyap #define __CONFIG_ARNDALE_H 11a2ac68fbSChander Kashyap 12e6825e03SIan Campbell #define EXYNOS_FDTFILE_SETTING \ 13e6825e03SIan Campbell "fdtfile=exynos5250-arndale.dtb\0" 14e6825e03SIan Campbell 15f94de733SSimon Glass #include "exynos5250-common.h" 16a2ac68fbSChander Kashyap 17a2ac68fbSChander Kashyap /* SD/MMC configuration */ 18a2ac68fbSChander Kashyap #define CONFIG_SUPPORT_EMMC_BOOT 19a2ac68fbSChander Kashyap 20a2ac68fbSChander Kashyap /* allow to overwrite serial and ethaddr */ 21a2ac68fbSChander Kashyap #define CONFIG_ENV_OVERWRITE 22a2ac68fbSChander Kashyap 23a2ac68fbSChander Kashyap /* USB */ 24a2ac68fbSChander Kashyap #define CONFIG_USB_EHCI 25a2ac68fbSChander Kashyap #define CONFIG_USB_EHCI_EXYNOS 26a2ac68fbSChander Kashyap 277da76512SInderpal Singh #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 287da76512SInderpal Singh #define CONFIG_USB_HOST_ETHER 297da76512SInderpal Singh #define CONFIG_USB_ETHER_ASIX 30edd88905SRene Griessl #define CONFIG_USB_ETHER_ASIX88179 317da76512SInderpal Singh 32a2ac68fbSChander Kashyap /* MMC SPL */ 33e106bd9bSRajeshwari Birje #define CONFIG_EXYNOS_SPL 34a2ac68fbSChander Kashyap 35a2ac68fbSChander Kashyap /* Miscellaneous configurable options */ 36a2ac68fbSChander Kashyap #define CONFIG_SYS_PROMPT "ARNDALE # " 37a2ac68fbSChander Kashyap #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 38a2ac68fbSChander Kashyap 39a2ac68fbSChander Kashyap #define CONFIG_NR_DRAM_BANKS 8 40a2ac68fbSChander Kashyap #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ 41a2ac68fbSChander Kashyap 42a2ac68fbSChander Kashyap #define CONFIG_IDENT_STRING " for ARNDALE" 43a2ac68fbSChander Kashyap 44a2ac68fbSChander Kashyap #define CONFIG_ENV_IS_IN_MMC 45a2ac68fbSChander Kashyap #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) 46a2ac68fbSChander Kashyap 47a2ac68fbSChander Kashyap #define CONFIG_IRAM_STACK 0x02050000 48a2ac68fbSChander Kashyap 49a2ac68fbSChander Kashyap #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK 50a2ac68fbSChander Kashyap 51a2ac68fbSChander Kashyap /* PMIC */ 52a2ac68fbSChander Kashyap #define CONFIG_PMIC 53913702caSSimon Glass #define CONFIG_POWER_I2C 54a2ac68fbSChander Kashyap 55f8caed31STushar Behera #define CONFIG_PREBOOT 56f8caed31STushar Behera 57fafbc6c0SAndre Przywara #define CONFIG_S5P_PA_SYSRAM 0x02020000 58fafbc6c0SAndre Przywara #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM 59fafbc6c0SAndre Przywara 60fafbc6c0SAndre Przywara /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ 61fafbc6c0SAndre Przywara #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 62fafbc6c0SAndre Przywara 63*d4061aa0SSimon Glass /* Power */ 64*d4061aa0SSimon Glass #define CONFIG_POWER 65*d4061aa0SSimon Glass #define CONFIG_POWER_I2C 66*d4061aa0SSimon Glass 67a2ac68fbSChander Kashyap #endif /* __CONFIG_H */ 68