xref: /rk3399_rockchip-uboot/include/configs/armadillo-800eva.h (revision 8a7507a8a394f4fccbd7eb730910cf62de6f8d32)
11a31ca4aSHideyuki Sano /*
21a31ca4aSHideyuki Sano  * Configuation settings for the bonito board
31a31ca4aSHideyuki Sano  *
41a31ca4aSHideyuki Sano  * Copyright (C) 2012 Renesas Solutions Corp.
51a31ca4aSHideyuki Sano  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
71a31ca4aSHideyuki Sano  */
81a31ca4aSHideyuki Sano 
91a31ca4aSHideyuki Sano #ifndef __ARMADILLO_800EVA_H
101a31ca4aSHideyuki Sano #define __ARMADILLO_800EVA_H
111a31ca4aSHideyuki Sano 
121a31ca4aSHideyuki Sano #undef DEBUG
131a31ca4aSHideyuki Sano #define CONFIG_R8A7740
14*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
151a31ca4aSHideyuki Sano #define CONFIG_SH_GPIO_PFC
161a31ca4aSHideyuki Sano 
171a31ca4aSHideyuki Sano #include <asm/arch/rmobile.h>
181a31ca4aSHideyuki Sano 
191a31ca4aSHideyuki Sano #define BOARD_LATE_INIT
201a31ca4aSHideyuki Sano 
211a31ca4aSHideyuki Sano #undef	CONFIG_SHOW_BOOT_PROGRESS
221a31ca4aSHideyuki Sano 
231a31ca4aSHideyuki Sano #define CONFIG_ARCH_CPU_INIT
241a31ca4aSHideyuki Sano #define CONFIG_TMU_TIMER
251a31ca4aSHideyuki Sano #define CONFIG_SYS_DCACHE_OFF
261a31ca4aSHideyuki Sano 
271a31ca4aSHideyuki Sano /* STACK */
281a31ca4aSHideyuki Sano #define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
291a31ca4aSHideyuki Sano #define STACK_AREA_SIZE				0xC000
301a31ca4aSHideyuki Sano #define LOW_LEVEL_MERAM_STACK	\
311a31ca4aSHideyuki Sano 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
321a31ca4aSHideyuki Sano 
331a31ca4aSHideyuki Sano /* MEMORY */
341a31ca4aSHideyuki Sano #define ARMADILLO_800EVA_SDRAM_BASE	0x40000000
351a31ca4aSHideyuki Sano #define ARMADILLO_800EVA_SDRAM_SIZE	(512 * 1024 * 1024)
361a31ca4aSHideyuki Sano 
371a31ca4aSHideyuki Sano #define CONFIG_SYS_LONGHELP
381a31ca4aSHideyuki Sano #define CONFIG_SYS_PBSIZE		256
391a31ca4aSHideyuki Sano #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
401a31ca4aSHideyuki Sano 
411a31ca4aSHideyuki Sano /* SCIF */
421a31ca4aSHideyuki Sano #define CONFIG_CONS_SCIF1
431a31ca4aSHideyuki Sano #define SCIF0_BASE		0xe6c40000
441a31ca4aSHideyuki Sano #define SCIF1_BASE		0xe6c50000
451a31ca4aSHideyuki Sano #define SCIF2_BASE		0xe6c60000
461a31ca4aSHideyuki Sano #define SCIF4_BASE		0xe6c80000
471a31ca4aSHideyuki Sano #define	CONFIG_SCIF_A
481a31ca4aSHideyuki Sano 
491a31ca4aSHideyuki Sano #define CONFIG_SYS_MEMTEST_START	(ARMADILLO_800EVA_SDRAM_BASE)
501a31ca4aSHideyuki Sano #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
511a31ca4aSHideyuki Sano 					 504 * 1024 * 1024)
521a31ca4aSHideyuki Sano #undef	CONFIG_SYS_ALT_MEMTEST
531a31ca4aSHideyuki Sano #undef	CONFIG_SYS_MEMTEST_SCRATCH
541a31ca4aSHideyuki Sano #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
551a31ca4aSHideyuki Sano 
561a31ca4aSHideyuki Sano #define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
571a31ca4aSHideyuki Sano #define CONFIG_SYS_SDRAM_SIZE		(ARMADILLO_800EVA_SDRAM_SIZE)
581a31ca4aSHideyuki Sano #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
591a31ca4aSHideyuki Sano 					 64 * 1024 * 1024)
601a31ca4aSHideyuki Sano #define CONFIG_NR_DRAM_BANKS		1
611a31ca4aSHideyuki Sano 
621a31ca4aSHideyuki Sano #define CONFIG_SYS_MONITOR_BASE		0x00000000
631a31ca4aSHideyuki Sano #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
641a31ca4aSHideyuki Sano #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
651a31ca4aSHideyuki Sano #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
661a31ca4aSHideyuki Sano #define CONFIG_SYS_TEXT_BASE	0xE80C0000
671a31ca4aSHideyuki Sano 
681a31ca4aSHideyuki Sano /* FLASH */
691a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_CFI
701a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
711a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_BASE		0x00000000
721a31ca4aSHideyuki Sano #define CONFIG_SYS_MAX_FLASH_SECT	512
731a31ca4aSHideyuki Sano #define CONFIG_SYS_MAX_FLASH_BANKS	1
741a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
751a31ca4aSHideyuki Sano 
761a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_ERASE_TOUT	3000
771a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_WRITE_TOUT	3000
781a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_LOCK_TOUT	3000
791a31ca4aSHideyuki Sano #define CONFIG_SYS_FLASH_UNLOCK_TOUT	3000
801a31ca4aSHideyuki Sano 
811a31ca4aSHideyuki Sano /* ENV setting */
821a31ca4aSHideyuki Sano #define CONFIG_ENV_OVERWRITE	1
831a31ca4aSHideyuki Sano #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
841a31ca4aSHideyuki Sano #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + \
851a31ca4aSHideyuki Sano 				 CONFIG_SYS_MONITOR_LEN)
861a31ca4aSHideyuki Sano #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
871a31ca4aSHideyuki Sano #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
881a31ca4aSHideyuki Sano #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
891a31ca4aSHideyuki Sano 
901a31ca4aSHideyuki Sano /* SH Ether */
911a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER
921a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER_USE_PORT	0
931a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER_PHY_ADDR	0x0
941a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
951a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER_SH7734_MII	(0x01)
961a31ca4aSHideyuki Sano #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
971a31ca4aSHideyuki Sano #define CONFIG_PHY_SMSC
981a31ca4aSHideyuki Sano #define CONFIG_BITBANGMII
991a31ca4aSHideyuki Sano #define CONFIG_BITBANGMII_MULTI
1001a31ca4aSHideyuki Sano 
1011a31ca4aSHideyuki Sano /* Board Clock */
1021a31ca4aSHideyuki Sano #define CONFIG_SYS_CLK_FREQ	50000000
103717ceb63SNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
104717ceb63SNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
1051a31ca4aSHideyuki Sano #define CONFIG_SYS_TMU_CLK_DIV	4
1061a31ca4aSHideyuki Sano 
1071a31ca4aSHideyuki Sano #endif	/* __ARMADILLO_800EVA_H */
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