xref: /rk3399_rockchip-uboot/include/configs/aristainetos-common.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * (C) Copyright 2015
3  * (C) Copyright 2014
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  *
6  * Based on:
7  * Copyright (C) 2012 Freescale Semiconductor, Inc.
8  *
9  * Configuration settings for the Freescale i.MX6Q SabreSD board.
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4501
19 #define CONFIG_MMCROOT		"/dev/mmcblk0p1"
20 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(64 * SZ_1M)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_MXC_UART
28 
29 /* MMC Configs */
30 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
31 
32 #define CONFIG_CMD_MII
33 #define CONFIG_FEC_MXC
34 #define CONFIG_MII
35 #define IMX_FEC_BASE			ENET_BASE_ADDR
36 #define CONFIG_ETHPRIME			"FEC"
37 #define CONFIG_FEC_MXC_PHYADDR		0
38 
39 #define CONFIG_PHYLIB
40 #define CONFIG_PHY_MICREL
41 
42 #define CONFIG_SPI_FLASH_MTD
43 #define CONFIG_MXC_SPI
44 #define CONFIG_SF_DEFAULT_SPEED		20000000
45 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
46 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
47 
48 /* Command definition */
49 #define CONFIG_CMD_BMODE
50 
51 #define CONFIG_EXTRA_ENV_SETTINGS \
52 	"script=u-boot.scr\0" \
53 	"fit_file=/boot/system.itb\0" \
54 	"loadaddr=0x12000000\0" \
55 	"fit_addr_r=0x14000000\0" \
56 	"uboot=/boot/u-boot.imx\0" \
57 	"uboot_sz=d0000\0" \
58 	"rescue_sys_addr=f0000\0" \
59 	"rescue_sys_length=f10000\0" \
60 	"panel=lb07wv8\0" \
61 	"splashpos=m,m\0" \
62 	"console=" CONFIG_CONSOLE_DEV "\0" \
63 	"fdt_high=0xffffffff\0"	  \
64 	"initrd_high=0xffffffff\0" \
65 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
66 	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
67 		"default ${board_type}\0" \
68 	"get_env=mw ${loadaddr} 0 0x20000;" \
69 		"mmc rescan;" \
70 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
71 		"env import -t ${loadaddr}\0" \
72 	"default_env=mw ${loadaddr} 0 0x20000;" \
73 		"env export -t ${loadaddr} serial# ethaddr eth1addr " \
74 		"board_type panel;" \
75 		"env default -a;" \
76 		"env import -t ${loadaddr}\0" \
77 	"loadbootscript=" \
78 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
79 	"bootscript=echo Running bootscript from mmc ...; " \
80 		"source\0" \
81 	"mmcpart=1\0" \
82 	"mmcdev=0\0" \
83 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
84 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
85 		"root=${mmcroot}\0" \
86 	"mmcboot=echo Booting from mmc ...; " \
87 		"run mmcargs addmtd addmisc set_fit_default;" \
88 		"bootm ${fit_addr_r}\0" \
89 	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
90 		"${fit_file}\0" \
91 	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
92 		"${uboot}\0" \
93 	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
94 		"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
95 		"setexpr uboot_maxsize ${uboot_sz} - 400;" \
96 		"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
97 		"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
98 		"sf write ${loadaddr} 400 ${filesize};" \
99 		"sf read ${cmp_buf} 400 ${uboot_sz};" \
100 		"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
101 	"ubiboot=echo Booting from ubi ...; " \
102 		"run ubiargs addmtd addmisc set_fit_default;" \
103 		"bootm ${fit_addr_r}\0" \
104 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
105 		"root=/dev/ram rw\0 " \
106 	"rescueboot=echo Booting rescue system from NOR ...; " \
107 		"run rescueargs addmtd addmisc set_fit_default;" \
108 		"bootm ${fit_addr_r}\0" \
109 	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
110 		"${rescue_sys_length}; imi ${fit_addr_r}\0" \
111 	CONFIG_EXTRA_ENV_BOARD_SETTINGS
112 
113 #define CONFIG_BOOTCOMMAND \
114 	"mmc dev ${mmcdev};" \
115 	"if mmc rescan; then " \
116 		"if run loadbootscript; then " \
117 			"run bootscript; " \
118 		"else " \
119 			"if run mmc_load_fit; then " \
120 				"run mmcboot; " \
121 			"else " \
122 				"if run ubifs_load_fit; then " \
123 					"run ubiboot; " \
124 				"else " \
125 					"if run rescue_load_fit; then " \
126 						"run rescueboot; " \
127 					"else " \
128 						"echo RESCUE SYSTEM BOOT " \
129 							"FAILURE;" \
130 					"fi; " \
131 				"fi; " \
132 			"fi; " \
133 		"fi; " \
134 	"else " \
135 		"if run ubifs_load_fit; then " \
136 			"run ubiboot; " \
137 		"else " \
138 			"if run rescue_load_fit; then " \
139 				"run rescueboot; " \
140 			"else " \
141 				"echo RESCUE SYSTEM BOOT FAILURE;" \
142 			"fi; " \
143 		"fi; " \
144 	"fi"
145 
146 #define CONFIG_ARP_TIMEOUT		200UL
147 
148 /* Print Buffer Size */
149 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
150 
151 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
152 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
153 #define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
154 
155 #define CONFIG_STACKSIZE		(128 * 1024)
156 
157 /* Physical Memory Map */
158 #define CONFIG_NR_DRAM_BANKS		1
159 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
160 
161 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
162 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
163 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
164 
165 #define CONFIG_SYS_INIT_SP_OFFSET \
166 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR \
168 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
169 
170 /* Environment organization */
171 #define CONFIG_ENV_SIZE			(12 * 1024)
172 #define CONFIG_ENV_IS_IN_SPI_FLASH
173 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
174 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
175 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
176 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
177 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
178 #define CONFIG_ENV_SECT_SIZE		(0x010000)
179 #define CONFIG_ENV_OFFSET		(0x0d0000)
180 #define CONFIG_ENV_OFFSET_REDUND	(0x0e0000)
181 
182 #define CONFIG_SYS_FSL_USDHC_NUM	2
183 
184 /* I2C */
185 #define CONFIG_SYS_I2C
186 #define CONFIG_SYS_I2C_MXC
187 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
188 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
189 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
190 #define CONFIG_SYS_I2C_SPEED		100000
191 #define CONFIG_SYS_I2C_SLAVE		0x7f
192 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }
193 
194 /* NAND stuff */
195 #define CONFIG_CMD_NAND
196 #define CONFIG_CMD_NAND_TRIMFFS
197 #define CONFIG_NAND_MXS
198 #define CONFIG_SYS_MAX_NAND_DEVICE	1
199 #define CONFIG_SYS_NAND_BASE		0x40000000
200 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
201 #define CONFIG_SYS_NAND_ONFI_DETECTION
202 
203 /* DMA stuff, needed for GPMI/MXS NAND support */
204 #define CONFIG_APBH_DMA
205 #define CONFIG_APBH_DMA_BURST
206 #define CONFIG_APBH_DMA_BURST8
207 
208 /* RTC */
209 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
210 #define CONFIG_SYS_RTC_BUS_NUM	2
211 #define CONFIG_RTC_M41T11
212 #define CONFIG_CMD_DATE
213 
214 /* USB Configs */
215 #define CONFIG_USB_EHCI
216 #define CONFIG_USB_EHCI_MX6
217 #define CONFIG_USB_STORAGE
218 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
219 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
220 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
221 #define CONFIG_MXC_USB_FLAGS	0
222 
223 /* UBI support */
224 #define CONFIG_LZO
225 #define CONFIG_CMD_MTDPARTS
226 #define CONFIG_MTD_PARTITIONS
227 #define CONFIG_MTD_DEVICE
228 #define CONFIG_RBTREE
229 #define CONFIG_CMD_UBI
230 #define CONFIG_CMD_UBIFS
231 
232 #define CONFIG_MTD_UBI_FASTMAP
233 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	1
234 
235 #define CONFIG_HW_WATCHDOG
236 #define CONFIG_IMX_WATCHDOG
237 
238 /* Framebuffer */
239 #define CONFIG_VIDEO
240 #define CONFIG_VIDEO_IPUV3
241 /* check this console not needed, after test remove it */
242 #define CONFIG_CFB_CONSOLE
243 #define CONFIG_VGA_AS_SINGLE_DEVICE
244 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
245 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
246 #define CONFIG_VIDEO_BMP_RLE8
247 #define CONFIG_SPLASH_SCREEN
248 #define CONFIG_SPLASH_SCREEN_ALIGN
249 #define CONFIG_BMP_16BPP
250 #define CONFIG_VIDEO_LOGO
251 #define CONFIG_VIDEO_BMP_LOGO
252 #define CONFIG_IPUV3_CLK 198000000
253 #define CONFIG_IMX_VIDEO_SKIP
254 
255 #define CONFIG_CMD_BMP
256 
257 #define CONFIG_PWM_IMX
258 #define CONFIG_IMX6_PWM_PER_CLK	66000000
259 
260 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */
261