1 /* 2 * (C) Copyright 2015 3 * (C) Copyright 2014 4 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 5 * 6 * Based on: 7 * Copyright (C) 2012 Freescale Semiconductor, Inc. 8 * 9 * Configuration settings for the Freescale i.MX6Q SabreSD board. 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H 14 #define __ARISTAINETOS_COMMON_CONFIG_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4501 19 #define CONFIG_MMCROOT "/dev/mmcblk0p1" 20 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 21 22 /* Size of malloc() pool */ 23 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) 24 25 #define CONFIG_BOARD_EARLY_INIT_F 26 #define CONFIG_MXC_GPIO 27 28 #define CONFIG_MXC_UART 29 30 #define CONFIG_CMD_FUSE 31 #define CONFIG_MXC_OCOTP 32 33 /* MMC Configs */ 34 #define CONFIG_FSL_ESDHC 35 #define CONFIG_FSL_USDHC 36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 37 38 #define CONFIG_MMC 39 #define CONFIG_CMD_MMC 40 #define CONFIG_GENERIC_MMC 41 #define CONFIG_BOUNCE_BUFFER 42 #define CONFIG_CMD_EXT2 43 #define CONFIG_CMD_FAT 44 #define CONFIG_DOS_PARTITION 45 46 #define CONFIG_CMD_PING 47 #define CONFIG_CMD_DHCP 48 #define CONFIG_CMD_MII 49 #define CONFIG_CMD_NET 50 #define CONFIG_FEC_MXC 51 #define CONFIG_MII 52 #define IMX_FEC_BASE ENET_BASE_ADDR 53 #define CONFIG_ETHPRIME "FEC" 54 #define CONFIG_FEC_MXC_PHYADDR 0 55 56 #define CONFIG_PHYLIB 57 #define CONFIG_PHY_MICREL 58 59 #define CONFIG_CMD_SF 60 #define CONFIG_SPI_FLASH 61 #define CONFIG_SPI_FLASH_MTD 62 #define CONFIG_SPI_FLASH_STMICRO 63 #define CONFIG_MXC_SPI 64 #define CONFIG_SF_DEFAULT_BUS 3 65 #define CONFIG_SF_DEFAULT_SPEED 20000000 66 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 67 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 68 69 /* allow to overwrite serial and ethaddr */ 70 #define CONFIG_ENV_OVERWRITE 71 #define CONFIG_CONS_INDEX 1 72 #define CONFIG_BAUDRATE 115200 73 74 /* Command definition */ 75 #define CONFIG_CMD_BMODE 76 #define CONFIG_CMD_BOOTZ 77 #define CONFIG_CMD_SETEXPR 78 79 #define CONFIG_BOOTDELAY 3 80 81 #define CONFIG_LOADADDR 0x12000000 82 #define CONFIG_SYS_TEXT_BASE 0x17800000 83 84 #define CONFIG_EXTRA_ENV_SETTINGS \ 85 "script=u-boot.scr\0" \ 86 "fit_file=/boot/system.itb\0" \ 87 "loadaddr=0x12000000\0" \ 88 "fit_addr_r=0x14000000\0" \ 89 "uboot=/boot/u-boot.imx\0" \ 90 "uboot_sz=d0000\0" \ 91 "rescue_sys_addr=f0000\0" \ 92 "rescue_sys_length=f10000\0" \ 93 "panel=lb07wv8\0" \ 94 "splashpos=m,m\0" \ 95 "console=" CONFIG_CONSOLE_DEV "\0" \ 96 "fdt_high=0xffffffff\0" \ 97 "initrd_high=0xffffffff\0" \ 98 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 99 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \ 100 "default ${board_type}\0" \ 101 "get_env=mw ${loadaddr} 0 0x20000;" \ 102 "mmc rescan;" \ 103 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \ 104 "env import -t ${loadaddr}\0" \ 105 "default_env=mw ${loadaddr} 0 0x20000;" \ 106 "env export -t ${loadaddr} serial# ethaddr eth1addr " \ 107 "board_type panel;" \ 108 "env default -a;" \ 109 "env import -t ${loadaddr}\0" \ 110 "loadbootscript=" \ 111 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 112 "bootscript=echo Running bootscript from mmc ...; " \ 113 "source\0" \ 114 "mmcpart=1\0" \ 115 "mmcdev=0\0" \ 116 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 117 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 118 "root=${mmcroot}\0" \ 119 "mmcboot=echo Booting from mmc ...; " \ 120 "run mmcargs addmtd addmisc set_fit_default;" \ 121 "bootm ${fit_addr_r}\0" \ 122 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \ 123 "${fit_file}\0" \ 124 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 125 "${uboot}\0" \ 126 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \ 127 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \ 128 "setexpr uboot_maxsize ${uboot_sz} - 400;" \ 129 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \ 130 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \ 131 "sf write ${loadaddr} 400 ${filesize};" \ 132 "sf read ${cmp_buf} 400 ${uboot_sz};" \ 133 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \ 134 "ubiboot=echo Booting from ubi ...; " \ 135 "run ubiargs addmtd addmisc set_fit_default;" \ 136 "bootm ${fit_addr_r}\0" \ 137 "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \ 138 "ubifsload ${fit_addr_r} /boot/system.itb; " \ 139 "imi ${fit_addr_r}\0 " \ 140 "rescueargs=setenv bootargs console=${console},${baudrate} " \ 141 "root=/dev/ram rw\0 " \ 142 "rescueboot=echo Booting rescue system from NOR ...; " \ 143 "run rescueargs addmtd addmisc set_fit_default;" \ 144 "bootm ${fit_addr_r}\0" \ 145 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \ 146 "${rescue_sys_length}; imi ${fit_addr_r}\0" \ 147 CONFIG_EXTRA_ENV_BOARD_SETTINGS 148 149 #define CONFIG_BOOTCOMMAND \ 150 "mmc dev ${mmcdev};" \ 151 "if mmc rescan; then " \ 152 "if run loadbootscript; then " \ 153 "run bootscript; " \ 154 "else " \ 155 "if run mmc_load_fit; then " \ 156 "run mmcboot; " \ 157 "else " \ 158 "if run ubifs_load_fit; then " \ 159 "run ubiboot; " \ 160 "else " \ 161 "if run rescue_load_fit; then " \ 162 "run rescueboot; " \ 163 "else " \ 164 "echo RESCUE SYSTEM BOOT " \ 165 "FAILURE;" \ 166 "fi; " \ 167 "fi; " \ 168 "fi; " \ 169 "fi; " \ 170 "else " \ 171 "if run ubifs_load_fit; then " \ 172 "run ubiboot; " \ 173 "else " \ 174 "if run rescue_load_fit; then " \ 175 "run rescueboot; " \ 176 "else " \ 177 "echo RESCUE SYSTEM BOOT FAILURE;" \ 178 "fi; " \ 179 "fi; " \ 180 "fi" 181 182 #define CONFIG_ARP_TIMEOUT 200UL 183 184 /* Miscellaneous configurable options */ 185 #define CONFIG_SYS_LONGHELP 186 #define CONFIG_SYS_HUSH_PARSER 187 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 188 #define CONFIG_AUTO_COMPLETE 189 #define CONFIG_SYS_CBSIZE 256 190 191 /* Print Buffer Size */ 192 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 193 #define CONFIG_SYS_MAXARGS 16 194 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 195 196 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 197 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 198 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 199 200 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 201 202 #define CONFIG_CMDLINE_EDITING 203 #define CONFIG_STACKSIZE (128 * 1024) 204 205 /* Physical Memory Map */ 206 #define CONFIG_NR_DRAM_BANKS 1 207 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 208 209 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 210 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 211 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 212 213 #define CONFIG_SYS_INIT_SP_OFFSET \ 214 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 215 #define CONFIG_SYS_INIT_SP_ADDR \ 216 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 217 218 /* Environment organization */ 219 #define CONFIG_ENV_SIZE (12 * 1024) 220 #define CONFIG_ENV_IS_IN_SPI_FLASH 221 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 222 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 223 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 224 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 225 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 226 #define CONFIG_ENV_SECT_SIZE (0x010000) 227 #define CONFIG_ENV_OFFSET (0x0d0000) 228 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000) 229 230 #define CONFIG_OF_LIBFDT 231 232 #define CONFIG_CMD_CACHE 233 234 #define CONFIG_SYS_FSL_USDHC_NUM 2 235 236 /* I2C */ 237 #define CONFIG_CMD_I2C 238 #define CONFIG_SYS_I2C 239 #define CONFIG_SYS_I2C_MXC 240 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 241 #define CONFIG_SYS_I2C_SPEED 100000 242 #define CONFIG_SYS_I2C_SLAVE 0x7f 243 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} } 244 245 #define CONFIG_CMD_GPIO 246 247 /* NAND stuff */ 248 #define CONFIG_CMD_NAND 249 #define CONFIG_CMD_NAND_TRIMFFS 250 #define CONFIG_NAND_MXS 251 #define CONFIG_SYS_MAX_NAND_DEVICE 1 252 #define CONFIG_SYS_NAND_BASE 0x40000000 253 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 254 #define CONFIG_SYS_NAND_ONFI_DETECTION 255 256 /* DMA stuff, needed for GPMI/MXS NAND support */ 257 #define CONFIG_APBH_DMA 258 #define CONFIG_APBH_DMA_BURST 259 #define CONFIG_APBH_DMA_BURST8 260 261 /* RTC */ 262 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 263 #define CONFIG_SYS_RTC_BUS_NUM 2 264 #define CONFIG_RTC_M41T11 265 #define CONFIG_CMD_DATE 266 267 /* USB Configs */ 268 #define CONFIG_CMD_USB 269 #define CONFIG_CMD_FAT 270 #define CONFIG_USB_EHCI 271 #define CONFIG_USB_EHCI_MX6 272 #define CONFIG_USB_STORAGE 273 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 274 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 275 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 276 #define CONFIG_MXC_USB_FLAGS 0 277 278 /* UBI support */ 279 #define CONFIG_CMD_MTDPARTS 280 #define CONFIG_MTD_PARTITIONS 281 #define CONFIG_MTD_DEVICE 282 #define CONFIG_RBTREE 283 #define CONFIG_LZO 284 #define CONFIG_CMD_UBI 285 #define CONFIG_CMD_UBIFS 286 287 #define CONFIG_MTD_UBI_FASTMAP 288 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1 289 290 #define CONFIG_HW_WATCHDOG 291 #define CONFIG_IMX_WATCHDOG 292 293 #define CONFIG_FIT 294 295 /* Framebuffer */ 296 #define CONFIG_VIDEO 297 #define CONFIG_VIDEO_IPUV3 298 /* check this console not needed, after test remove it */ 299 #define CONFIG_CFB_CONSOLE 300 #define CONFIG_VGA_AS_SINGLE_DEVICE 301 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 302 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 303 #define CONFIG_VIDEO_BMP_RLE8 304 #define CONFIG_SPLASH_SCREEN 305 #define CONFIG_SPLASH_SCREEN_ALIGN 306 #define CONFIG_BMP_16BPP 307 #define CONFIG_VIDEO_LOGO 308 #define CONFIG_VIDEO_BMP_LOGO 309 #define CONFIG_IPUV3_CLK 198000000 310 #define CONFIG_IMX_VIDEO_SKIP 311 312 #define CONFIG_CMD_BMP 313 314 #define CONFIG_PWM_IMX 315 #define CONFIG_IMX6_PWM_PER_CLK 66000000 316 317 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */ 318