xref: /rk3399_rockchip-uboot/include/configs/aristainetos-common.h (revision 2d8a07475eaa521f0055fc7c2617723a0364fe27)
1 /*
2  * (C) Copyright 2015
3  * (C) Copyright 2014
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  *
6  * Based on:
7  * Copyright (C) 2012 Freescale Semiconductor, Inc.
8  *
9  * Configuration settings for the Freescale i.MX6Q SabreSD board.
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4501
19 #define CONFIG_MMCROOT		"/dev/mmcblk0p1"
20 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(64 * SZ_1M)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_MXC_UART
28 
29 #define CONFIG_CMD_FUSE
30 #define CONFIG_MXC_OCOTP
31 
32 /* MMC Configs */
33 #define CONFIG_FSL_ESDHC
34 #define CONFIG_FSL_USDHC
35 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
36 
37 #define CONFIG_MMC
38 #define CONFIG_CMD_MMC
39 #define CONFIG_GENERIC_MMC
40 #define CONFIG_BOUNCE_BUFFER
41 #define CONFIG_CMD_EXT2
42 #define CONFIG_CMD_FAT
43 #define CONFIG_DOS_PARTITION
44 
45 #define CONFIG_CMD_PING
46 #define CONFIG_CMD_DHCP
47 #define CONFIG_CMD_MII
48 #define CONFIG_CMD_NET
49 #define CONFIG_FEC_MXC
50 #define CONFIG_MII
51 #define IMX_FEC_BASE			ENET_BASE_ADDR
52 #define CONFIG_ETHPRIME			"FEC"
53 #define CONFIG_FEC_MXC_PHYADDR		0
54 
55 #define CONFIG_PHYLIB
56 #define CONFIG_PHY_MICREL
57 
58 #define CONFIG_CMD_SF
59 #define CONFIG_SPI_FLASH
60 #define CONFIG_SPI_FLASH_MTD
61 #define CONFIG_SPI_FLASH_STMICRO
62 #define CONFIG_MXC_SPI
63 #define CONFIG_SF_DEFAULT_BUS		3
64 #define CONFIG_SF_DEFAULT_SPEED		20000000
65 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
66 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
67 
68 /* Command definition */
69 #define CONFIG_CMD_BMODE
70 #define CONFIG_CMD_BOOTZ
71 #define CONFIG_CMD_SETEXPR
72 
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 	"script=u-boot.scr\0" \
75 	"fit_file=/boot/system.itb\0" \
76 	"loadaddr=0x12000000\0" \
77 	"fit_addr_r=0x14000000\0" \
78 	"uboot=/boot/u-boot.imx\0" \
79 	"uboot_sz=d0000\0" \
80 	"rescue_sys_addr=f0000\0" \
81 	"rescue_sys_length=f10000\0" \
82 	"panel=lb07wv8\0" \
83 	"splashpos=m,m\0" \
84 	"console=" CONFIG_CONSOLE_DEV "\0" \
85 	"fdt_high=0xffffffff\0"	  \
86 	"initrd_high=0xffffffff\0" \
87 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
88 	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
89 		"default ${board_type}\0" \
90 	"get_env=mw ${loadaddr} 0 0x20000;" \
91 		"mmc rescan;" \
92 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
93 		"env import -t ${loadaddr}\0" \
94 	"default_env=mw ${loadaddr} 0 0x20000;" \
95 		"env export -t ${loadaddr} serial# ethaddr eth1addr " \
96 		"board_type panel;" \
97 		"env default -a;" \
98 		"env import -t ${loadaddr}\0" \
99 	"loadbootscript=" \
100 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
101 	"bootscript=echo Running bootscript from mmc ...; " \
102 		"source\0" \
103 	"mmcpart=1\0" \
104 	"mmcdev=0\0" \
105 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
106 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
107 		"root=${mmcroot}\0" \
108 	"mmcboot=echo Booting from mmc ...; " \
109 		"run mmcargs addmtd addmisc set_fit_default;" \
110 		"bootm ${fit_addr_r}\0" \
111 	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
112 		"${fit_file}\0" \
113 	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
114 		"${uboot}\0" \
115 	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
116 		"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
117 		"setexpr uboot_maxsize ${uboot_sz} - 400;" \
118 		"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
119 		"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
120 		"sf write ${loadaddr} 400 ${filesize};" \
121 		"sf read ${cmp_buf} 400 ${uboot_sz};" \
122 		"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
123 	"ubiboot=echo Booting from ubi ...; " \
124 		"run ubiargs addmtd addmisc set_fit_default;" \
125 		"bootm ${fit_addr_r}\0" \
126 	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
127 		"ubifsload ${fit_addr_r} /boot/system.itb; " \
128 		"imi ${fit_addr_r}\0 " \
129 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
130 		"root=/dev/ram rw\0 " \
131 	"rescueboot=echo Booting rescue system from NOR ...; " \
132 		"run rescueargs addmtd addmisc set_fit_default;" \
133 		"bootm ${fit_addr_r}\0" \
134 	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
135 		"${rescue_sys_length}; imi ${fit_addr_r}\0" \
136 	CONFIG_EXTRA_ENV_BOARD_SETTINGS
137 
138 #define CONFIG_BOOTCOMMAND \
139 	"mmc dev ${mmcdev};" \
140 	"if mmc rescan; then " \
141 		"if run loadbootscript; then " \
142 			"run bootscript; " \
143 		"else " \
144 			"if run mmc_load_fit; then " \
145 				"run mmcboot; " \
146 			"else " \
147 				"if run ubifs_load_fit; then " \
148 					"run ubiboot; " \
149 				"else " \
150 					"if run rescue_load_fit; then " \
151 						"run rescueboot; " \
152 					"else " \
153 						"echo RESCUE SYSTEM BOOT " \
154 							"FAILURE;" \
155 					"fi; " \
156 				"fi; " \
157 			"fi; " \
158 		"fi; " \
159 	"else " \
160 		"if run ubifs_load_fit; then " \
161 			"run ubiboot; " \
162 		"else " \
163 			"if run rescue_load_fit; then " \
164 				"run rescueboot; " \
165 			"else " \
166 				"echo RESCUE SYSTEM BOOT FAILURE;" \
167 			"fi; " \
168 		"fi; " \
169 	"fi"
170 
171 #define CONFIG_ARP_TIMEOUT		200UL
172 
173 /* Print Buffer Size */
174 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
175 
176 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
177 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
178 #define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
179 
180 #define CONFIG_STACKSIZE		(128 * 1024)
181 
182 /* Physical Memory Map */
183 #define CONFIG_NR_DRAM_BANKS		1
184 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
185 
186 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
187 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
188 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
189 
190 #define CONFIG_SYS_INIT_SP_OFFSET \
191 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
192 #define CONFIG_SYS_INIT_SP_ADDR \
193 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
194 
195 /* Environment organization */
196 #define CONFIG_ENV_SIZE			(12 * 1024)
197 #define CONFIG_ENV_IS_IN_SPI_FLASH
198 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
199 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
200 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
201 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
202 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
203 #define CONFIG_ENV_SECT_SIZE		(0x010000)
204 #define CONFIG_ENV_OFFSET		(0x0d0000)
205 #define CONFIG_ENV_OFFSET_REDUND	(0x0e0000)
206 
207 #define CONFIG_OF_LIBFDT
208 
209 #define CONFIG_CMD_CACHE
210 
211 #define CONFIG_SYS_FSL_USDHC_NUM	2
212 
213 /* I2C */
214 #define CONFIG_CMD_I2C
215 #define CONFIG_SYS_I2C
216 #define CONFIG_SYS_I2C_MXC
217 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
218 #define CONFIG_SYS_I2C_SPEED		100000
219 #define CONFIG_SYS_I2C_SLAVE		0x7f
220 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }
221 
222 /* NAND stuff */
223 #define CONFIG_CMD_NAND
224 #define CONFIG_CMD_NAND_TRIMFFS
225 #define CONFIG_NAND_MXS
226 #define CONFIG_SYS_MAX_NAND_DEVICE	1
227 #define CONFIG_SYS_NAND_BASE		0x40000000
228 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
229 #define CONFIG_SYS_NAND_ONFI_DETECTION
230 
231 /* DMA stuff, needed for GPMI/MXS NAND support */
232 #define CONFIG_APBH_DMA
233 #define CONFIG_APBH_DMA_BURST
234 #define CONFIG_APBH_DMA_BURST8
235 
236 /* RTC */
237 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
238 #define CONFIG_SYS_RTC_BUS_NUM	2
239 #define CONFIG_RTC_M41T11
240 #define CONFIG_CMD_DATE
241 
242 /* USB Configs */
243 #define CONFIG_CMD_USB
244 #define CONFIG_CMD_FAT
245 #define CONFIG_USB_EHCI
246 #define CONFIG_USB_EHCI_MX6
247 #define CONFIG_USB_STORAGE
248 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
249 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
250 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
251 #define CONFIG_MXC_USB_FLAGS	0
252 
253 /* UBI support */
254 #define CONFIG_CMD_MTDPARTS
255 #define CONFIG_MTD_PARTITIONS
256 #define CONFIG_MTD_DEVICE
257 #define CONFIG_RBTREE
258 #define CONFIG_LZO
259 #define CONFIG_CMD_UBI
260 #define CONFIG_CMD_UBIFS
261 
262 #define CONFIG_MTD_UBI_FASTMAP
263 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	1
264 
265 #define CONFIG_HW_WATCHDOG
266 #define CONFIG_IMX_WATCHDOG
267 
268 #define CONFIG_FIT
269 
270 /* Framebuffer */
271 #define CONFIG_VIDEO
272 #define CONFIG_VIDEO_IPUV3
273 /* check this console not needed, after test remove it */
274 #define CONFIG_CFB_CONSOLE
275 #define CONFIG_VGA_AS_SINGLE_DEVICE
276 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
277 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
278 #define CONFIG_VIDEO_BMP_RLE8
279 #define CONFIG_SPLASH_SCREEN
280 #define CONFIG_SPLASH_SCREEN_ALIGN
281 #define CONFIG_BMP_16BPP
282 #define CONFIG_VIDEO_LOGO
283 #define CONFIG_VIDEO_BMP_LOGO
284 #define CONFIG_IPUV3_CLK 198000000
285 #define CONFIG_IMX_VIDEO_SKIP
286 
287 #define CONFIG_CMD_BMP
288 
289 #define CONFIG_PWM_IMX
290 #define CONFIG_IMX6_PWM_PER_CLK	66000000
291 
292 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */
293