17254d92eSHeiko Schocher /* 27254d92eSHeiko Schocher * (C) Copyright 2015 37254d92eSHeiko Schocher * (C) Copyright 2014 47254d92eSHeiko Schocher * Heiko Schocher, DENX Software Engineering, hs@denx.de. 57254d92eSHeiko Schocher * 67254d92eSHeiko Schocher * Based on: 77254d92eSHeiko Schocher * Copyright (C) 2012 Freescale Semiconductor, Inc. 87254d92eSHeiko Schocher * 97254d92eSHeiko Schocher * Configuration settings for the Freescale i.MX6Q SabreSD board. 107254d92eSHeiko Schocher * 117254d92eSHeiko Schocher * SPDX-License-Identifier: GPL-2.0+ 127254d92eSHeiko Schocher */ 137254d92eSHeiko Schocher #ifndef __ARISTAINETOS_COMMON_CONFIG_H 147254d92eSHeiko Schocher #define __ARISTAINETOS_COMMON_CONFIG_H 157254d92eSHeiko Schocher 167254d92eSHeiko Schocher #include "mx6_common.h" 177254d92eSHeiko Schocher 187254d92eSHeiko Schocher #define CONFIG_MACH_TYPE 4501 197254d92eSHeiko Schocher #define CONFIG_MMCROOT "/dev/mmcblk0p1" 207254d92eSHeiko Schocher 217254d92eSHeiko Schocher /* Size of malloc() pool */ 227254d92eSHeiko Schocher #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) 237254d92eSHeiko Schocher 247254d92eSHeiko Schocher #define CONFIG_MXC_UART 257254d92eSHeiko Schocher 267254d92eSHeiko Schocher /* MMC Configs */ 277254d92eSHeiko Schocher #define CONFIG_SYS_FSL_ESDHC_ADDR 0 287254d92eSHeiko Schocher 297254d92eSHeiko Schocher #define CONFIG_FEC_MXC 307254d92eSHeiko Schocher #define CONFIG_MII 317254d92eSHeiko Schocher #define IMX_FEC_BASE ENET_BASE_ADDR 327254d92eSHeiko Schocher #define CONFIG_ETHPRIME "FEC" 337254d92eSHeiko Schocher #define CONFIG_FEC_MXC_PHYADDR 0 347254d92eSHeiko Schocher 357254d92eSHeiko Schocher #define CONFIG_SPI_FLASH_MTD 367254d92eSHeiko Schocher #define CONFIG_MXC_SPI 377254d92eSHeiko Schocher #define CONFIG_SF_DEFAULT_SPEED 20000000 387254d92eSHeiko Schocher #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 397254d92eSHeiko Schocher #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 407254d92eSHeiko Schocher 417254d92eSHeiko Schocher #define CONFIG_EXTRA_ENV_SETTINGS \ 427254d92eSHeiko Schocher "script=u-boot.scr\0" \ 437254d92eSHeiko Schocher "fit_file=/boot/system.itb\0" \ 447254d92eSHeiko Schocher "loadaddr=0x12000000\0" \ 457254d92eSHeiko Schocher "fit_addr_r=0x14000000\0" \ 467254d92eSHeiko Schocher "uboot=/boot/u-boot.imx\0" \ 477254d92eSHeiko Schocher "uboot_sz=d0000\0" \ 487254d92eSHeiko Schocher "rescue_sys_addr=f0000\0" \ 497254d92eSHeiko Schocher "rescue_sys_length=f10000\0" \ 507254d92eSHeiko Schocher "panel=lb07wv8\0" \ 517254d92eSHeiko Schocher "splashpos=m,m\0" \ 52*12ca05a3SSimon Glass "console=" CONSOLE_DEV "\0" \ 537254d92eSHeiko Schocher "fdt_high=0xffffffff\0" \ 547254d92eSHeiko Schocher "initrd_high=0xffffffff\0" \ 557254d92eSHeiko Schocher "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 567254d92eSHeiko Schocher "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \ 577254d92eSHeiko Schocher "default ${board_type}\0" \ 587254d92eSHeiko Schocher "get_env=mw ${loadaddr} 0 0x20000;" \ 597254d92eSHeiko Schocher "mmc rescan;" \ 607254d92eSHeiko Schocher "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \ 617254d92eSHeiko Schocher "env import -t ${loadaddr}\0" \ 627254d92eSHeiko Schocher "default_env=mw ${loadaddr} 0 0x20000;" \ 637254d92eSHeiko Schocher "env export -t ${loadaddr} serial# ethaddr eth1addr " \ 647254d92eSHeiko Schocher "board_type panel;" \ 657254d92eSHeiko Schocher "env default -a;" \ 667254d92eSHeiko Schocher "env import -t ${loadaddr}\0" \ 677254d92eSHeiko Schocher "loadbootscript=" \ 687254d92eSHeiko Schocher "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 697254d92eSHeiko Schocher "bootscript=echo Running bootscript from mmc ...; " \ 707254d92eSHeiko Schocher "source\0" \ 717254d92eSHeiko Schocher "mmcpart=1\0" \ 727254d92eSHeiko Schocher "mmcdev=0\0" \ 737254d92eSHeiko Schocher "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 747254d92eSHeiko Schocher "mmcargs=setenv bootargs console=${console},${baudrate} " \ 757254d92eSHeiko Schocher "root=${mmcroot}\0" \ 767254d92eSHeiko Schocher "mmcboot=echo Booting from mmc ...; " \ 777254d92eSHeiko Schocher "run mmcargs addmtd addmisc set_fit_default;" \ 787254d92eSHeiko Schocher "bootm ${fit_addr_r}\0" \ 797254d92eSHeiko Schocher "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \ 807254d92eSHeiko Schocher "${fit_file}\0" \ 817254d92eSHeiko Schocher "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 827254d92eSHeiko Schocher "${uboot}\0" \ 837254d92eSHeiko Schocher "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \ 847254d92eSHeiko Schocher "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \ 857254d92eSHeiko Schocher "setexpr uboot_maxsize ${uboot_sz} - 400;" \ 867254d92eSHeiko Schocher "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \ 877254d92eSHeiko Schocher "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \ 887254d92eSHeiko Schocher "sf write ${loadaddr} 400 ${filesize};" \ 897254d92eSHeiko Schocher "sf read ${cmp_buf} 400 ${uboot_sz};" \ 907254d92eSHeiko Schocher "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \ 917254d92eSHeiko Schocher "ubiboot=echo Booting from ubi ...; " \ 927254d92eSHeiko Schocher "run ubiargs addmtd addmisc set_fit_default;" \ 937254d92eSHeiko Schocher "bootm ${fit_addr_r}\0" \ 947254d92eSHeiko Schocher "rescueargs=setenv bootargs console=${console},${baudrate} " \ 957254d92eSHeiko Schocher "root=/dev/ram rw\0 " \ 967254d92eSHeiko Schocher "rescueboot=echo Booting rescue system from NOR ...; " \ 977254d92eSHeiko Schocher "run rescueargs addmtd addmisc set_fit_default;" \ 987254d92eSHeiko Schocher "bootm ${fit_addr_r}\0" \ 997254d92eSHeiko Schocher "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \ 1007254d92eSHeiko Schocher "${rescue_sys_length}; imi ${fit_addr_r}\0" \ 1017254d92eSHeiko Schocher CONFIG_EXTRA_ENV_BOARD_SETTINGS 1027254d92eSHeiko Schocher 1037254d92eSHeiko Schocher #define CONFIG_BOOTCOMMAND \ 1047254d92eSHeiko Schocher "mmc dev ${mmcdev};" \ 1057254d92eSHeiko Schocher "if mmc rescan; then " \ 1067254d92eSHeiko Schocher "if run loadbootscript; then " \ 1077254d92eSHeiko Schocher "run bootscript; " \ 1087254d92eSHeiko Schocher "else " \ 1097254d92eSHeiko Schocher "if run mmc_load_fit; then " \ 1107254d92eSHeiko Schocher "run mmcboot; " \ 1117254d92eSHeiko Schocher "else " \ 1127254d92eSHeiko Schocher "if run ubifs_load_fit; then " \ 1137254d92eSHeiko Schocher "run ubiboot; " \ 1147254d92eSHeiko Schocher "else " \ 1157254d92eSHeiko Schocher "if run rescue_load_fit; then " \ 1167254d92eSHeiko Schocher "run rescueboot; " \ 1177254d92eSHeiko Schocher "else " \ 1187254d92eSHeiko Schocher "echo RESCUE SYSTEM BOOT " \ 1197254d92eSHeiko Schocher "FAILURE;" \ 1207254d92eSHeiko Schocher "fi; " \ 1217254d92eSHeiko Schocher "fi; " \ 1227254d92eSHeiko Schocher "fi; " \ 1237254d92eSHeiko Schocher "fi; " \ 1247254d92eSHeiko Schocher "else " \ 1257254d92eSHeiko Schocher "if run ubifs_load_fit; then " \ 1267254d92eSHeiko Schocher "run ubiboot; " \ 1277254d92eSHeiko Schocher "else " \ 1287254d92eSHeiko Schocher "if run rescue_load_fit; then " \ 1297254d92eSHeiko Schocher "run rescueboot; " \ 1307254d92eSHeiko Schocher "else " \ 1317254d92eSHeiko Schocher "echo RESCUE SYSTEM BOOT FAILURE;" \ 1327254d92eSHeiko Schocher "fi; " \ 1337254d92eSHeiko Schocher "fi; " \ 1347254d92eSHeiko Schocher "fi" 1357254d92eSHeiko Schocher 1367254d92eSHeiko Schocher #define CONFIG_ARP_TIMEOUT 200UL 1377254d92eSHeiko Schocher 1387254d92eSHeiko Schocher #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 1397254d92eSHeiko Schocher #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 1407254d92eSHeiko Schocher #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 1417254d92eSHeiko Schocher 1427254d92eSHeiko Schocher /* Physical Memory Map */ 1437254d92eSHeiko Schocher #define CONFIG_NR_DRAM_BANKS 1 1447254d92eSHeiko Schocher #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 1457254d92eSHeiko Schocher 1467254d92eSHeiko Schocher #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 1477254d92eSHeiko Schocher #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 1487254d92eSHeiko Schocher #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 1497254d92eSHeiko Schocher 1507254d92eSHeiko Schocher #define CONFIG_SYS_INIT_SP_OFFSET \ 1517254d92eSHeiko Schocher (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 1527254d92eSHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR \ 1537254d92eSHeiko Schocher (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 1547254d92eSHeiko Schocher 155056845c2SPeter Robinson /* Environment organization */ 1567254d92eSHeiko Schocher #define CONFIG_ENV_SIZE (12 * 1024) 1577254d92eSHeiko Schocher #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 1587254d92eSHeiko Schocher #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 1597254d92eSHeiko Schocher #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 1607254d92eSHeiko Schocher #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 1617254d92eSHeiko Schocher #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 1627254d92eSHeiko Schocher #define CONFIG_ENV_SECT_SIZE (0x010000) 1637254d92eSHeiko Schocher #define CONFIG_ENV_OFFSET (0x0d0000) 1647254d92eSHeiko Schocher #define CONFIG_ENV_OFFSET_REDUND (0x0e0000) 1657254d92eSHeiko Schocher 1667254d92eSHeiko Schocher #define CONFIG_SYS_FSL_USDHC_NUM 2 1677254d92eSHeiko Schocher 1687254d92eSHeiko Schocher /* I2C */ 1697254d92eSHeiko Schocher #define CONFIG_SYS_I2C 1707254d92eSHeiko Schocher #define CONFIG_SYS_I2C_MXC 17103544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 17203544c66SAlbert ARIBAUD \\(3ADEV\\) #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 1737254d92eSHeiko Schocher #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 1747254d92eSHeiko Schocher #define CONFIG_SYS_I2C_SPEED 100000 1757254d92eSHeiko Schocher #define CONFIG_SYS_I2C_SLAVE 0x7f 1767254d92eSHeiko Schocher #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} } 1777254d92eSHeiko Schocher 1787254d92eSHeiko Schocher /* NAND stuff */ 1797254d92eSHeiko Schocher #define CONFIG_SYS_MAX_NAND_DEVICE 1 1807254d92eSHeiko Schocher #define CONFIG_SYS_NAND_BASE 0x40000000 1817254d92eSHeiko Schocher #define CONFIG_SYS_NAND_5_ADDR_CYCLE 1827254d92eSHeiko Schocher #define CONFIG_SYS_NAND_ONFI_DETECTION 1837254d92eSHeiko Schocher 1847254d92eSHeiko Schocher /* DMA stuff, needed for GPMI/MXS NAND support */ 1857254d92eSHeiko Schocher 1867254d92eSHeiko Schocher /* RTC */ 1877254d92eSHeiko Schocher #define CONFIG_SYS_I2C_RTC_ADDR 0x68 1887254d92eSHeiko Schocher #define CONFIG_SYS_RTC_BUS_NUM 2 1897254d92eSHeiko Schocher #define CONFIG_RTC_M41T11 1907254d92eSHeiko Schocher 1917254d92eSHeiko Schocher /* USB Configs */ 1927254d92eSHeiko Schocher #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 1937254d92eSHeiko Schocher #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 1947254d92eSHeiko Schocher #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 1957254d92eSHeiko Schocher #define CONFIG_MXC_USB_FLAGS 0 1967254d92eSHeiko Schocher 1977254d92eSHeiko Schocher /* UBI support */ 1987254d92eSHeiko Schocher 1997254d92eSHeiko Schocher #define CONFIG_HW_WATCHDOG 2007254d92eSHeiko Schocher #define CONFIG_IMX_WATCHDOG 2017254d92eSHeiko Schocher 2027254d92eSHeiko Schocher /* Framebuffer */ 2037254d92eSHeiko Schocher #define CONFIG_VIDEO_IPUV3 2047254d92eSHeiko Schocher /* check this console not needed, after test remove it */ 2057254d92eSHeiko Schocher #define CONFIG_VIDEO_BMP_RLE8 2067254d92eSHeiko Schocher #define CONFIG_SPLASH_SCREEN 2077254d92eSHeiko Schocher #define CONFIG_SPLASH_SCREEN_ALIGN 2087254d92eSHeiko Schocher #define CONFIG_BMP_16BPP 2097254d92eSHeiko Schocher #define CONFIG_VIDEO_LOGO 2107254d92eSHeiko Schocher #define CONFIG_VIDEO_BMP_LOGO 2117254d92eSHeiko Schocher #define CONFIG_IPUV3_CLK 198000000 2127254d92eSHeiko Schocher #define CONFIG_IMX_VIDEO_SKIP 2137254d92eSHeiko Schocher 2147254d92eSHeiko Schocher #define CONFIG_PWM_IMX 2157254d92eSHeiko Schocher #define CONFIG_IMX6_PWM_PER_CLK 66000000 2167254d92eSHeiko Schocher 2177254d92eSHeiko Schocher #endif /* __ARISTAINETOS_COMMON_CONFIG_H */ 218