1 /* 2 * 3 * Configuration settings for the Armadeus Project motherboard APF27 4 * 5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_VERSION_VARIABLE 14 #define CONFIG_ENV_VERSION 10 15 #define CONFIG_IDENT_STRING " apf27 patch 3.10" 16 #define CONFIG_BOARD_NAME apf27 17 18 /* 19 * SoC configurations 20 */ 21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */ 22 #define CONFIG_MACH_TYPE 1698 /* APF27 */ 23 24 /* 25 * Enable the call to miscellaneous platform dependent initialization. 26 */ 27 #define CONFIG_SYS_NO_FLASH 28 29 /* 30 * Board display option 31 */ 32 #define CONFIG_DISPLAY_BOARDINFO 33 #define CONFIG_DISPLAY_CPUINFO 34 35 /* 36 * SPL 37 */ 38 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 39 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" 40 #define CONFIG_SPL_MAX_SIZE 2048 41 #define CONFIG_SPL_TEXT_BASE 0xA0000000 42 #define CONFIG_SPL_SERIAL_SUPPORT 43 44 /* NAND boot config */ 45 #define CONFIG_SPL_NAND_SUPPORT 46 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 47 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 48 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 49 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800 50 51 /* 52 * BOOTP options 53 */ 54 #define CONFIG_BOOTP_SUBNETMASK 55 #define CONFIG_BOOTP_GATEWAY 56 #define CONFIG_BOOTP_HOSTNAME 57 #define CONFIG_BOOTP_BOOTPATH 58 #define CONFIG_BOOTP_BOOTFILESIZE 59 #define CONFIG_BOOTP_DNS 60 #define CONFIG_BOOTP_DNS2 61 62 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME 63 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" 64 65 /* 66 * U-Boot Commands 67 */ 68 #define CONFIG_CMD_ASKENV /* ask for env variable */ 69 #define CONFIG_CMD_BSP /* Board Specific functions */ 70 #define CONFIG_CMD_CACHE /* icache, dcache */ 71 #define CONFIG_CMD_DATE 72 #define CONFIG_CMD_EEPROM 73 #define CONFIG_CMD_EXT2 74 #define CONFIG_CMD_FAT /* FAT support */ 75 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */ 76 #define CONFIG_CMD_MII /* MII support */ 77 #define CONFIG_CMD_MMC 78 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 79 #define CONFIG_CMD_NAND /* NAND support */ 80 #define CONFIG_CMD_NAND_LOCK_UNLOCK 81 #define CONFIG_CMD_NAND_TRIMFFS 82 #define CONFIG_CMD_UBI 83 #define CONFIG_CMD_UBIFS 84 85 /* 86 * Memory configurations 87 */ 88 #define CONFIG_NR_DRAM_POPULATED 1 89 #define CONFIG_NR_DRAM_BANKS 2 90 91 #define ACFG_SDRAM_MBYTE_SYZE 64 92 93 #define PHYS_SDRAM_1 0xA0000000 94 #define PHYS_SDRAM_2 0xB0000000 95 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 96 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) 97 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ 98 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ 99 100 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ 101 + PHYS_SDRAM_1_SIZE - 0x0100000) 102 103 #define CONFIG_SYS_TEXT_BASE 0xA0000800 104 105 /* 106 * FLASH organization 107 */ 108 #define ACFG_MONITOR_OFFSET 0x00000000 109 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */ 110 #define CONFIG_ENV_IS_IN_NAND 111 #define CONFIG_ENV_OVERWRITE 112 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */ 113 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */ 114 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */ 115 #define CONFIG_ENV_OFFSET_REDUND \ 116 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */ 117 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */ 118 #define CONFIG_FIRMWARE_OFFSET 0x00200000 119 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */ 120 #define CONFIG_KERNEL_OFFSET 0x00300000 121 #define CONFIG_ROOTFS_OFFSET 0x00800000 122 123 #define CONFIG_MTDMAP "mxc_nand.0" 124 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP 125 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \ 126 ":1M(u-boot)ro," \ 127 "512K(env)," \ 128 "512K(env2)," \ 129 "512K(firmware)," \ 130 "512K(dtb)," \ 131 "5M(kernel)," \ 132 "-(rootfs)" 133 134 /* 135 * U-Boot general configurations 136 */ 137 #define CONFIG_SYS_LONGHELP 138 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ 139 #define CONFIG_SYS_PBSIZE \ 140 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 141 /* Print buffer size */ 142 #define CONFIG_SYS_MAXARGS 16 /* max command args */ 143 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 144 /* Boot argument buffer size */ 145 #define CONFIG_AUTO_COMPLETE 146 #define CONFIG_CMDLINE_EDITING 147 #define CONFIG_ENV_VARS_UBOOT_CONFIG 148 #define CONFIG_PREBOOT "run check_flash check_env;" 149 150 151 /* 152 * Boot Linux 153 */ 154 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ 155 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ 156 #define CONFIG_INITRD_TAG /* send initrd params */ 157 158 #define CONFIG_BOOTDELAY 5 159 #define CONFIG_ZERO_BOOTDELAY_CHECK 160 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" 161 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ 162 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ 163 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " 164 165 #define ACFG_CONSOLE_DEV ttySMX0 166 #define CONFIG_BOOTCOMMAND "run ubifsboot" 167 #define CONFIG_SYS_AUTOLOAD "no" 168 /* 169 * Default load address for user programs and kernel 170 */ 171 #define CONFIG_LOADADDR 0xA0000000 172 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 173 174 /* 175 * Extra Environments 176 */ 177 #define CONFIG_EXTRA_ENV_SETTINGS \ 178 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ 179 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ 180 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 181 "partition=nand0,6\0" \ 182 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \ 183 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \ 184 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \ 185 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \ 186 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \ 187 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \ 188 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ 189 "kernel_addr_r=A0000000\0" \ 190 "check_env=if test -n ${flash_env_version}; " \ 191 "then env default env_version; " \ 192 "else env set flash_env_version ${env_version}; env save; "\ 193 "fi; " \ 194 "if itest ${flash_env_version} < ${env_version}; then " \ 195 "echo \"*** Warning - Environment version" \ 196 " change suggests: run flash_reset_env; reset\"; "\ 197 "env default flash_reset_env; "\ 198 "fi; \0" \ 199 "check_flash=nand lock; nand unlock ${env_addr}; \0" \ 200 "flash_reset_env=env default -f -a; saveenv; run update_env;" \ 201 "echo Flash environment variables erased!\0" \ 202 "download_uboot=tftpboot ${loadaddr} ${board_name}" \ 203 "-u-boot-with-spl.bin\0" \ 204 "flash_uboot=nand unlock ${u-boot_addr} ;" \ 205 "nand erase.part u-boot;" \ 206 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\ 207 "then nand lock; nand unlock ${env_addr};" \ 208 "echo Flashing of uboot succeed;" \ 209 "else echo Flashing of uboot failed;" \ 210 "fi; \0" \ 211 "update_uboot=run download_uboot flash_uboot\0" \ 212 "download_env=tftpboot ${loadaddr} ${board_name}" \ 213 "-u-boot-env.txt\0" \ 214 "flash_env=env import -t ${loadaddr}; env save; \0" \ 215 "update_env=run download_env flash_env\0" \ 216 "update_all=run update_env update_uboot\0" \ 217 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \ 218 219 /* 220 * Serial Driver 221 */ 222 #define CONFIG_MXC_UART 223 #define CONFIG_CONS_INDEX 1 224 #define CONFIG_BAUDRATE 115200 225 #define CONFIG_MXC_UART_BASE UART1_BASE 226 227 /* 228 * GPIO 229 */ 230 #define CONFIG_MXC_GPIO 231 232 /* 233 * NOR 234 */ 235 236 /* 237 * NAND 238 */ 239 #define CONFIG_NAND_MXC 240 241 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000 242 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE 243 #define CONFIG_SYS_MAX_NAND_DEVICE 1 244 245 #define CONFIG_MXC_NAND_HWECC 246 #define CONFIG_SYS_NAND_LARGEPAGE 247 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 248 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 249 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 250 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \ 251 CONFIG_SYS_NAND_PAGE_SIZE 252 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 253 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11 254 #define NAND_MAX_CHIPS 1 255 256 #define CONFIG_FLASH_SHOW_PROGRESS 45 257 #define CONFIG_SYS_NAND_QUIET 1 258 259 /* 260 * Partitions & Filsystems 261 */ 262 #define CONFIG_MTD_DEVICE 263 #define CONFIG_MTD_PARTITIONS 264 #define CONFIG_DOS_PARTITION 265 #define CONFIG_SUPPORT_VFAT 266 267 /* 268 * UBIFS 269 */ 270 #define CONFIG_RBTREE 271 #define CONFIG_LZO 272 273 /* 274 * Ethernet (on SOC imx FEC) 275 */ 276 #define CONFIG_FEC_MXC 277 #define CONFIG_FEC_MXC_PHYADDR 0x1f 278 #define CONFIG_MII /* MII PHY management */ 279 280 /* 281 * FPGA 282 */ 283 #ifndef CONFIG_SPL_BUILD 284 #define CONFIG_FPGA 285 #endif 286 #define CONFIG_FPGA_COUNT 1 287 #define CONFIG_FPGA_XILINX 288 #define CONFIG_FPGA_SPARTAN3 289 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ 290 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 291 #define CONFIG_SYS_FPGA_CHECK_CTRLC 292 #define CONFIG_SYS_FPGA_CHECK_ERROR 293 294 /* 295 * Fuses - IIM 296 */ 297 #ifdef CONFIG_CMD_IMX_FUSE 298 #define IIM_MAC_BANK 0 299 #define IIM_MAC_ROW 5 300 #define IIM0_SCC_KEY 11 301 #define IIM1_SUID 1 302 #endif 303 304 /* 305 * I2C 306 */ 307 308 #ifdef CONFIG_CMD_I2C 309 #define CONFIG_SYS_I2C 310 #define CONFIG_SYS_I2C_MXC 311 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 312 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 313 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */ 314 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F 315 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */ 316 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F 317 #define CONFIG_SYS_I2C_NOPROBES { } 318 319 #ifdef CONFIG_CMD_EEPROM 320 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */ 321 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 322 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 323 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */ 324 #endif /* CONFIG_CMD_EEPROM */ 325 #endif /* CONFIG_CMD_I2C */ 326 327 /* 328 * SD/MMC 329 */ 330 #ifdef CONFIG_CMD_MMC 331 #define CONFIG_MMC 332 #define CONFIG_GENERIC_MMC 333 #define CONFIG_MXC_MMC 334 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 335 #endif 336 337 /* 338 * RTC 339 */ 340 #ifdef CONFIG_CMD_DATE 341 #define CONFIG_RTC_DS1374 342 #define CONFIG_SYS_RTC_BUS_NUM 0 343 #endif /* CONFIG_CMD_DATE */ 344 345 /* 346 * PLL 347 * 348 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 349 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------| 350 */ 351 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */ 352 353 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */ 354 /* micron 64MB */ 355 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 356 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ 357 #endif 358 359 #if (ACFG_SDRAM_MBYTE_SYZE == 128) 360 /* micron 128MB */ 361 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 362 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 363 #endif 364 365 #if (ACFG_SDRAM_MBYTE_SYZE == 256) 366 /* micron 256MB */ 367 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ 368 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */ 369 #endif 370 371 #endif /* __CONFIG_H */ 372