xref: /rk3399_rockchip-uboot/include/configs/apf27.h (revision 703ec9ddf965063cd79910df281657b056879368)
1 /*
2  *
3  * Configuration settings for the Armadeus Project motherboard APF27
4  *
5  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6  *
7  * SPDX-License-Identifier:    GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #define CONFIG_ENV_VERSION	10
14 #define CONFIG_BOARD_NAME apf27
15 
16 /*
17  * SoC configurations
18  */
19 #define CONFIG_MX27			/* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE	1698	/* APF27 */
21 
22 /*
23  * Enable the call to miscellaneous platform dependent initialization.
24  */
25 
26 /*
27  * SPL
28  */
29 #define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
30 #define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
31 #define CONFIG_SPL_MAX_SIZE	2048
32 #define CONFIG_SPL_TEXT_BASE    0xA0000000
33 
34 /* NAND boot config */
35 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
37 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN - 0x800
39 
40 /*
41  * BOOTP options
42  */
43 #define CONFIG_BOOTP_SUBNETMASK
44 #define CONFIG_BOOTP_GATEWAY
45 #define CONFIG_BOOTP_HOSTNAME
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_BOOTFILESIZE
48 #define CONFIG_BOOTP_DNS
49 #define CONFIG_BOOTP_DNS2
50 
51 #define CONFIG_HOSTNAME	CONFIG_BOARD_NAME
52 #define CONFIG_ROOTPATH	"/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53 
54 /*
55  * U-Boot Commands
56  */
57 #define CONFIG_CMD_NAND		/* NAND support			*/
58 #define CONFIG_CMD_NAND_LOCK_UNLOCK
59 #define CONFIG_CMD_NAND_TRIMFFS
60 
61 /*
62  * Memory configurations
63  */
64 #define CONFIG_NR_DRAM_POPULATED 1
65 #define CONFIG_NR_DRAM_BANKS	2
66 
67 #define ACFG_SDRAM_MBYTE_SYZE 64
68 
69 #define PHYS_SDRAM_1			0xA0000000
70 #define PHYS_SDRAM_2			0xB0000000
71 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
72 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (512<<10))
73 #define CONFIG_SYS_MEMTEST_START	0xA0000000	/* memtest test area  */
74 #define CONFIG_SYS_MEMTEST_END		0xA0300000	/* 3 MiB RAM test */
75 
76 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
77 		+ PHYS_SDRAM_1_SIZE - 0x0100000)
78 
79 #define CONFIG_SYS_TEXT_BASE		0xA0000800
80 
81 /*
82  * FLASH organization
83  */
84 #define	ACFG_MONITOR_OFFSET		0x00000000
85 #define	CONFIG_SYS_MONITOR_LEN		0x00100000	/* 1MiB */
86 #define CONFIG_ENV_IS_IN_NAND
87 #define	CONFIG_ENV_OVERWRITE
88 #define	CONFIG_ENV_OFFSET		0x00100000	/* NAND offset */
89 #define	CONFIG_ENV_SIZE			0x00020000	/* 128kB  */
90 #define CONFIG_ENV_RANGE		0X00080000	/* 512kB */
91 #define	CONFIG_ENV_OFFSET_REDUND	\
92 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)	/* +512kB */
93 #define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE	/* 512kB */
94 #define	CONFIG_FIRMWARE_OFFSET		0x00200000
95 #define	CONFIG_FIRMWARE_SIZE		0x00080000	/* 512kB  */
96 #define	CONFIG_KERNEL_OFFSET		0x00300000
97 #define	CONFIG_ROOTFS_OFFSET		0x00800000
98 
99 #define CONFIG_MTDMAP			"mxc_nand.0"
100 #define MTDIDS_DEFAULT			"nand0=" CONFIG_MTDMAP
101 #define MTDPARTS_DEFAULT	"mtdparts=" CONFIG_MTDMAP \
102 				":1M(u-boot)ro," \
103 				"512K(env)," \
104 				"512K(env2)," \
105 				"512K(firmware)," \
106 				"512K(dtb)," \
107 				"5M(kernel)," \
108 				"-(rootfs)"
109 
110 /*
111  * U-Boot general configurations
112  */
113 #define CONFIG_SYS_LONGHELP
114 #define CONFIG_SYS_CBSIZE		2048		/* console I/O buffer */
115 #define CONFIG_SYS_PBSIZE		\
116 				(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
117 						/* Print buffer size */
118 #define CONFIG_SYS_MAXARGS		16		/* max command args */
119 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
120 						/* Boot argument buffer size */
121 #define CONFIG_AUTO_COMPLETE
122 #define CONFIG_CMDLINE_EDITING
123 #define CONFIG_ENV_VARS_UBOOT_CONFIG
124 #define CONFIG_PREBOOT			"run check_flash check_env;"
125 
126 /*
127  * Boot Linux
128  */
129 #define CONFIG_CMDLINE_TAG		/* send commandline to Kernel	*/
130 #define CONFIG_SETUP_MEMORY_TAGS	/* send memory definition to kernel */
131 #define CONFIG_INITRD_TAG		/* send initrd params	*/
132 
133 #define	CONFIG_BOOTFILE		__stringify(CONFIG_BOARD_NAME) "-linux.bin"
134 #define CONFIG_BOOTARGS		"console=" __stringify(ACFG_CONSOLE_DEV) "," \
135 			__stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
136 			" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
137 
138 #define ACFG_CONSOLE_DEV	ttySMX0
139 #define CONFIG_BOOTCOMMAND	"run ubifsboot"
140 #define CONFIG_SYS_AUTOLOAD	"no"
141 /*
142  * Default load address for user programs and kernel
143  */
144 #define CONFIG_LOADADDR			0xA0000000
145 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
146 
147 /*
148  * Extra Environments
149  */
150 #define CONFIG_EXTRA_ENV_SETTINGS \
151 	"env_version="		__stringify(CONFIG_ENV_VERSION)		"\0" \
152 	"consoledev="		__stringify(ACFG_CONSOLE_DEV)		"\0" \
153 	"mtdparts="		MTDPARTS_DEFAULT			"\0" \
154 	"partition=nand0,6\0"						\
155 	"u-boot_addr="		__stringify(ACFG_MONITOR_OFFSET)	"\0" \
156 	"env_addr="		__stringify(CONFIG_ENV_OFFSET)		"\0" \
157 	"firmware_addr="	__stringify(CONFIG_FIRMWARE_OFFSET)	"\0" \
158 	"firmware_size="	__stringify(CONFIG_FIRMWARE_SIZE)	"\0" \
159 	"kernel_addr="		__stringify(CONFIG_KERNEL_OFFSET)	"\0" \
160 	"rootfs_addr="		__stringify(CONFIG_ROOTFS_OFFSET)	"\0" \
161 	"board_name="		__stringify(CONFIG_BOARD_NAME)		"\0" \
162 	"kernel_addr_r=A0000000\0" \
163 	"check_env=if test -n ${flash_env_version}; "			\
164 		"then env default env_version; "			\
165 		"else env set flash_env_version ${env_version}; env save; "\
166 		"fi; "							\
167 		"if itest ${flash_env_version} < ${env_version}; then " \
168 			"echo \"*** Warning - Environment version"	\
169 			" change suggests: run flash_reset_env; reset\"; "\
170 			"env default flash_reset_env; "\
171 		"fi; \0"						\
172 	"check_flash=nand lock; nand unlock ${env_addr}; \0"	\
173 	"flash_reset_env=env default -f -a; saveenv; run update_env;"	\
174 		"echo Flash environment variables erased!\0"		\
175 	"download_uboot=tftpboot ${loadaddr} ${board_name}"		\
176 		"-u-boot-with-spl.bin\0"				\
177 	"flash_uboot=nand unlock ${u-boot_addr} ;"			\
178 		"nand erase.part u-boot;"		\
179 		"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
180 			"then nand lock; nand unlock ${env_addr};"	\
181 				"echo Flashing of uboot succeed;"	\
182 			"else echo Flashing of uboot failed;"		\
183 		"fi; \0"						\
184 	"update_uboot=run download_uboot flash_uboot\0"			\
185 	"download_env=tftpboot ${loadaddr} ${board_name}"		\
186 		"-u-boot-env.txt\0"				\
187 	"flash_env=env import -t ${loadaddr}; env save; \0"		\
188 	"update_env=run download_env flash_env\0"			\
189 	"update_all=run update_env update_uboot\0"			\
190 	"unlock_regs=mw 10000008 0; mw 10020008 0\0"			\
191 
192 /*
193  * Serial Driver
194  */
195 #define CONFIG_MXC_UART
196 #define CONFIG_CONS_INDEX		1
197 #define CONFIG_MXC_UART_BASE		UART1_BASE
198 
199 /*
200  * GPIO
201  */
202 #define CONFIG_MXC_GPIO
203 
204 /*
205  * NOR
206  */
207 
208 /*
209  * NAND
210  */
211 #define CONFIG_NAND_MXC
212 
213 #define CONFIG_MXC_NAND_REGS_BASE	0xD8000000
214 #define CONFIG_SYS_NAND_BASE		CONFIG_MXC_NAND_REGS_BASE
215 #define CONFIG_SYS_MAX_NAND_DEVICE	1
216 
217 #define CONFIG_MXC_NAND_HWECC
218 #define CONFIG_SYS_NAND_LARGEPAGE
219 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
220 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
221 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
222 #define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
223 						CONFIG_SYS_NAND_PAGE_SIZE
224 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
225 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	11
226 #define NAND_MAX_CHIPS			1
227 
228 #define CONFIG_FLASH_SHOW_PROGRESS	45
229 #define CONFIG_SYS_NAND_QUIET		1
230 
231 /*
232  * Partitions & Filsystems
233  */
234 #define CONFIG_MTD_DEVICE
235 #define CONFIG_MTD_PARTITIONS
236 #define CONFIG_SUPPORT_VFAT
237 
238 /*
239  * Ethernet (on SOC imx FEC)
240  */
241 #define CONFIG_FEC_MXC
242 #define CONFIG_FEC_MXC_PHYADDR		0x1f
243 #define CONFIG_MII				/* MII PHY management	*/
244 
245 /*
246  * FPGA
247  */
248 #ifndef CONFIG_SPL_BUILD
249 #define CONFIG_FPGA
250 #endif
251 #define CONFIG_FPGA_COUNT		1
252 #define CONFIG_FPGA_XILINX
253 #define CONFIG_FPGA_SPARTAN3
254 #define CONFIG_SYS_FPGA_WAIT		250 /* 250 ms */
255 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
256 #define CONFIG_SYS_FPGA_CHECK_CTRLC
257 #define CONFIG_SYS_FPGA_CHECK_ERROR
258 
259 /*
260  * Fuses - IIM
261  */
262 #ifdef CONFIG_CMD_IMX_FUSE
263 #define IIM_MAC_BANK		0
264 #define IIM_MAC_ROW		5
265 #define IIM0_SCC_KEY		11
266 #define IIM1_SUID		1
267 #endif
268 
269 /*
270  * I2C
271  */
272 
273 #ifdef CONFIG_CMD_I2C
274 #define CONFIG_SYS_I2C
275 #define CONFIG_SYS_I2C_MXC
276 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
277 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
278 #define CONFIG_SYS_MXC_I2C1_SPEED	100000	/* 100 kHz */
279 #define CONFIG_SYS_MXC_I2C1_SLAVE	0x7F
280 #define CONFIG_SYS_MXC_I2C2_SPEED	100000	/* 100 kHz */
281 #define CONFIG_SYS_MXC_I2C2_SLAVE	0x7F
282 #define CONFIG_SYS_I2C_NOPROBES		{ }
283 
284 #ifdef CONFIG_CMD_EEPROM
285 # define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM 24LC02 */
286 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1	/* bytes of address */
287 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
288 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* msec */
289 #endif /* CONFIG_CMD_EEPROM */
290 #endif /* CONFIG_CMD_I2C */
291 
292 /*
293  * SD/MMC
294  */
295 #ifdef CONFIG_CMD_MMC
296 #define CONFIG_MXC_MCI_REGS_BASE	0x10014000
297 #endif
298 
299 /*
300  * RTC
301  */
302 #ifdef CONFIG_CMD_DATE
303 #define CONFIG_RTC_DS1374
304 #define CONFIG_SYS_RTC_BUS_NUM		0
305 #endif /* CONFIG_CMD_DATE */
306 
307 /*
308  * PLL
309  *
310  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
311  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
312  */
313 #define CONFIG_MX27_CLK32		32768	/* 32768 or 32000 Hz crystal */
314 
315 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
316 /* micron 64MB */
317 #define PHYS_SDRAM_1_SIZE			0x04000000 /* 64 MB */
318 #define PHYS_SDRAM_2_SIZE			0x04000000 /* 64 MB */
319 #endif
320 
321 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
322 /* micron 128MB */
323 #define PHYS_SDRAM_1_SIZE			0x08000000 /* 128 MB */
324 #define PHYS_SDRAM_2_SIZE			0x08000000 /* 128 MB */
325 #endif
326 
327 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
328 /* micron 256MB */
329 #define PHYS_SDRAM_1_SIZE			0x10000000 /* 256 MB */
330 #define PHYS_SDRAM_2_SIZE			0x10000000 /* 256 MB */
331 #endif
332 
333 #endif /* __CONFIG_H */
334