xref: /rk3399_rockchip-uboot/include/configs/apf27.h (revision 80402f34f8e1f46134a0272ff4d34be64ff7380b)
1bcc05c7aStrem /*
2bcc05c7aStrem  *
3bcc05c7aStrem  * Configuration settings for the Armadeus Project motherboard APF27
4bcc05c7aStrem  *
5bcc05c7aStrem  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6bcc05c7aStrem  *
7bcc05c7aStrem  * SPDX-License-Identifier:    GPL-2.0+
8bcc05c7aStrem  */
9bcc05c7aStrem 
10bcc05c7aStrem #ifndef __CONFIG_H
11bcc05c7aStrem #define __CONFIG_H
12bcc05c7aStrem 
13bcc05c7aStrem #define CONFIG_VERSION_VARIABLE
14bcc05c7aStrem #define CONFIG_ENV_VERSION	10
15bcc05c7aStrem #define CONFIG_IDENT_STRING	" apf27 patch 3.10"
16bcc05c7aStrem #define CONFIG_BOARD_NAME apf27
17bcc05c7aStrem 
18bcc05c7aStrem /*
19bcc05c7aStrem  * SoC configurations
20bcc05c7aStrem  */
215d7b131dSMasahiro Yamada #define CONFIG_MX27			/* This is a Freescale i.MX27 Chip */
22bcc05c7aStrem #define CONFIG_MACH_TYPE	1698	/* APF27 */
23bcc05c7aStrem #define CONFIG_SYS_GENERIC_BOARD
24bcc05c7aStrem 
25bcc05c7aStrem /*
26bcc05c7aStrem  * Enable the call to miscellaneous platform dependent initialization.
27bcc05c7aStrem  */
28ef0f2f57SJoe Hershberger #define CONFIG_SYS_NO_FLASH
29bcc05c7aStrem 
30bcc05c7aStrem /*
31bcc05c7aStrem  * Board display option
32bcc05c7aStrem  */
33bcc05c7aStrem #define CONFIG_DISPLAY_BOARDINFO
34bcc05c7aStrem #define CONFIG_DISPLAY_CPUINFO
35bcc05c7aStrem 
36bcc05c7aStrem /*
37bcc05c7aStrem  * SPL
38bcc05c7aStrem  */
39bcc05c7aStrem #define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
40bcc05c7aStrem #define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
41bcc05c7aStrem #define CONFIG_SPL_MAX_SIZE	2048
42bcc05c7aStrem #define CONFIG_SPL_TEXT_BASE    0xA0000000
43*80402f34SHeiko Schocher #define CONFIG_SPL_SERIAL_SUPPORT
44bcc05c7aStrem 
45bcc05c7aStrem /* NAND boot config */
46bcc05c7aStrem #define CONFIG_SPL_NAND_SUPPORT
47bcc05c7aStrem #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
48bcc05c7aStrem #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
49bcc05c7aStrem #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
50bcc05c7aStrem #define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN - 0x800
51bcc05c7aStrem 
52bcc05c7aStrem /*
53bcc05c7aStrem  * BOOTP options
54bcc05c7aStrem  */
55bcc05c7aStrem #define CONFIG_BOOTP_SUBNETMASK
56bcc05c7aStrem #define CONFIG_BOOTP_GATEWAY
57bcc05c7aStrem #define CONFIG_BOOTP_HOSTNAME
58bcc05c7aStrem #define CONFIG_BOOTP_BOOTPATH
59bcc05c7aStrem #define CONFIG_BOOTP_BOOTFILESIZE
60bcc05c7aStrem #define CONFIG_BOOTP_DNS
61bcc05c7aStrem #define CONFIG_BOOTP_DNS2
62bcc05c7aStrem 
63bcc05c7aStrem #define CONFIG_HOSTNAME	CONFIG_BOARD_NAME
64bcc05c7aStrem #define CONFIG_ROOTPATH	"/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
65bcc05c7aStrem 
66bcc05c7aStrem /*
67bcc05c7aStrem  * U-Boot Commands
68bcc05c7aStrem  */
69bcc05c7aStrem #define CONFIG_CMD_ASKENV	/* ask for env variable		*/
70bcc05c7aStrem #define CONFIG_CMD_BSP		/* Board Specific functions	*/
71bcc05c7aStrem #define CONFIG_CMD_CACHE	/* icache, dcache		*/
72bcc05c7aStrem #define CONFIG_CMD_DATE
73bcc05c7aStrem #define CONFIG_CMD_DHCP		/* DHCP Support			*/
74bcc05c7aStrem #define CONFIG_CMD_DNS
75bcc05c7aStrem #define CONFIG_CMD_EEPROM
76bcc05c7aStrem #define CONFIG_CMD_EXT2
77bcc05c7aStrem #define CONFIG_CMD_FAT		/* FAT support			*/
78bcc05c7aStrem #define CONFIG_CMD_IMX_FUSE	/* imx iim fuse                 */
79bcc05c7aStrem #define CONFIG_CMD_I2C
80bcc05c7aStrem #define CONFIG_CMD_MII		/* MII support			*/
81bcc05c7aStrem #define CONFIG_CMD_MMC
82bcc05c7aStrem #define CONFIG_CMD_MTDPARTS	/* MTD partition support	*/
83bcc05c7aStrem #define CONFIG_CMD_NAND		/* NAND support			*/
84bcc05c7aStrem #define CONFIG_CMD_NAND_LOCK_UNLOCK
85bcc05c7aStrem #define CONFIG_CMD_NAND_TRIMFFS
86bcc05c7aStrem #define CONFIG_CMD_PING		/* ping support			*/
87bcc05c7aStrem #define CONFIG_CMD_UBI
88bcc05c7aStrem #define CONFIG_CMD_UBIFS
89bcc05c7aStrem 
90bcc05c7aStrem /*
91bcc05c7aStrem  * Memory configurations
92bcc05c7aStrem  */
93bcc05c7aStrem #define CONFIG_NR_DRAM_POPULATED 1
94bcc05c7aStrem #define CONFIG_NR_DRAM_BANKS	2
95bcc05c7aStrem 
96bcc05c7aStrem #define ACFG_SDRAM_MBYTE_SYZE 64
97bcc05c7aStrem 
98bcc05c7aStrem #define PHYS_SDRAM_1			0xA0000000
99bcc05c7aStrem #define PHYS_SDRAM_2			0xB0000000
100bcc05c7aStrem #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
101bcc05c7aStrem #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (512<<10))
102bcc05c7aStrem #define CONFIG_SYS_MEMTEST_START	0xA0000000	/* memtest test area  */
103bcc05c7aStrem #define CONFIG_SYS_MEMTEST_END		0xA0300000	/* 3 MiB RAM test */
104bcc05c7aStrem 
105bcc05c7aStrem #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
106bcc05c7aStrem 		+ PHYS_SDRAM_1_SIZE - 0x0100000)
107bcc05c7aStrem 
108bcc05c7aStrem #define CONFIG_SYS_TEXT_BASE		0xA0000800
109bcc05c7aStrem 
110bcc05c7aStrem /*
111bcc05c7aStrem  * FLASH organization
112bcc05c7aStrem  */
113bcc05c7aStrem #define	ACFG_MONITOR_OFFSET		0x00000000
114bcc05c7aStrem #define	CONFIG_SYS_MONITOR_LEN		0x00100000	/* 1MiB */
115bcc05c7aStrem #define CONFIG_ENV_IS_IN_NAND
116bcc05c7aStrem #define	CONFIG_ENV_OVERWRITE
117bcc05c7aStrem #define	CONFIG_ENV_OFFSET		0x00100000	/* NAND offset */
118bcc05c7aStrem #define	CONFIG_ENV_SIZE			0x00020000	/* 128kB  */
119bcc05c7aStrem #define CONFIG_ENV_RANGE		0X00080000	/* 512kB */
120bcc05c7aStrem #define	CONFIG_ENV_OFFSET_REDUND	\
121bcc05c7aStrem 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)	/* +512kB */
122bcc05c7aStrem #define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE	/* 512kB */
123bcc05c7aStrem #define	CONFIG_FIRMWARE_OFFSET		0x00200000
124bcc05c7aStrem #define	CONFIG_FIRMWARE_SIZE		0x00080000	/* 512kB  */
125bcc05c7aStrem #define	CONFIG_KERNEL_OFFSET		0x00300000
126bcc05c7aStrem #define	CONFIG_ROOTFS_OFFSET		0x00800000
127bcc05c7aStrem 
128bcc05c7aStrem #define CONFIG_MTDMAP			"mxc_nand.0"
129bcc05c7aStrem #define MTDIDS_DEFAULT			"nand0=" CONFIG_MTDMAP
130bcc05c7aStrem #define MTDPARTS_DEFAULT	"mtdparts=" CONFIG_MTDMAP \
131bcc05c7aStrem 				":1M(u-boot)ro," \
132bcc05c7aStrem 				"512K(env)," \
133bcc05c7aStrem 				"512K(env2)," \
134bcc05c7aStrem 				"512K(firmware)," \
135bcc05c7aStrem 				"512K(dtb)," \
136bcc05c7aStrem 				"5M(kernel)," \
137bcc05c7aStrem 				"-(rootfs)"
138bcc05c7aStrem 
139bcc05c7aStrem /*
140bcc05c7aStrem  * U-Boot general configurations
141bcc05c7aStrem  */
142bcc05c7aStrem #define CONFIG_SYS_LONGHELP
143bcc05c7aStrem #define CONFIG_SYS_PROMPT		"BIOS> "	/* prompt string */
144bcc05c7aStrem #define CONFIG_SYS_CBSIZE		2048		/* console I/O buffer */
145bcc05c7aStrem #define CONFIG_SYS_PBSIZE		\
146bcc05c7aStrem 				(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
147bcc05c7aStrem 						/* Print buffer size */
148bcc05c7aStrem #define CONFIG_SYS_MAXARGS		16		/* max command args */
149bcc05c7aStrem #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
150bcc05c7aStrem 						/* Boot argument buffer size */
151bcc05c7aStrem #define CONFIG_AUTO_COMPLETE
152bcc05c7aStrem #define CONFIG_CMDLINE_EDITING
153bcc05c7aStrem #define CONFIG_SYS_HUSH_PARSER			/* enable the "hush" shell */
154bcc05c7aStrem #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "	/* secondary prompt string */
155bcc05c7aStrem #define CONFIG_ENV_VARS_UBOOT_CONFIG
156bcc05c7aStrem #define CONFIG_PREBOOT			"run check_flash check_env;"
157bcc05c7aStrem 
158bcc05c7aStrem 
159bcc05c7aStrem /*
160bcc05c7aStrem  * Boot Linux
161bcc05c7aStrem  */
162bcc05c7aStrem #define CONFIG_CMDLINE_TAG		/* send commandline to Kernel	*/
163bcc05c7aStrem #define CONFIG_SETUP_MEMORY_TAGS	/* send memory definition to kernel */
164bcc05c7aStrem #define CONFIG_INITRD_TAG		/* send initrd params	*/
165bcc05c7aStrem 
166bcc05c7aStrem #define CONFIG_OF_LIBFDT
167bcc05c7aStrem 
168bcc05c7aStrem #define CONFIG_BOOTDELAY	5
169bcc05c7aStrem #define CONFIG_ZERO_BOOTDELAY_CHECK
170bcc05c7aStrem #define	CONFIG_BOOTFILE		__stringify(CONFIG_BOARD_NAME) "-linux.bin"
171bcc05c7aStrem #define CONFIG_BOOTARGS		"console=" __stringify(ACFG_CONSOLE_DEV) "," \
172bcc05c7aStrem 			__stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
173bcc05c7aStrem 			" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
174bcc05c7aStrem 
175bcc05c7aStrem #define ACFG_CONSOLE_DEV	ttySMX0
176bcc05c7aStrem #define CONFIG_BOOTCOMMAND	"run ubifsboot"
177bcc05c7aStrem #define CONFIG_SYS_AUTOLOAD	"no"
178bcc05c7aStrem /*
179bcc05c7aStrem  * Default load address for user programs and kernel
180bcc05c7aStrem  */
181bcc05c7aStrem #define CONFIG_LOADADDR			0xA0000000
182bcc05c7aStrem #define	CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
183bcc05c7aStrem 
184bcc05c7aStrem /*
185bcc05c7aStrem  * Extra Environments
186bcc05c7aStrem  */
187bcc05c7aStrem #define CONFIG_EXTRA_ENV_SETTINGS \
188bcc05c7aStrem 	"env_version="		__stringify(CONFIG_ENV_VERSION)		"\0" \
189bcc05c7aStrem 	"consoledev="		__stringify(ACFG_CONSOLE_DEV)		"\0" \
190bcc05c7aStrem 	"mtdparts="		MTDPARTS_DEFAULT			"\0" \
191bcc05c7aStrem 	"partition=nand0,6\0"						\
192bcc05c7aStrem 	"u-boot_addr="		__stringify(ACFG_MONITOR_OFFSET)	"\0" \
193bcc05c7aStrem 	"env_addr="		__stringify(CONFIG_ENV_OFFSET)		"\0" \
194bcc05c7aStrem 	"firmware_addr="	__stringify(CONFIG_FIRMWARE_OFFSET)	"\0" \
195bcc05c7aStrem 	"firmware_size="	__stringify(CONFIG_FIRMWARE_SIZE)	"\0" \
196bcc05c7aStrem 	"kernel_addr="		__stringify(CONFIG_KERNEL_OFFSET)	"\0" \
197bcc05c7aStrem 	"rootfs_addr="		__stringify(CONFIG_ROOTFS_OFFSET)	"\0" \
198bcc05c7aStrem 	"board_name="		__stringify(CONFIG_BOARD_NAME)		"\0" \
199bcc05c7aStrem 	"kernel_addr_r=A0000000\0" \
200bcc05c7aStrem 	"check_env=if test -n ${flash_env_version}; "			\
201bcc05c7aStrem 		"then env default env_version; "			\
202bcc05c7aStrem 		"else env set flash_env_version ${env_version}; env save; "\
203bcc05c7aStrem 		"fi; "							\
204bcc05c7aStrem 		"if itest ${flash_env_version} < ${env_version}; then " \
205bcc05c7aStrem 			"echo \"*** Warning - Environment version"	\
206bcc05c7aStrem 			" change suggests: run flash_reset_env; reset\"; "\
207bcc05c7aStrem 			"env default flash_reset_env; "\
208bcc05c7aStrem 		"fi; \0"						\
209bcc05c7aStrem 	"check_flash=nand lock; nand unlock ${env_addr}; \0"	\
210bcc05c7aStrem 	"flash_reset_env=env default -f -a; saveenv; run update_env;"	\
211bcc05c7aStrem 		"echo Flash environment variables erased!\0"		\
212bcc05c7aStrem 	"download_uboot=tftpboot ${loadaddr} ${board_name}"		\
213bcc05c7aStrem 		"-u-boot-with-spl.bin\0"				\
214bcc05c7aStrem 	"flash_uboot=nand unlock ${u-boot_addr} ;"			\
215bcc05c7aStrem 		"nand erase.part u-boot;"		\
216bcc05c7aStrem 		"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
217bcc05c7aStrem 			"then nand lock; nand unlock ${env_addr};"	\
218bcc05c7aStrem 				"echo Flashing of uboot succeed;"	\
219bcc05c7aStrem 			"else echo Flashing of uboot failed;"		\
220bcc05c7aStrem 		"fi; \0"						\
221bcc05c7aStrem 	"update_uboot=run download_uboot flash_uboot\0"			\
222bcc05c7aStrem 	"download_env=tftpboot ${loadaddr} ${board_name}"		\
223bcc05c7aStrem 		"-u-boot-env.txt\0"				\
224bcc05c7aStrem 	"flash_env=env import -t ${loadaddr}; env save; \0"		\
225bcc05c7aStrem 	"update_env=run download_env flash_env\0"			\
226bcc05c7aStrem 	"update_all=run update_env update_uboot\0"			\
227bcc05c7aStrem 	"unlock_regs=mw 10000008 0; mw 10020008 0\0"			\
228bcc05c7aStrem 
229bcc05c7aStrem /*
230bcc05c7aStrem  * Serial Driver
231bcc05c7aStrem  */
232bcc05c7aStrem #define CONFIG_MXC_UART
233bcc05c7aStrem #define CONFIG_CONS_INDEX		1
234bcc05c7aStrem #define CONFIG_BAUDRATE			115200
235bcc05c7aStrem #define CONFIG_MXC_UART_BASE		UART1_BASE
236bcc05c7aStrem 
237bcc05c7aStrem /*
238bcc05c7aStrem  * GPIO
239bcc05c7aStrem  */
240bcc05c7aStrem #define CONFIG_MXC_GPIO
241bcc05c7aStrem 
242bcc05c7aStrem /*
243bcc05c7aStrem  * NOR
244bcc05c7aStrem  */
245bcc05c7aStrem 
246bcc05c7aStrem /*
247bcc05c7aStrem  * NAND
248bcc05c7aStrem  */
249bcc05c7aStrem #define CONFIG_NAND_MXC
250bcc05c7aStrem 
251bcc05c7aStrem #define CONFIG_MXC_NAND_REGS_BASE	0xD8000000
252bcc05c7aStrem #define CONFIG_SYS_NAND_BASE		CONFIG_MXC_NAND_REGS_BASE
253bcc05c7aStrem #define CONFIG_SYS_MAX_NAND_DEVICE	1
254bcc05c7aStrem 
255bcc05c7aStrem #define CONFIG_MXC_NAND_HWECC
256bcc05c7aStrem #define CONFIG_SYS_NAND_LARGEPAGE
257bcc05c7aStrem #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
258bcc05c7aStrem #define CONFIG_SYS_NAND_PAGE_SIZE	2048
259bcc05c7aStrem #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
260bcc05c7aStrem #define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
261bcc05c7aStrem 						CONFIG_SYS_NAND_PAGE_SIZE
262bcc05c7aStrem #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
263bcc05c7aStrem #define CONFIG_SYS_NAND_BAD_BLOCK_POS	11
264bcc05c7aStrem #define NAND_MAX_CHIPS			1
265bcc05c7aStrem 
266bcc05c7aStrem #define CONFIG_FLASH_SHOW_PROGRESS	45
267bcc05c7aStrem #define CONFIG_SYS_NAND_QUIET		1
268bcc05c7aStrem 
269bcc05c7aStrem /*
270bcc05c7aStrem  * Partitions & Filsystems
271bcc05c7aStrem  */
272bcc05c7aStrem #define CONFIG_MTD_DEVICE
273bcc05c7aStrem #define CONFIG_MTD_PARTITIONS
274bcc05c7aStrem #define CONFIG_DOS_PARTITION
275bcc05c7aStrem #define CONFIG_SUPPORT_VFAT
276bcc05c7aStrem 
277bcc05c7aStrem /*
278bcc05c7aStrem  * UBIFS
279bcc05c7aStrem  */
280bcc05c7aStrem #define CONFIG_RBTREE
281bcc05c7aStrem #define CONFIG_LZO
282bcc05c7aStrem 
283bcc05c7aStrem /*
284bcc05c7aStrem  * Ethernet (on SOC imx FEC)
285bcc05c7aStrem  */
286bcc05c7aStrem #define CONFIG_FEC_MXC
287bcc05c7aStrem #define CONFIG_FEC_MXC_PHYADDR		0x1f
288bcc05c7aStrem #define CONFIG_MII				/* MII PHY management	*/
289bcc05c7aStrem 
290bcc05c7aStrem /*
291b5e7f1bcStrem  * FPGA
292b5e7f1bcStrem  */
293b5e7f1bcStrem #ifndef CONFIG_SPL_BUILD
294b5e7f1bcStrem #define CONFIG_FPGA
295b5e7f1bcStrem #endif
296b5e7f1bcStrem #define CONFIG_FPGA_COUNT		1
297b5e7f1bcStrem #define CONFIG_FPGA_XILINX
298b5e7f1bcStrem #define CONFIG_FPGA_SPARTAN3
299b5e7f1bcStrem #define CONFIG_SYS_FPGA_WAIT		250 /* 250 ms */
300b5e7f1bcStrem #define CONFIG_SYS_FPGA_PROG_FEEDBACK
301b5e7f1bcStrem #define CONFIG_SYS_FPGA_CHECK_CTRLC
302b5e7f1bcStrem #define CONFIG_SYS_FPGA_CHECK_ERROR
303b5e7f1bcStrem 
304b5e7f1bcStrem /*
305bcc05c7aStrem  * Fuses - IIM
306bcc05c7aStrem  */
307bcc05c7aStrem #ifdef CONFIG_CMD_IMX_FUSE
308bcc05c7aStrem #define IIM_MAC_BANK		0
309bcc05c7aStrem #define IIM_MAC_ROW		5
310bcc05c7aStrem #define IIM0_SCC_KEY		11
311bcc05c7aStrem #define IIM1_SUID		1
312bcc05c7aStrem #endif
313bcc05c7aStrem 
314bcc05c7aStrem /*
315bcc05c7aStrem  * I2C
316bcc05c7aStrem  */
317bcc05c7aStrem 
318bcc05c7aStrem #ifdef CONFIG_CMD_I2C
319b089d039Strem #define CONFIG_SYS_I2C
320b089d039Strem #define CONFIG_SYS_I2C_MXC
321b089d039Strem #define CONFIG_SYS_MXC_I2C1_SPEED	100000	/* 100 kHz */
322b089d039Strem #define CONFIG_SYS_MXC_I2C1_SLAVE	0x7F
323b089d039Strem #define CONFIG_SYS_MXC_I2C2_SPEED	100000	/* 100 kHz */
324b089d039Strem #define CONFIG_SYS_MXC_I2C2_SLAVE	0x7F
325bcc05c7aStrem #define CONFIG_SYS_I2C_NOPROBES		{ }
326bcc05c7aStrem 
327bcc05c7aStrem #ifdef CONFIG_CMD_EEPROM
328bcc05c7aStrem # define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM 24LC02 */
329bcc05c7aStrem # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1	/* bytes of address */
330bcc05c7aStrem #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
331bcc05c7aStrem #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* msec */
332bcc05c7aStrem #endif /* CONFIG_CMD_EEPROM */
333bcc05c7aStrem #endif /* CONFIG_CMD_I2C */
334bcc05c7aStrem 
335bcc05c7aStrem /*
336bcc05c7aStrem  * SD/MMC
337bcc05c7aStrem  */
338bcc05c7aStrem #ifdef CONFIG_CMD_MMC
339bcc05c7aStrem #define CONFIG_MMC
340bcc05c7aStrem #define CONFIG_GENERIC_MMC
341bcc05c7aStrem #define CONFIG_MXC_MMC
342bcc05c7aStrem #define CONFIG_MXC_MCI_REGS_BASE	0x10014000
343bcc05c7aStrem #endif
344bcc05c7aStrem 
345bcc05c7aStrem /*
346bcc05c7aStrem  * RTC
347bcc05c7aStrem  */
348bcc05c7aStrem #ifdef CONFIG_CMD_DATE
349bcc05c7aStrem #define CONFIG_RTC_DS1374
350bcc05c7aStrem #define CONFIG_SYS_RTC_BUS_NUM		0
351bcc05c7aStrem #endif /* CONFIG_CMD_DATE */
352bcc05c7aStrem 
353bcc05c7aStrem /*
354bcc05c7aStrem  * PLL
355bcc05c7aStrem  *
356bcc05c7aStrem  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
357bcc05c7aStrem  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
358bcc05c7aStrem  */
359bcc05c7aStrem #define CONFIG_MX27_CLK32		32768	/* 32768 or 32000 Hz crystal */
360bcc05c7aStrem 
361bcc05c7aStrem #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
362bcc05c7aStrem /* micron 64MB */
363bcc05c7aStrem #define PHYS_SDRAM_1_SIZE			0x04000000 /* 64 MB */
364bcc05c7aStrem #define PHYS_SDRAM_2_SIZE			0x04000000 /* 64 MB */
365bcc05c7aStrem #endif
366bcc05c7aStrem 
367bcc05c7aStrem #if (ACFG_SDRAM_MBYTE_SYZE == 128)
368bcc05c7aStrem /* micron 128MB */
369bcc05c7aStrem #define PHYS_SDRAM_1_SIZE			0x08000000 /* 128 MB */
370bcc05c7aStrem #define PHYS_SDRAM_2_SIZE			0x08000000 /* 128 MB */
371bcc05c7aStrem #endif
372bcc05c7aStrem 
373bcc05c7aStrem #if (ACFG_SDRAM_MBYTE_SYZE == 256)
374bcc05c7aStrem /* micron 256MB */
375bcc05c7aStrem #define PHYS_SDRAM_1_SIZE			0x10000000 /* 256 MB */
376bcc05c7aStrem #define PHYS_SDRAM_2_SIZE			0x10000000 /* 256 MB */
377bcc05c7aStrem #endif
378bcc05c7aStrem 
379bcc05c7aStrem #endif /* __CONFIG_H */
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