1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #undef DEBUG 13 #define CONFIG_SH4 1 14 #define CONFIG_SH4A 1 15 #define CONFIG_CPU_SH7734 1 16 #define CONFIG_AP_SH4A_4A 1 17 #define CONFIG_400MHZ_MODE 1 18 /* #define CONFIG_533MHZ_MODE 1 */ 19 20 #define CONFIG_BOARD_LATE_INIT 21 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 22 23 #define CONFIG_CMD_FLASH 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_NET 26 #define CONFIG_CMD_PING 27 #define CONFIG_CMD_MII 28 #define CONFIG_CMD_NFS 29 #define CONFIG_CMD_SDRAM 30 #define CONFIG_CMD_ENV 31 #define CONFIG_CMD_SAVEENV 32 33 #define CONFIG_BAUDRATE 115200 34 #define CONFIG_BOOTDELAY 3 35 #define CONFIG_BOOTARGS "console=ttySC4,115200" 36 37 #define CONFIG_VERSION_VARIABLE 38 #undef CONFIG_SHOW_BOOT_PROGRESS 39 40 /* Ether */ 41 #define CONFIG_SH_ETHER 1 42 #define CONFIG_SH_ETHER_USE_PORT (0) 43 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 44 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 45 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 46 #define CONFIG_PHYLIB 47 #define CONFIG_PHY_MICREL 1 48 #define CONFIG_BITBANGMII 49 #define CONFIG_BITBANGMII_MULTI 50 51 /* I2C */ 52 #define CONFIG_CMD_I2C 53 #define CONFIG_SH_SH7734_I2C 1 54 #define CONFIG_HARD_I2C 1 55 #define CONFIG_I2C_MULTI_BUS 1 56 #define CONFIG_SYS_MAX_I2C_BUS 2 57 #define CONFIG_SYS_I2C_MODULE 0 58 #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 59 #define CONFIG_SYS_I2C_SLAVE 0x50 60 #define CONFIG_SH_I2C_DATA_HIGH 4 61 #define CONFIG_SH_I2C_DATA_LOW 5 62 #define CONFIG_SH_I2C_CLOCK 500000000 63 #define CONFIG_SH_I2C_BASE0 0xFFC70000 64 #define CONFIG_SH_I2C_BASE1 0xFFC71000 65 66 /* undef to save memory */ 67 #define CONFIG_SYS_LONGHELP 68 /* Monitor Command Prompt */ 69 /* Buffer size for input from the Console */ 70 #define CONFIG_SYS_CBSIZE 256 71 /* Buffer size for Console output */ 72 #define CONFIG_SYS_PBSIZE 256 73 /* max args accepted for monitor commands */ 74 #define CONFIG_SYS_MAXARGS 16 75 /* Buffer size for Boot Arguments passed to kernel */ 76 #define CONFIG_SYS_BARGSIZE 512 77 /* List of legal baudrate settings for this board */ 78 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 79 80 /* SCIF */ 81 #define CONFIG_SCIF_CONSOLE 1 82 #define CONFIG_SCIF 1 83 #define CONFIG_CONS_SCIF4 1 84 85 /* Suppress display of console information at boot */ 86 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 87 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 88 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 89 90 /* SDRAM */ 91 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 92 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 93 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 94 95 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 96 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 97 /* Enable alternate, more extensive, memory test */ 98 #undef CONFIG_SYS_ALT_MEMTEST 99 /* Scratch address used by the alternate memory test */ 100 #undef CONFIG_SYS_MEMTEST_SCRATCH 101 102 /* Enable temporary baudrate change while serial download */ 103 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 104 105 /* FLASH */ 106 #define CONFIG_FLASH_CFI_DRIVER 1 107 #define CONFIG_SYS_FLASH_CFI 108 #undef CONFIG_SYS_FLASH_QUIET_TEST 109 #define CONFIG_SYS_FLASH_EMPTY_INFO 110 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 111 #define CONFIG_SYS_MAX_FLASH_SECT 512 112 113 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 114 #define CONFIG_SYS_MAX_FLASH_BANKS 1 115 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 116 117 /* Timeout for Flash erase operations (in ms) */ 118 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 119 /* Timeout for Flash write operations (in ms) */ 120 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 121 /* Timeout for Flash set sector lock bit operations (in ms) */ 122 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 123 /* Timeout for Flash clear lock bit operations (in ms) */ 124 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 125 126 /* 127 * Use hardware flash sectors protection instead 128 * of U-Boot software protection 129 */ 130 #undef CONFIG_SYS_FLASH_PROTECTION 131 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 132 133 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 134 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 135 /* Monitor size */ 136 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 137 /* Size of DRAM reserved for malloc() use */ 138 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 139 /* size in bytes reserved for initial data */ 140 #define CONFIG_SYS_GBL_DATA_SIZE (256) 141 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 142 143 /* ENV setting */ 144 #define CONFIG_ENV_IS_IN_FLASH 145 #define CONFIG_ENV_OVERWRITE 1 146 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 147 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 148 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 149 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 150 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 151 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 152 153 /* Board Clock */ 154 #if defined(CONFIG_400MHZ_MODE) 155 #define CONFIG_SYS_CLK_FREQ 50000000 156 #else 157 #define CONFIG_SYS_CLK_FREQ 44444444 158 #endif 159 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 160 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 161 #define CONFIG_SYS_TMU_CLK_DIV 4 162 163 #endif /* __AP_SH4A_4A_H */ 164