1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_AP_SH4A_4A 1 14 #define CONFIG_400MHZ_MODE 1 15 /* #define CONFIG_533MHZ_MODE 1 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 18 19 #define CONFIG_CMD_SDRAM 20 21 #define CONFIG_BOOTARGS "console=ttySC4,115200" 22 23 #define CONFIG_DISPLAY_BOARDINFO 24 #undef CONFIG_SHOW_BOOT_PROGRESS 25 26 /* Ether */ 27 #define CONFIG_SH_ETHER 1 28 #define CONFIG_SH_ETHER_USE_PORT (0) 29 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 30 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 31 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 32 #define CONFIG_PHY_MICREL 1 33 #define CONFIG_BITBANGMII 34 #define CONFIG_BITBANGMII_MULTI 35 36 /* undef to save memory */ 37 #define CONFIG_SYS_LONGHELP 38 /* Monitor Command Prompt */ 39 /* Buffer size for input from the Console */ 40 #define CONFIG_SYS_CBSIZE 256 41 /* Buffer size for Console output */ 42 #define CONFIG_SYS_PBSIZE 256 43 /* max args accepted for monitor commands */ 44 #define CONFIG_SYS_MAXARGS 16 45 /* Buffer size for Boot Arguments passed to kernel */ 46 #define CONFIG_SYS_BARGSIZE 512 47 /* List of legal baudrate settings for this board */ 48 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 49 50 /* SCIF */ 51 #define CONFIG_SCIF 1 52 #define CONFIG_CONS_SCIF4 1 53 54 /* Suppress display of console information at boot */ 55 56 /* SDRAM */ 57 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 58 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 59 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 60 61 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 62 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 63 /* Enable alternate, more extensive, memory test */ 64 #undef CONFIG_SYS_ALT_MEMTEST 65 /* Scratch address used by the alternate memory test */ 66 #undef CONFIG_SYS_MEMTEST_SCRATCH 67 68 /* Enable temporary baudrate change while serial download */ 69 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 70 71 /* FLASH */ 72 #define CONFIG_FLASH_CFI_DRIVER 1 73 #define CONFIG_SYS_FLASH_CFI 74 #undef CONFIG_SYS_FLASH_QUIET_TEST 75 #define CONFIG_SYS_FLASH_EMPTY_INFO 76 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 77 #define CONFIG_SYS_MAX_FLASH_SECT 512 78 79 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 80 #define CONFIG_SYS_MAX_FLASH_BANKS 1 81 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 82 83 /* Timeout for Flash erase operations (in ms) */ 84 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 85 /* Timeout for Flash write operations (in ms) */ 86 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 87 /* Timeout for Flash set sector lock bit operations (in ms) */ 88 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 89 /* Timeout for Flash clear lock bit operations (in ms) */ 90 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 91 92 /* 93 * Use hardware flash sectors protection instead 94 * of U-Boot software protection 95 */ 96 #undef CONFIG_SYS_FLASH_PROTECTION 97 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 98 99 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 100 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 101 /* Monitor size */ 102 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 103 /* Size of DRAM reserved for malloc() use */ 104 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 105 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 106 107 /* ENV setting */ 108 #define CONFIG_ENV_OVERWRITE 1 109 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 110 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 111 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 112 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 113 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 114 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 115 116 /* Board Clock */ 117 #if defined(CONFIG_400MHZ_MODE) 118 #define CONFIG_SYS_CLK_FREQ 50000000 119 #else 120 #define CONFIG_SYS_CLK_FREQ 44444444 121 #endif 122 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 123 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 124 #define CONFIG_SYS_TMU_CLK_DIV 4 125 126 #endif /* __AP_SH4A_4A_H */ 127