1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #undef DEBUG 14 #define CONFIG_CPU_SH7723 1 15 #define CONFIG_AP325RXA 1 16 17 #define CONFIG_CMD_SDRAM 18 #define CONFIG_CMD_IDE 19 #define CONFIG_DOS_PARTITION 20 21 #define CONFIG_BAUDRATE 38400 22 #define CONFIG_BOOTARGS "console=ttySC2,38400" 23 24 #undef CONFIG_SHOW_BOOT_PROGRESS 25 26 /* SMC9118 */ 27 #define CONFIG_SMC911X 1 28 #define CONFIG_SMC911X_32_BIT 1 29 #define CONFIG_SMC911X_BASE 0xB6080000 30 31 /* MEMORY */ 32 #define AP325RXA_SDRAM_BASE (0x88000000) 33 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 34 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 35 36 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 37 38 /* undef to save memory */ 39 #define CONFIG_SYS_LONGHELP 40 /* Monitor Command Prompt */ 41 /* Buffer size for input from the Console */ 42 #define CONFIG_SYS_CBSIZE 256 43 /* Buffer size for Console output */ 44 #define CONFIG_SYS_PBSIZE 256 45 /* max args accepted for monitor commands */ 46 #define CONFIG_SYS_MAXARGS 16 47 /* Buffer size for Boot Arguments passed to kernel */ 48 #define CONFIG_SYS_BARGSIZE 512 49 /* List of legal baudrate settings for this board */ 50 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 51 52 /* SCIF */ 53 #define CONFIG_SCIF_CONSOLE 1 54 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 55 #define CONFIG_CONS_SCIF5 1 56 57 /* Suppress display of console information at boot */ 58 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 59 60 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 61 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 62 63 /* Enable alternate, more extensive, memory test */ 64 #undef CONFIG_SYS_ALT_MEMTEST 65 /* Scratch address used by the alternate memory test */ 66 #undef CONFIG_SYS_MEMTEST_SCRATCH 67 68 /* Enable temporary baudrate change while serial download */ 69 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 70 71 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 72 /* maybe more, but if so u-boot doesn't know about it... */ 73 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 74 /* default load address for scripts ?!? */ 75 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 76 77 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 78 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 79 /* Monitor size */ 80 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 81 /* Size of DRAM reserved for malloc() use */ 82 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 83 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 84 85 /* FLASH */ 86 #define CONFIG_FLASH_CFI_DRIVER 1 87 #define CONFIG_SYS_FLASH_CFI 88 #undef CONFIG_SYS_FLASH_QUIET_TEST 89 /* print 'E' for empty sector on flinfo */ 90 #define CONFIG_SYS_FLASH_EMPTY_INFO 91 /* Physical start address of Flash memory */ 92 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 93 /* Max number of sectors on each Flash chip */ 94 #define CONFIG_SYS_MAX_FLASH_SECT 512 95 96 /* 97 * IDE support 98 */ 99 #define CONFIG_IDE_RESET 1 100 #define CONFIG_SYS_PIO_MODE 1 101 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 102 #define CONFIG_SYS_IDE_MAXDEVICE 1 103 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 104 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 105 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 106 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 107 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 108 #define CONFIG_IDE_SWAP_IO 109 110 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 111 #define CONFIG_SYS_MAX_FLASH_BANKS 1 112 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 113 114 /* Timeout for Flash erase operations (in ms) */ 115 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 116 /* Timeout for Flash write operations (in ms) */ 117 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 118 /* Timeout for Flash set sector lock bit operations (in ms) */ 119 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 120 /* Timeout for Flash clear lock bit operations (in ms) */ 121 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 122 123 /* 124 * Use hardware flash sectors protection instead 125 * of U-Boot software protection 126 */ 127 #undef CONFIG_SYS_FLASH_PROTECTION 128 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 129 130 /* ENV setting */ 131 #define CONFIG_ENV_IS_IN_FLASH 132 #define CONFIG_ENV_OVERWRITE 1 133 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 134 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 135 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 136 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 137 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 138 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 139 140 /* Board Clock */ 141 #define CONFIG_SYS_CLK_FREQ 33333333 142 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 143 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 144 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 145 146 #endif /* __AP325RXA_H */ 147