1ed01e45cSVaibhav Hiremath /* 2ed01e45cSVaibhav Hiremath * am3517_evm.h - Default configuration for AM3517 EVM board. 3ed01e45cSVaibhav Hiremath * 4ed01e45cSVaibhav Hiremath * Author: Vaibhav Hiremath <hvaibhav@ti.com> 5ed01e45cSVaibhav Hiremath * 6ed01e45cSVaibhav Hiremath * Based on omap3_evm_config.h 7ed01e45cSVaibhav Hiremath * 8ed01e45cSVaibhav Hiremath * Copyright (C) 2010 Texas Instruments Incorporated 9ed01e45cSVaibhav Hiremath * 101a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 11ed01e45cSVaibhav Hiremath */ 12ed01e45cSVaibhav Hiremath 13ed01e45cSVaibhav Hiremath #ifndef __CONFIG_H 14ed01e45cSVaibhav Hiremath #define __CONFIG_H 15ed01e45cSVaibhav Hiremath 163f53e619SDerald D. Woods /* High Level Configuration Options */ 173f53e619SDerald D. Woods 183f53e619SDerald D. Woods #define CONFIG_OMAP 193f53e619SDerald D. Woods #define CONFIG_OMAP_COMMON 203f53e619SDerald D. Woods 213f53e619SDerald D. Woods #define CONFIG_SYS_NO_FLASH 223f53e619SDerald D. Woods 233f53e619SDerald D. Woods #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 243f53e619SDerald D. Woods 25c6f90e14SNishanth Menon /* Common ARM Erratas */ 26c6f90e14SNishanth Menon #define CONFIG_ARM_ERRATA_454179 27c6f90e14SNishanth Menon #define CONFIG_ARM_ERRATA_430973 28c6f90e14SNishanth Menon #define CONFIG_ARM_ERRATA_621766 29ed01e45cSVaibhav Hiremath 301a5038caSVaibhav Hiremath #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 31ed01e45cSVaibhav Hiremath 323f53e619SDerald D. Woods /* 333f53e619SDerald D. Woods * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 343f53e619SDerald D. Woods * 64 bytes before this address should be set aside for u-boot.img's 353f53e619SDerald D. Woods * header. That is 0x800FFFC0--0x80100000 should not be used for any 363f53e619SDerald D. Woods * other needs. 373f53e619SDerald D. Woods */ 383f53e619SDerald D. Woods #define CONFIG_SYS_TEXT_BASE 0x80100000 393f53e619SDerald D. Woods #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 403f53e619SDerald D. Woods #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 413f53e619SDerald D. Woods 42ed01e45cSVaibhav Hiremath #include <asm/arch/cpu.h> /* get chip and board defs */ 43987ec585SNishanth Menon #include <asm/arch/omap.h> 44ed01e45cSVaibhav Hiremath 453f53e619SDerald D. Woods /* Display CPU and Board information */ 463f53e619SDerald D. Woods #define CONFIG_DISPLAY_CPUINFO 473f53e619SDerald D. Woods #define CONFIG_DISPLAY_BOARDINFO 483f53e619SDerald D. Woods #define CONFIG_MISC_INIT_R 493f53e619SDerald D. Woods #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 503f53e619SDerald D. Woods #define CONFIG_SETUP_MEMORY_TAGS 513f53e619SDerald D. Woods #define CONFIG_INITRD_TAG 523f53e619SDerald D. Woods #define CONFIG_REVISION_TAG 53ed01e45cSVaibhav Hiremath 54ed01e45cSVaibhav Hiremath /* Clock Defines */ 55ed01e45cSVaibhav Hiremath #define V_OSCK 26000000 /* Clock output from T2 */ 56ed01e45cSVaibhav Hiremath #define V_SCLK (V_OSCK >> 1) 57ed01e45cSVaibhav Hiremath 583f53e619SDerald D. Woods /* Size of malloc() pool */ 593f53e619SDerald D. Woods #define CONFIG_SYS_MALLOC_LEN (16 << 20) 60ed01e45cSVaibhav Hiremath 613f53e619SDerald D. Woods /* Hardware drivers */ 620a0db402SYegor Yefremov 633f53e619SDerald D. Woods /* OMAP GPIO configuration */ 646a1df373SYegor Yefremov #define CONFIG_OMAP_GPIO 656a1df373SYegor Yefremov 663f53e619SDerald D. Woods /* NS16550 Configuration */ 67ed01e45cSVaibhav Hiremath #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 68ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NS16550_SERIAL 69ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NS16550_REG_SIZE (-4) 70ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 71ed01e45cSVaibhav Hiremath 723f53e619SDerald D. Woods /* select serial console configuration */ 73ed01e45cSVaibhav Hiremath #define CONFIG_CONS_INDEX 3 74ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 75ed01e45cSVaibhav Hiremath #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ 76ed01e45cSVaibhav Hiremath 77ed01e45cSVaibhav Hiremath /* allow to overwrite serial and ethaddr */ 78ed01e45cSVaibhav Hiremath #define CONFIG_ENV_OVERWRITE 79ed01e45cSVaibhav Hiremath #define CONFIG_BAUDRATE 115200 80ed01e45cSVaibhav Hiremath #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 81ed01e45cSVaibhav Hiremath 115200} 823f53e619SDerald D. Woods 833f53e619SDerald D. Woods /* SD/MMC */ 843f53e619SDerald D. Woods #define CONFIG_MMC 853f53e619SDerald D. Woods #define CONFIG_GENERIC_MMC 863f53e619SDerald D. Woods #define CONFIG_OMAP_HSMMC 873f53e619SDerald D. Woods #define CONFIG_DOS_PARTITION 88ed01e45cSVaibhav Hiremath 897dc27b05SAjay Kumar Gupta /* 907dc27b05SAjay Kumar Gupta * USB configuration 9195de1e2fSPaul Kocialkowski * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard 9295de1e2fSPaul Kocialkowski * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. 937dc27b05SAjay Kumar Gupta */ 9488919ff7SIlya Yanok #define CONFIG_USB_MUSB_AM35X 9595de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 967dc27b05SAjay Kumar Gupta 9788919ff7SIlya Yanok #ifdef CONFIG_USB_MUSB_AM35X 987dc27b05SAjay Kumar Gupta 9995de1e2fSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_HOST 1007dc27b05SAjay Kumar Gupta 1017dc27b05SAjay Kumar Gupta #define CONFIG_USB_STORAGE 1027dc27b05SAjay Kumar Gupta #define CONGIG_CMD_STORAGE 1037dc27b05SAjay Kumar Gupta 1047dc27b05SAjay Kumar Gupta #ifdef CONFIG_USB_KEYBOARD 1057dc27b05SAjay Kumar Gupta #define CONFIG_SYS_USB_EVENT_POLL 1067dc27b05SAjay Kumar Gupta #define CONFIG_PREBOOT "usb start" 1077dc27b05SAjay Kumar Gupta #endif /* CONFIG_USB_KEYBOARD */ 1087dc27b05SAjay Kumar Gupta 10995de1e2fSPaul Kocialkowski #endif /* CONFIG_USB_MUSB_HOST */ 1107dc27b05SAjay Kumar Gupta 11195de1e2fSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 11288919ff7SIlya Yanok #define CONFIG_USB_ETHER 11388919ff7SIlya Yanok #define CONFIG_USB_ETH_RNDIS 11495de1e2fSPaul Kocialkowski #endif /* CONFIG_USB_MUSB_GADGET */ 1157dc27b05SAjay Kumar Gupta 11688919ff7SIlya Yanok #endif /* CONFIG_USB_MUSB_AM35X */ 1177dc27b05SAjay Kumar Gupta 118ed01e45cSVaibhav Hiremath /* commands to include */ 1193f53e619SDerald D. Woods #define CONFIG_CMD_NAND 1203f53e619SDerald D. Woods #define CONFIG_CMD_PART 1213f53e619SDerald D. Woods #define CONFIG_CMD_MTDPARTS 122ed01e45cSVaibhav Hiremath 1233f53e619SDerald D. Woods /* I2C */ 1246789e84eSHeiko Schocher #define CONFIG_SYS_I2C 1256789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 1266789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 1276789e84eSHeiko Schocher #define CONFIG_SYS_I2C_OMAP34XX 128ed01e45cSVaibhav Hiremath 1293f53e619SDerald D. Woods /* Ethernet */ 13018a02e80STom Rini #define CONFIG_DRIVER_TI_EMAC 13118a02e80STom Rini #define CONFIG_DRIVER_TI_EMAC_USE_RMII 13218a02e80STom Rini #define CONFIG_MII 13318a02e80STom Rini #define CONFIG_BOOTP_DEFAULT 13418a02e80STom Rini #define CONFIG_BOOTP_DNS 13518a02e80STom Rini #define CONFIG_BOOTP_DNS2 13618a02e80STom Rini #define CONFIG_BOOTP_SEND_HOSTNAME 13718a02e80STom Rini #define CONFIG_NET_RETRY_COUNT 10 13818a02e80STom Rini 1393f53e619SDerald D. Woods /* Board NAND Info. */ 1403f53e619SDerald D. Woods #ifdef CONFIG_NAND 1413f53e619SDerald D. Woods #define CONFIG_NAND_OMAP_GPMC 1423f53e619SDerald D. Woods #define CONFIG_NAND_OMAP_GPMC_PREFETCH 1433f53e619SDerald D. Woods #define CONFIG_BCH 1443f53e619SDerald D. Woods #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ 1453f53e619SDerald D. Woods #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 1463f53e619SDerald D. Woods #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 1473f53e619SDerald D. Woods #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 148ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 149ed01e45cSVaibhav Hiremath /* to access nand */ 150ed01e45cSVaibhav Hiremath #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 151ed01e45cSVaibhav Hiremath /* to access */ 152ed01e45cSVaibhav Hiremath /* nand at CS0 */ 153ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 154ed01e45cSVaibhav Hiremath /* NAND devices */ 1553f53e619SDerald D. Woods #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 1563f53e619SDerald D. Woods #define CONFIG_SYS_NAND_5_ADDR_CYCLE 1573f53e619SDerald D. Woods #define CONFIG_SYS_NAND_PAGE_COUNT 64 1583f53e619SDerald D. Woods #define CONFIG_SYS_NAND_PAGE_SIZE 2048 1593f53e619SDerald D. Woods #define CONFIG_SYS_NAND_OOBSIZE 64 1603f53e619SDerald D. Woods #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 1613f53e619SDerald D. Woods #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 1623f53e619SDerald D. Woods #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 1633f53e619SDerald D. Woods 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 1643f53e619SDerald D. Woods 21, 22, 23, 24, 25, 26, 27, 28, 30, \ 1653f53e619SDerald D. Woods 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 1663f53e619SDerald D. Woods 40, 41, 42, 44, 45, 46, 47, 48, 49, \ 1673f53e619SDerald D. Woods 50, 51, 52, 53, 54, 55, 56 } 1683f53e619SDerald D. Woods 1693f53e619SDerald D. Woods #define CONFIG_SYS_NAND_ECCSIZE 512 1703f53e619SDerald D. Woods #define CONFIG_SYS_NAND_ECCBYTES 13 1713f53e619SDerald D. Woods #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 1723f53e619SDerald D. Woods #define CONFIG_SYS_NAND_MAX_OOBFREE 2 1733f53e619SDerald D. Woods #define CONFIG_SYS_NAND_MAX_ECCPOS 56 1743f53e619SDerald D. Woods #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 1753f53e619SDerald D. Woods #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 1763f53e619SDerald D. Woods #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 1773f53e619SDerald D. Woods #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 1783f53e619SDerald D. Woods /* NAND block size is 128 KiB. Synchronize these values with 1793f53e619SDerald D. Woods * corresponding Device Tree entries in Linux: 1803f53e619SDerald D. Woods * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 1813f53e619SDerald D. Woods * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 1823f53e619SDerald D. Woods * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 1833f53e619SDerald D. Woods * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 1843f53e619SDerald D. Woods * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 1853f53e619SDerald D. Woods * RootFS Remaining Flash Space @ 0xB20000 1863f53e619SDerald D. Woods */ 1873f53e619SDerald D. Woods #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 1883f53e619SDerald D. Woods #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 1893f53e619SDerald D. Woods "512k(MLO)," \ 1903f53e619SDerald D. Woods "1920k(u-boot)," \ 1913f53e619SDerald D. Woods "256k(u-boot-env)," \ 1923f53e619SDerald D. Woods "8m(kernel)," \ 1933f53e619SDerald D. Woods "512k(dtb)," \ 1943f53e619SDerald D. Woods "-(rootfs)" 1953f53e619SDerald D. Woods #else 1963f53e619SDerald D. Woods #define MTDIDS_DEFAULT 1973f53e619SDerald D. Woods #define MTDPARTS_DEFAULT 1983f53e619SDerald D. Woods #endif /* CONFIG_NAND */ 199ed01e45cSVaibhav Hiremath 200ed01e45cSVaibhav Hiremath /* Environment information */ 201ed01e45cSVaibhav Hiremath 202b3f44c21SJoe Hershberger #define CONFIG_BOOTFILE "uImage" 203ed01e45cSVaibhav Hiremath 204ed01e45cSVaibhav Hiremath #define CONFIG_EXTRA_ENV_SETTINGS \ 205ed01e45cSVaibhav Hiremath "loadaddr=0x82000000\0" \ 20649473adaSYegor Yefremov "console=ttyO2,115200n8\0" \ 20745776e36SDerald D. Woods "fdtfile=am3517-evm.dtb\0" \ 20845776e36SDerald D. Woods "fdtaddr=0x82C00000\0" \ 20945776e36SDerald D. Woods "vram=16M\0" \ 21045776e36SDerald D. Woods "bootenv=uEnv.txt\0" \ 21145776e36SDerald D. Woods "cmdline=\0" \ 21245776e36SDerald D. Woods "optargs=\0" \ 2133f53e619SDerald D. Woods "mtdids=" MTDIDS_DEFAULT "\0" \ 2143f53e619SDerald D. Woods "mtdparts=" MTDPARTS_DEFAULT "\0" \ 215122e6e0aSVaibhav Hiremath "mmcdev=0\0" \ 21645776e36SDerald D. Woods "mmcpart=1\0" \ 21745776e36SDerald D. Woods "mmcroot=/dev/mmcblk0p2 rw\0" \ 21845776e36SDerald D. Woods "mmcrootfstype=ext4 rootwait fixrtc\0" \ 219ed01e45cSVaibhav Hiremath "mmcargs=setenv bootargs console=${console} " \ 2203f53e619SDerald D. Woods "${mtdparts} " \ 22145776e36SDerald D. Woods "${optargs} " \ 22245776e36SDerald D. Woods "root=${mmcroot} " \ 22345776e36SDerald D. Woods "rootfstype=${mmcrootfstype} " \ 22445776e36SDerald D. Woods "${cmdline}\0" \ 225ed01e45cSVaibhav Hiremath "nandargs=setenv bootargs console=${console} " \ 2263f53e619SDerald D. Woods "${mtdparts} " \ 2273f53e619SDerald D. Woods "${optargs} " \ 2283f53e619SDerald D. Woods "root=ubi0:rootfs rw ubi.mtd=rootfs " \ 2293f53e619SDerald D. Woods "rootfstype=ubifs rootwait " \ 2303f53e619SDerald D. Woods "${cmdline}\0" \ 23145776e36SDerald D. Woods "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ 23245776e36SDerald D. Woods "importbootenv=echo Importing environment from mmc ...; " \ 23345776e36SDerald D. Woods "env import -t ${loadaddr} ${filesize}\0" \ 234ed01e45cSVaibhav Hiremath "bootscript=echo Running bootscript from mmc ...; " \ 235ed01e45cSVaibhav Hiremath "source ${loadaddr}\0" \ 23645776e36SDerald D. Woods "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ 23745776e36SDerald D. Woods "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ 238ed01e45cSVaibhav Hiremath "mmcboot=echo Booting from mmc ...; " \ 239ed01e45cSVaibhav Hiremath "run mmcargs; " \ 24045776e36SDerald D. Woods "bootz ${loadaddr} - ${fdtaddr}\0" \ 241ed01e45cSVaibhav Hiremath "nandboot=echo Booting from nand ...; " \ 242ed01e45cSVaibhav Hiremath "run nandargs; " \ 2433f53e619SDerald D. Woods "nand read ${loadaddr} 2a0000 800000; " \ 2443f53e619SDerald D. Woods "nand read ${fdtaddr} aa0000 80000; " \ 2453f53e619SDerald D. Woods "bootm ${loadaddr} - ${fdtaddr}\0" \ 246ed01e45cSVaibhav Hiremath 247ed01e45cSVaibhav Hiremath #define CONFIG_BOOTCOMMAND \ 24866968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 24945776e36SDerald D. Woods "echo SD/MMC found on device $mmcdev; " \ 25045776e36SDerald D. Woods "if run loadbootenv; then " \ 25145776e36SDerald D. Woods "run importbootenv; " \ 252ed01e45cSVaibhav Hiremath "fi; " \ 25345776e36SDerald D. Woods "echo Checking if uenvcmd is set ...; " \ 25445776e36SDerald D. Woods "if test -n $uenvcmd; then " \ 25545776e36SDerald D. Woods "echo Running uenvcmd ...; " \ 25645776e36SDerald D. Woods "run uenvcmd; " \ 25745776e36SDerald D. Woods "fi; " \ 25845776e36SDerald D. Woods "echo Running default loadimage ...; " \ 25945776e36SDerald D. Woods "setenv bootfile zImage; " \ 26045776e36SDerald D. Woods "if run loadimage; then " \ 26145776e36SDerald D. Woods "run loadfdt; " \ 26245776e36SDerald D. Woods "run mmcboot; " \ 263ed01e45cSVaibhav Hiremath "fi; " \ 264ed01e45cSVaibhav Hiremath "else run nandboot; fi" 265ed01e45cSVaibhav Hiremath 2663f53e619SDerald D. Woods /* Miscellaneous configurable options */ 2673f53e619SDerald D. Woods #define CONFIG_AUTO_COMPLETE 2683f53e619SDerald D. Woods #define CONFIG_CMDLINE_EDITING 2693f53e619SDerald D. Woods #define CONFIG_VERSION_VARIABLE 2703f53e619SDerald D. Woods #define CONFIG_SYS_LONGHELP 2713f53e619SDerald D. Woods #define CONFIG_PARTITION_UUIDS 2723f53e619SDerald D. Woods 2733f53e619SDerald D. Woods /* We set the max number of command args high to avoid HUSH bugs. */ 2743f53e619SDerald D. Woods #define CONFIG_SYS_MAXARGS 64 2753f53e619SDerald D. Woods 2763f53e619SDerald D. Woods /* Console I/O Buffer Size */ 2773f53e619SDerald D. Woods #define CONFIG_SYS_CBSIZE 512 278ed01e45cSVaibhav Hiremath /* Print Buffer Size */ 2793f53e619SDerald D. Woods #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 2803f53e619SDerald D. Woods + sizeof(CONFIG_SYS_PROMPT) + 16) 281ed01e45cSVaibhav Hiremath /* Boot Argument Buffer Size */ 2823f53e619SDerald D. Woods #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 2833f53e619SDerald D. Woods 284ed01e45cSVaibhav Hiremath /* memtest works on */ 285ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 286ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 287ed01e45cSVaibhav Hiremath 0x01F00000) /* 31MB */ 288ed01e45cSVaibhav Hiremath 289ed01e45cSVaibhav Hiremath #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 290ed01e45cSVaibhav Hiremath /* address */ 291ed01e45cSVaibhav Hiremath 292ed01e45cSVaibhav Hiremath /* 293ed01e45cSVaibhav Hiremath * AM3517 has 12 GP timers, they can be driven by the system clock 294ed01e45cSVaibhav Hiremath * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 295ed01e45cSVaibhav Hiremath * This rate is divided by a local divisor. 296ed01e45cSVaibhav Hiremath */ 297ed01e45cSVaibhav Hiremath #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 298ed01e45cSVaibhav Hiremath #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 299ed01e45cSVaibhav Hiremath 3003f53e619SDerald D. Woods /* Physical Memory Map */ 301ed01e45cSVaibhav Hiremath #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 302ed01e45cSVaibhav Hiremath #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 3033f53e619SDerald D. Woods #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 3043f53e619SDerald D. Woods #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 3053f53e619SDerald D. Woods #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 3063f53e619SDerald D. Woods #define CONFIG_SYS_INIT_RAM_SIZE 0x800 3073f53e619SDerald D. Woods #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 3083f53e619SDerald D. Woods CONFIG_SYS_INIT_RAM_SIZE - \ 3093f53e619SDerald D. Woods GENERATED_GBL_DATA_SIZE) 310ed01e45cSVaibhav Hiremath 3113f53e619SDerald D. Woods /* FLASH and environment organization */ 312ed01e45cSVaibhav Hiremath 313ed01e45cSVaibhav Hiremath /* **** PISMO SUPPORT *** */ 314ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ 315ed01e45cSVaibhav Hiremath /* on one chip */ 316ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ 317ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 318ed01e45cSVaibhav Hiremath 3193f53e619SDerald D. Woods #if defined(CONFIG_NAND) 320222a3113Spekon gupta #define CONFIG_SYS_FLASH_BASE NAND_BASE 3216cbec7b3SLuca Ceresoli #endif 322ed01e45cSVaibhav Hiremath 323ed01e45cSVaibhav Hiremath /* Monitor at start of flash */ 324ed01e45cSVaibhav Hiremath #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 325ed01e45cSVaibhav Hiremath 3266cbec7b3SLuca Ceresoli #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 3273f53e619SDerald D. Woods #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE 3283f53e619SDerald D. Woods #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 3296cbec7b3SLuca Ceresoli #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 3306cbec7b3SLuca Ceresoli #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 3313f53e619SDerald D. Woods #define CONFIG_ENV_IS_IN_NAND 3325059a2a4STom Rini 3335059a2a4STom Rini /* Defines for SPL */ 33447f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 335d7cb93b2STom Rini #define CONFIG_SPL_BOARD_INIT 3365059a2a4STom Rini #define CONFIG_SPL_NAND_SIMPLE 337138daa7bSDerald D. Woods #define CONFIG_SPL_TEXT_BASE 0x40200000 338*fa2f81b0STom Rini #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 339*fa2f81b0STom Rini CONFIG_SPL_TEXT_BASE) 3405059a2a4STom Rini 3415059a2a4STom Rini #define CONFIG_SPL_BSS_START_ADDR 0x80000000 3425059a2a4STom Rini #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 3435059a2a4STom Rini 3445059a2a4STom Rini #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 3455059a2a4STom Rini #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 346e2ccdf89SPaul Kocialkowski #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 347205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 3485059a2a4STom Rini 3495059a2a4STom Rini #define CONFIG_SPL_LIBCOMMON_SUPPORT 3505059a2a4STom Rini #define CONFIG_SPL_LIBDISK_SUPPORT 3515059a2a4STom Rini #define CONFIG_SPL_I2C_SUPPORT 3525059a2a4STom Rini #define CONFIG_SPL_LIBGENERIC_SUPPORT 3535059a2a4STom Rini #define CONFIG_SPL_MMC_SUPPORT 3545059a2a4STom Rini #define CONFIG_SPL_FAT_SUPPORT 3555059a2a4STom Rini #define CONFIG_SPL_SERIAL_SUPPORT 3565059a2a4STom Rini #define CONFIG_SPL_NAND_SUPPORT 3576f2f01b9SScott Wood #define CONFIG_SPL_NAND_BASE 3586f2f01b9SScott Wood #define CONFIG_SPL_NAND_DRIVERS 3596f2f01b9SScott Wood #define CONFIG_SPL_NAND_ECC 3603f53e619SDerald D. Woods #define CONFIG_SPL_MTD_SUPPORT 3615059a2a4STom Rini #define CONFIG_SPL_POWER_SUPPORT 3625059a2a4STom Rini #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 3635059a2a4STom Rini 364ed01e45cSVaibhav Hiremath #endif /* __CONFIG_H */ 365