xref: /rk3399_rockchip-uboot/include/configs/am335x_evm.h (revision f170899f736dd2bdfdcd6dfa7592cb2739c685e3)
15289e83aSChandan Nath /*
25289e83aSChandan Nath  * am335x_evm.h
35289e83aSChandan Nath  *
45289e83aSChandan Nath  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
55289e83aSChandan Nath  *
65289e83aSChandan Nath  * This program is free software; you can redistribute it and/or
75289e83aSChandan Nath  * modify it under the terms of the GNU General Public License as
85289e83aSChandan Nath  * published by the Free Software Foundation version 2.
95289e83aSChandan Nath  *
105289e83aSChandan Nath  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
115289e83aSChandan Nath  * kind, whether express or implied; without even the implied warranty
125289e83aSChandan Nath  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
135289e83aSChandan Nath  * GNU General Public License for more details.
145289e83aSChandan Nath  */
155289e83aSChandan Nath 
165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H
175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H
185289e83aSChandan Nath 
19f16da746SChandan Nath #define CONFIG_AM33XX
205289e83aSChandan Nath 
215289e83aSChandan Nath #include <asm/arch/cpu.h>
225289e83aSChandan Nath #include <asm/arch/hardware.h>
235289e83aSChandan Nath 
2493042960SChandan Nath #define CONFIG_DMA_COHERENT
2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
2693042960SChandan Nath 
277bf038ecSTom Rini #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP		/* undef to save memory */
307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT		"U-Boot# "
32044fc14bSTom Rini #define CONFIG_BOARD_LATE_INIT
335289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH
34a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
355289e83aSChandan Nath #define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
365289e83aSChandan Nath 
377bf038ecSTom Rini #define CONFIG_OF_LIBFDT
387bf038ecSTom Rini #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
397bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS
407bf038ecSTom Rini #define CONFIG_INITRD_TAG
417bf038ecSTom Rini 
427bf038ecSTom Rini /* commands to include */
437bf038ecSTom Rini #include <config_cmd_default.h>
447bf038ecSTom Rini 
455289e83aSChandan Nath #define CONFIG_CMD_ASKENV
465289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE
475289e83aSChandan Nath 
485289e83aSChandan Nath /* set to negative value for no autoboot */
493580777bSKoen Kooi #define CONFIG_BOOTDELAY		1
50044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG
51044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
525289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \
537bf038ecSTom Rini 	"loadaddr=0x80200000\0" \
547bf038ecSTom Rini 	"fdtaddr=0x80F80000\0" \
55*f170899fShvaibhav@ti.com 	"fdt_high=0xffffffff\0" \
567bf038ecSTom Rini 	"rdaddr=0x81000000\0" \
577bf038ecSTom Rini 	"bootfile=/boot/uImage\0" \
58044fc14bSTom Rini 	"fdtfile=\0" \
597bf038ecSTom Rini 	"console=ttyO0,115200n8\0" \
607bf038ecSTom Rini 	"optargs=\0" \
617bf038ecSTom Rini 	"mmcdev=0\0" \
623580777bSKoen Kooi 	"mmcroot=/dev/mmcblk0p2 ro\0" \
637bf038ecSTom Rini 	"mmcrootfstype=ext4 rootwait\0" \
647bf038ecSTom Rini 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
657bf038ecSTom Rini 	"ramrootfstype=ext2\0" \
667bf038ecSTom Rini 	"mmcargs=setenv bootargs console=${console} " \
677bf038ecSTom Rini 		"${optargs} " \
687bf038ecSTom Rini 		"root=${mmcroot} " \
697bf038ecSTom Rini 		"rootfstype=${mmcrootfstype}\0" \
707bf038ecSTom Rini 	"bootenv=uEnv.txt\0" \
717bf038ecSTom Rini 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
727bf038ecSTom Rini 	"importbootenv=echo Importing environment from mmc ...; " \
737bf038ecSTom Rini 		"env import -t $loadaddr $filesize\0" \
747bf038ecSTom Rini 	"ramargs=setenv bootargs console=${console} " \
757bf038ecSTom Rini 		"${optargs} " \
767bf038ecSTom Rini 		"root=${ramroot} " \
777bf038ecSTom Rini 		"rootfstype=${ramrootfstype}\0" \
787bf038ecSTom Rini 	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
797bf038ecSTom Rini 	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
807bf038ecSTom Rini 	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
817bf038ecSTom Rini 	"mmcboot=echo Booting from mmc ...; " \
827bf038ecSTom Rini 		"run mmcargs; " \
837bf038ecSTom Rini 		"bootm ${loadaddr}\0" \
847bf038ecSTom Rini 	"ramboot=echo Booting from ramdisk ...; " \
857bf038ecSTom Rini 		"run ramargs; " \
867bf038ecSTom Rini 		"bootm ${loadaddr}\0" \
87044fc14bSTom Rini 	"findfdt="\
88044fc14bSTom Rini 		"if test $board_name = A335BONE; then " \
89044fc14bSTom Rini 			"setenv fdtfile am335x-bone.dtb; fi; " \
90044fc14bSTom Rini 		"if test $board_name = A33515BB; then " \
91044fc14bSTom Rini 			"setenv fdtfile am335x-evm.dtb; fi; " \
92044fc14bSTom Rini 		"if test $board_name = A335X_SK; then " \
93044fc14bSTom Rini 			"setenv fdtfile am335x-evmsk.dtb; fi\0" \
947bf038ecSTom Rini 
957bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \
9666968110SAndrew Bradford 	"mmc dev ${mmcdev}; if mmc rescan; then " \
977bf038ecSTom Rini 		"echo SD/MMC found on device ${mmcdev};" \
987bf038ecSTom Rini 		"if run loadbootenv; then " \
997bf038ecSTom Rini 			"echo Loaded environment from ${bootenv};" \
1007bf038ecSTom Rini 			"run importbootenv;" \
1017bf038ecSTom Rini 		"fi;" \
1027bf038ecSTom Rini 		"if test -n $uenvcmd; then " \
1037bf038ecSTom Rini 			"echo Running uenvcmd ...;" \
1047bf038ecSTom Rini 			"run uenvcmd;" \
1057bf038ecSTom Rini 		"fi;" \
1067bf038ecSTom Rini 		"if run loaduimage; then " \
1077bf038ecSTom Rini 			"run mmcboot;" \
1087bf038ecSTom Rini 		"fi;" \
1097bf038ecSTom Rini 	"fi;" \
1105289e83aSChandan Nath 
1115289e83aSChandan Nath /* Clock Defines */
1125289e83aSChandan Nath #define V_OSCK				24000000  /* Clock output from T2 */
113750b4bfeSChandan Nath #define V_SCLK				(V_OSCK)
1145289e83aSChandan Nath 
1155289e83aSChandan Nath #define CONFIG_CMD_ECHO
1165289e83aSChandan Nath 
1175289e83aSChandan Nath /* max number of command args */
118750b4bfeSChandan Nath #define CONFIG_SYS_MAXARGS		16
1195289e83aSChandan Nath 
1205289e83aSChandan Nath /* Console I/O Buffer Size */
1215289e83aSChandan Nath #define CONFIG_SYS_CBSIZE		512
1225289e83aSChandan Nath 
1235289e83aSChandan Nath /* Print Buffer Size */
1245289e83aSChandan Nath #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
1255289e83aSChandan Nath 					+ sizeof(CONFIG_SYS_PROMPT) + 16)
1265289e83aSChandan Nath 
1275289e83aSChandan Nath /* Boot Argument Buffer Size */
1285289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
1295289e83aSChandan Nath 
1305289e83aSChandan Nath /*
1315289e83aSChandan Nath  * memtest works on 8 MB in DRAM after skipping 32MB from
1325289e83aSChandan Nath  * start addr of ram disk
1335289e83aSChandan Nath  */
1345289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
1355289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
1365289e83aSChandan Nath 					+ (8 * 1024 * 1024))
1375289e83aSChandan Nath 
1385289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
1395289e83aSChandan Nath #define CONFIG_SYS_HZ			1000 /* 1ms clock */
1405289e83aSChandan Nath 
141876bdd6dSChandan Nath #define CONFIG_MMC
142876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC
143876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC
144876bdd6dSChandan Nath #define CONFIG_CMD_MMC
145876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION
146876bdd6dSChandan Nath #define CONFIG_CMD_FAT
147876bdd6dSChandan Nath #define CONFIG_CMD_EXT2
148876bdd6dSChandan Nath 
149a4a99fffSTom Rini #define CONFIG_SPI
150a4a99fffSTom Rini #define CONFIG_OMAP3_SPI
151a4a99fffSTom Rini #define CONFIG_MTD_DEVICE
152a4a99fffSTom Rini #define CONFIG_SPI_FLASH
153a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND
154a4a99fffSTom Rini #define CONFIG_CMD_SF
155a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED		(24000000)
156a4a99fffSTom Rini 
1575289e83aSChandan Nath  /* Physical Memory Map */
1585289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
1595289e83aSChandan Nath #define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
1605289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
1615289e83aSChandan Nath 
1625289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
16341aebf81STom Rini #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
1645289e83aSChandan Nath 						GENERATED_GBL_DATA_SIZE)
1655289e83aSChandan Nath  /* Platform/Board specific defs */
1665289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
1675289e83aSChandan Nath #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
1685289e83aSChandan Nath #define CONFIG_SYS_HZ			1000
1695289e83aSChandan Nath 
1705289e83aSChandan Nath /* NS16550 Configuration */
1715289e83aSChandan Nath #define CONFIG_SYS_NS16550
1725289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL
173c3f8318fSAndrew Bradford #define CONFIG_SERIAL_MULTI
1745289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
1755289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK		(48000000)
1765289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
177c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
178c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
179c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
180c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
181c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
1825289e83aSChandan Nath 
183b4116edeSPatil, Rachna /* I2C Configuration */
184b4116edeSPatil, Rachna #define CONFIG_I2C
185b4116edeSPatil, Rachna #define CONFIG_CMD_I2C
186b4116edeSPatil, Rachna #define CONFIG_HARD_I2C
187b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED		100000
188b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE		1
189d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS
190b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C
191726c05d2STom Rini #define CONFIG_CMD_EEPROM
192a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C
193726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
194726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
195726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS
196b4116edeSPatil, Rachna 
197308252adSMarek Vasut #define CONFIG_OMAP_GPIO
198308252adSMarek Vasut 
1995289e83aSChandan Nath #define CONFIG_BAUDRATE		115200
2005289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
2015289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
2025289e83aSChandan Nath 
203c3f8318fSAndrew Bradford #define CONFIG_ENV_OVERWRITE		1
2045289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET
2055289e83aSChandan Nath 
2065289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE
2075289e83aSChandan Nath 
2088a8f084eSChandan Nath /* Defines for SPL */
2098a8f084eSChandan Nath #define CONFIG_SPL
21047f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK
2118a8f084eSChandan Nath #define CONFIG_SPL_TEXT_BASE		0x402F0400
2126feb4e9dSIlya Yanok #define CONFIG_SPL_MAX_SIZE		(101 * 1024)
21341aebf81STom Rini #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
2148a8f084eSChandan Nath 
2158a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR	0x80000000
2168a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
2178a8f084eSChandan Nath 
2188a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
2198a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
2208a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
2218a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
2228a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT
2238a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT
224b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT
2258a8f084eSChandan Nath 
2268a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT
2278a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT
2288a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT
2298a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT
23016e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT
231763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT
2326feb4e9dSIlya Yanok #define CONFIG_SPL_NET_SUPPORT
2336feb4e9dSIlya Yanok #define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"
2346feb4e9dSIlya Yanok #define CONFIG_SPL_ETH_SUPPORT
23569916bcfSTom Rini #define CONFIG_SPL_SPI_SUPPORT
23669916bcfSTom Rini #define CONFIG_SPL_SPI_FLASH_SUPPORT
23769916bcfSTom Rini #define CONFIG_SPL_SPI_LOAD
23869916bcfSTom Rini #define CONFIG_SPL_SPI_BUS		0
23969916bcfSTom Rini #define CONFIG_SPL_SPI_CS		0
24069916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
24169916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
2428a8f084eSChandan Nath #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
2438a8f084eSChandan Nath 
244b4606c6cSIlya Yanok #define CONFIG_SPL_BOARD_INIT
245b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_AM33XX_BCH
246b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_SUPPORT
24779f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_BASE
24879f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_DRIVERS
24979f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_ECC
250b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_5_ADDR_CYCLE
251b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
252b4606c6cSIlya Yanok 					 CONFIG_SYS_NAND_PAGE_SIZE)
253b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_SIZE	2048
254b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_OOBSIZE		64
255b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
256b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
257b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
258b4606c6cSIlya Yanok 					 10, 11, 12, 13, 14, 15, 16, 17, \
259b4606c6cSIlya Yanok 					 18, 19, 20, 21, 22, 23, 24, 25, \
260b4606c6cSIlya Yanok 					 26, 27, 28, 29, 30, 31, 32, 33, \
261b4606c6cSIlya Yanok 					 34, 35, 36, 37, 38, 39, 40, 41, \
262b4606c6cSIlya Yanok 					 42, 43, 44, 45, 46, 47, 48, 49, \
263b4606c6cSIlya Yanok 					 50, 51, 52, 53, 54, 55, 56, 57, }
264b4606c6cSIlya Yanok 
265b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSIZE		512
266b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCBYTES	14
267b4606c6cSIlya Yanok 
268b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSTEPS	4
269b4606c6cSIlya Yanok #define	CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES * \
270b4606c6cSIlya Yanok 						CONFIG_SYS_NAND_ECCSTEPS)
271b4606c6cSIlya Yanok 
272b4606c6cSIlya Yanok #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
273b4606c6cSIlya Yanok 
274b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
275b4606c6cSIlya Yanok 
2768a8f084eSChandan Nath /*
2778a8f084eSChandan Nath  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
2788a8f084eSChandan Nath  * 64 bytes before this address should be set aside for u-boot.img's
2798a8f084eSChandan Nath  * header. That is 0x800FFFC0--0x80100000 should not be used for any
2808a8f084eSChandan Nath  * other needs.
2818a8f084eSChandan Nath  */
2828a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE		0x80800000
2838a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
2848a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
2858a8f084eSChandan Nath 
2868a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us,
2878a8f084eSChandan Nath  * we don't need to do it twice.
2888a8f084eSChandan Nath  */
2898a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD
2908a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT
2918a8f084eSChandan Nath #endif
2925289e83aSChandan Nath 
293d2aa1154SIlya Yanok /*
294d2aa1154SIlya Yanok  * USB configuration
295d2aa1154SIlya Yanok  */
296d2aa1154SIlya Yanok #define CONFIG_USB_MUSB_DSPS
297d2aa1154SIlya Yanok #define CONFIG_ARCH_MISC_INIT
298d2aa1154SIlya Yanok #define CONFIG_MUSB_GADGET
299d2aa1154SIlya Yanok #define CONFIG_MUSB_PIO_ONLY
300d2aa1154SIlya Yanok #define CONFIG_USB_GADGET_DUALSPEED
301d2aa1154SIlya Yanok #define CONFIG_MUSB_HOST
302d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0
303d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
304d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1
305d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1_MODE MUSB_HOST
306d2aa1154SIlya Yanok 
307d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_HOST
308d2aa1154SIlya Yanok #define CONFIG_CMD_USB
309d2aa1154SIlya Yanok #define CONFIG_USB_STORAGE
310d2aa1154SIlya Yanok #endif
311d2aa1154SIlya Yanok 
312d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_GADGET
313d2aa1154SIlya Yanok #define CONFIG_USB_ETHER
314d2aa1154SIlya Yanok #define CONFIG_USB_ETH_RNDIS
315d2aa1154SIlya Yanok #endif /* CONFIG_MUSB_GADGET */
316d2aa1154SIlya Yanok 
317d2aa1154SIlya Yanok /* Unsupported features */
318d2aa1154SIlya Yanok #undef CONFIG_USE_IRQ
319d2aa1154SIlya Yanok 
32093042960SChandan Nath #define CONFIG_CMD_NET
32193042960SChandan Nath #define CONFIG_CMD_DHCP
32293042960SChandan Nath #define CONFIG_CMD_PING
32393042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW
32493042960SChandan Nath #define CONFIG_MII
32593042960SChandan Nath #define CONFIG_BOOTP_DEFAULT
32693042960SChandan Nath #define CONFIG_BOOTP_DNS
32793042960SChandan Nath #define CONFIG_BOOTP_DNS2
32893042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME
32993042960SChandan Nath #define CONFIG_BOOTP_GATEWAY
33093042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK
33193042960SChandan Nath #define CONFIG_NET_RETRY_COUNT         10
33293042960SChandan Nath #define CONFIG_NET_MULTI
33393042960SChandan Nath #define CONFIG_PHY_GIGE
33493042960SChandan Nath #define CONFIG_PHYLIB
335cdd0729eSYegor Yefremov #define CONFIG_PHY_ADDR			0
336c44080b2SIlya Yanok #define CONFIG_PHY_SMSC
33793042960SChandan Nath 
33898b5c269SIlya Yanok #define CONFIG_NAND
33998b5c269SIlya Yanok /* NAND support */
34098b5c269SIlya Yanok #ifdef CONFIG_NAND
34198b5c269SIlya Yanok #define CONFIG_CMD_NAND
34298b5c269SIlya Yanok #define CONFIG_NAND_OMAP_GPMC
34398b5c269SIlya Yanok #define GPMC_NAND_ECC_LP_x16_LAYOUT	1
34498b5c269SIlya Yanok #define CONFIG_SYS_NAND_BASE		(0x08000000)	/* physical address */
34598b5c269SIlya Yanok 							/* to access nand at */
34698b5c269SIlya Yanok 							/* CS0 */
347b4606c6cSIlya Yanok #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
348b4606c6cSIlya Yanok 							   devices */
349b4606c6cSIlya Yanok #undef CONFIG_ENV_IS_NOWHERE
350b4606c6cSIlya Yanok #define CONFIG_ENV_IS_IN_NAND
351b4606c6cSIlya Yanok #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
352b4606c6cSIlya Yanok #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
353b4606c6cSIlya Yanok #endif
35498b5c269SIlya Yanok 
3555289e83aSChandan Nath #endif	/* ! __CONFIG_AM335X_EVM_H */
356