15289e83aSChandan Nath /* 25289e83aSChandan Nath * am335x_evm.h 35289e83aSChandan Nath * 45289e83aSChandan Nath * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 55289e83aSChandan Nath * 65289e83aSChandan Nath * This program is free software; you can redistribute it and/or 75289e83aSChandan Nath * modify it under the terms of the GNU General Public License as 85289e83aSChandan Nath * published by the Free Software Foundation version 2. 95289e83aSChandan Nath * 105289e83aSChandan Nath * This program is distributed "as is" WITHOUT ANY WARRANTY of any 115289e83aSChandan Nath * kind, whether express or implied; without even the implied warranty 125289e83aSChandan Nath * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 135289e83aSChandan Nath * GNU General Public License for more details. 145289e83aSChandan Nath */ 155289e83aSChandan Nath 165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H 175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H 185289e83aSChandan Nath 19f16da746SChandan Nath #define CONFIG_AM33XX 205289e83aSChandan Nath 215289e83aSChandan Nath #include <asm/arch/cpu.h> 225289e83aSChandan Nath #include <asm/arch/hardware.h> 235289e83aSChandan Nath 2493042960SChandan Nath #define CONFIG_DMA_COHERENT 2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 2693042960SChandan Nath 277bf038ecSTom Rini #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP /* undef to save memory */ 307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT "U-Boot# " 32044fc14bSTom Rini #define CONFIG_BOARD_LATE_INIT 335289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH 34a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ 355289e83aSChandan Nath #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM 365289e83aSChandan Nath 377bf038ecSTom Rini #define CONFIG_OF_LIBFDT 387bf038ecSTom Rini #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 397bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS 407bf038ecSTom Rini #define CONFIG_INITRD_TAG 417bf038ecSTom Rini 427bf038ecSTom Rini /* commands to include */ 437bf038ecSTom Rini #include <config_cmd_default.h> 447bf038ecSTom Rini 455289e83aSChandan Nath #define CONFIG_CMD_ASKENV 465289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE 475289e83aSChandan Nath 485289e83aSChandan Nath /* set to negative value for no autoboot */ 493580777bSKoen Kooi #define CONFIG_BOOTDELAY 1 50044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG 51044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 525289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \ 537bf038ecSTom Rini "loadaddr=0x80200000\0" \ 547bf038ecSTom Rini "fdtaddr=0x80F80000\0" \ 557bf038ecSTom Rini "rdaddr=0x81000000\0" \ 567bf038ecSTom Rini "bootfile=/boot/uImage\0" \ 57044fc14bSTom Rini "fdtfile=\0" \ 587bf038ecSTom Rini "console=ttyO0,115200n8\0" \ 597bf038ecSTom Rini "optargs=\0" \ 607bf038ecSTom Rini "mmcdev=0\0" \ 613580777bSKoen Kooi "mmcroot=/dev/mmcblk0p2 ro\0" \ 627bf038ecSTom Rini "mmcrootfstype=ext4 rootwait\0" \ 637bf038ecSTom Rini "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 647bf038ecSTom Rini "ramrootfstype=ext2\0" \ 657bf038ecSTom Rini "mmcargs=setenv bootargs console=${console} " \ 667bf038ecSTom Rini "${optargs} " \ 677bf038ecSTom Rini "root=${mmcroot} " \ 687bf038ecSTom Rini "rootfstype=${mmcrootfstype}\0" \ 697bf038ecSTom Rini "bootenv=uEnv.txt\0" \ 707bf038ecSTom Rini "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 717bf038ecSTom Rini "importbootenv=echo Importing environment from mmc ...; " \ 727bf038ecSTom Rini "env import -t $loadaddr $filesize\0" \ 737bf038ecSTom Rini "ramargs=setenv bootargs console=${console} " \ 747bf038ecSTom Rini "${optargs} " \ 757bf038ecSTom Rini "root=${ramroot} " \ 767bf038ecSTom Rini "rootfstype=${ramrootfstype}\0" \ 777bf038ecSTom Rini "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 787bf038ecSTom Rini "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 797bf038ecSTom Rini "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ 807bf038ecSTom Rini "mmcboot=echo Booting from mmc ...; " \ 817bf038ecSTom Rini "run mmcargs; " \ 827bf038ecSTom Rini "bootm ${loadaddr}\0" \ 837bf038ecSTom Rini "ramboot=echo Booting from ramdisk ...; " \ 847bf038ecSTom Rini "run ramargs; " \ 857bf038ecSTom Rini "bootm ${loadaddr}\0" \ 86044fc14bSTom Rini "findfdt="\ 87044fc14bSTom Rini "if test $board_name = A335BONE; then " \ 88044fc14bSTom Rini "setenv fdtfile am335x-bone.dtb; fi; " \ 89044fc14bSTom Rini "if test $board_name = A33515BB; then " \ 90044fc14bSTom Rini "setenv fdtfile am335x-evm.dtb; fi; " \ 91044fc14bSTom Rini "if test $board_name = A335X_SK; then " \ 92044fc14bSTom Rini "setenv fdtfile am335x-evmsk.dtb; fi\0" \ 937bf038ecSTom Rini 947bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \ 9566968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 967bf038ecSTom Rini "echo SD/MMC found on device ${mmcdev};" \ 977bf038ecSTom Rini "if run loadbootenv; then " \ 987bf038ecSTom Rini "echo Loaded environment from ${bootenv};" \ 997bf038ecSTom Rini "run importbootenv;" \ 1007bf038ecSTom Rini "fi;" \ 1017bf038ecSTom Rini "if test -n $uenvcmd; then " \ 1027bf038ecSTom Rini "echo Running uenvcmd ...;" \ 1037bf038ecSTom Rini "run uenvcmd;" \ 1047bf038ecSTom Rini "fi;" \ 1057bf038ecSTom Rini "if run loaduimage; then " \ 1067bf038ecSTom Rini "run mmcboot;" \ 1077bf038ecSTom Rini "fi;" \ 1087bf038ecSTom Rini "fi;" \ 1095289e83aSChandan Nath 1105289e83aSChandan Nath /* Clock Defines */ 1115289e83aSChandan Nath #define V_OSCK 24000000 /* Clock output from T2 */ 112750b4bfeSChandan Nath #define V_SCLK (V_OSCK) 1135289e83aSChandan Nath 1145289e83aSChandan Nath #define CONFIG_CMD_ECHO 1155289e83aSChandan Nath 1165289e83aSChandan Nath /* max number of command args */ 117750b4bfeSChandan Nath #define CONFIG_SYS_MAXARGS 16 1185289e83aSChandan Nath 1195289e83aSChandan Nath /* Console I/O Buffer Size */ 1205289e83aSChandan Nath #define CONFIG_SYS_CBSIZE 512 1215289e83aSChandan Nath 1225289e83aSChandan Nath /* Print Buffer Size */ 1235289e83aSChandan Nath #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 1245289e83aSChandan Nath + sizeof(CONFIG_SYS_PROMPT) + 16) 1255289e83aSChandan Nath 1265289e83aSChandan Nath /* Boot Argument Buffer Size */ 1275289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 1285289e83aSChandan Nath 1295289e83aSChandan Nath /* 1305289e83aSChandan Nath * memtest works on 8 MB in DRAM after skipping 32MB from 1315289e83aSChandan Nath * start addr of ram disk 1325289e83aSChandan Nath */ 1335289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 1345289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 1355289e83aSChandan Nath + (8 * 1024 * 1024)) 1365289e83aSChandan Nath 1375289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 1385289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 1395289e83aSChandan Nath 140876bdd6dSChandan Nath #define CONFIG_MMC 141876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC 142876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC 143876bdd6dSChandan Nath #define CONFIG_CMD_MMC 144876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION 145876bdd6dSChandan Nath #define CONFIG_CMD_FAT 146876bdd6dSChandan Nath #define CONFIG_CMD_EXT2 147876bdd6dSChandan Nath 148a4a99fffSTom Rini #define CONFIG_SPI 149a4a99fffSTom Rini #define CONFIG_OMAP3_SPI 150a4a99fffSTom Rini #define CONFIG_MTD_DEVICE 151a4a99fffSTom Rini #define CONFIG_SPI_FLASH 152a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND 153a4a99fffSTom Rini #define CONFIG_CMD_SF 154a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED (24000000) 155a4a99fffSTom Rini 1565289e83aSChandan Nath /* Physical Memory Map */ 1575289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 1585289e83aSChandan Nath #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 1595289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 1605289e83aSChandan Nath 1615289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 16241aebf81STom Rini #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 1635289e83aSChandan Nath GENERATED_GBL_DATA_SIZE) 1645289e83aSChandan Nath /* Platform/Board specific defs */ 1655289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 1665289e83aSChandan Nath #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 1675289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 1685289e83aSChandan Nath 1695289e83aSChandan Nath /* NS16550 Configuration */ 1705289e83aSChandan Nath #define CONFIG_SYS_NS16550 1715289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL 172c3f8318fSAndrew Bradford #define CONFIG_SERIAL_MULTI 1735289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE (-4) 1745289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK (48000000) 1755289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 176c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 177c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 178c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 179c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 180c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 1815289e83aSChandan Nath 182b4116edeSPatil, Rachna /* I2C Configuration */ 183b4116edeSPatil, Rachna #define CONFIG_I2C 184b4116edeSPatil, Rachna #define CONFIG_CMD_I2C 185b4116edeSPatil, Rachna #define CONFIG_HARD_I2C 186b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED 100000 187b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE 1 188d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS 189b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C 190726c05d2STom Rini #define CONFIG_CMD_EEPROM 191a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C 192726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 193726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 194726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS 195b4116edeSPatil, Rachna 196308252adSMarek Vasut #define CONFIG_OMAP_GPIO 197308252adSMarek Vasut 1985289e83aSChandan Nath #define CONFIG_BAUDRATE 115200 1995289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 2005289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 2015289e83aSChandan Nath 202c3f8318fSAndrew Bradford #define CONFIG_ENV_OVERWRITE 1 2035289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET 2045289e83aSChandan Nath 2055289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE 2065289e83aSChandan Nath 2078a8f084eSChandan Nath /* Defines for SPL */ 2088a8f084eSChandan Nath #define CONFIG_SPL 20947f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 2108a8f084eSChandan Nath #define CONFIG_SPL_TEXT_BASE 0x402F0400 2116feb4e9dSIlya Yanok #define CONFIG_SPL_MAX_SIZE (101 * 1024) 21241aebf81STom Rini #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 2138a8f084eSChandan Nath 2148a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR 0x80000000 2158a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 2168a8f084eSChandan Nath 2178a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 2188a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 2198a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 2208a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 2218a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT 2228a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT 223b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT 2248a8f084eSChandan Nath 2258a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT 2268a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT 2278a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT 2288a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT 22916e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT 230763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT 2316feb4e9dSIlya Yanok #define CONFIG_SPL_NET_SUPPORT 2326feb4e9dSIlya Yanok #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" 2336feb4e9dSIlya Yanok #define CONFIG_SPL_ETH_SUPPORT 23469916bcfSTom Rini #define CONFIG_SPL_SPI_SUPPORT 23569916bcfSTom Rini #define CONFIG_SPL_SPI_FLASH_SUPPORT 23669916bcfSTom Rini #define CONFIG_SPL_SPI_LOAD 23769916bcfSTom Rini #define CONFIG_SPL_SPI_BUS 0 23869916bcfSTom Rini #define CONFIG_SPL_SPI_CS 0 23969916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 24069916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 2418a8f084eSChandan Nath #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 2428a8f084eSChandan Nath 243*b4606c6cSIlya Yanok #define CONFIG_SPL_BOARD_INIT 244*b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_AM33XX_BCH 245*b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_SUPPORT 246*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_5_ADDR_CYCLE 247*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 248*b4606c6cSIlya Yanok CONFIG_SYS_NAND_PAGE_SIZE) 249*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_SIZE 2048 250*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_OOBSIZE 64 251*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 252*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 253*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 254*b4606c6cSIlya Yanok 10, 11, 12, 13, 14, 15, 16, 17, \ 255*b4606c6cSIlya Yanok 18, 19, 20, 21, 22, 23, 24, 25, \ 256*b4606c6cSIlya Yanok 26, 27, 28, 29, 30, 31, 32, 33, \ 257*b4606c6cSIlya Yanok 34, 35, 36, 37, 38, 39, 40, 41, \ 258*b4606c6cSIlya Yanok 42, 43, 44, 45, 46, 47, 48, 49, \ 259*b4606c6cSIlya Yanok 50, 51, 52, 53, 54, 55, 56, 57, } 260*b4606c6cSIlya Yanok 261*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSIZE 512 262*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCBYTES 14 263*b4606c6cSIlya Yanok 264*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSTEPS 4 265*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ 266*b4606c6cSIlya Yanok CONFIG_SYS_NAND_ECCSTEPS) 267*b4606c6cSIlya Yanok 268*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 269*b4606c6cSIlya Yanok 270*b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 271*b4606c6cSIlya Yanok 2728a8f084eSChandan Nath /* 2738a8f084eSChandan Nath * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 2748a8f084eSChandan Nath * 64 bytes before this address should be set aside for u-boot.img's 2758a8f084eSChandan Nath * header. That is 0x800FFFC0--0x80100000 should not be used for any 2768a8f084eSChandan Nath * other needs. 2778a8f084eSChandan Nath */ 2788a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE 0x80800000 2798a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 2808a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 2818a8f084eSChandan Nath 2828a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us, 2838a8f084eSChandan Nath * we don't need to do it twice. 2848a8f084eSChandan Nath */ 2858a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD 2868a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT 2878a8f084eSChandan Nath #endif 2885289e83aSChandan Nath 28993042960SChandan Nath #define CONFIG_CMD_NET 29093042960SChandan Nath #define CONFIG_CMD_DHCP 29193042960SChandan Nath #define CONFIG_CMD_PING 29293042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW 29393042960SChandan Nath #define CONFIG_MII 29493042960SChandan Nath #define CONFIG_BOOTP_DEFAULT 29593042960SChandan Nath #define CONFIG_BOOTP_DNS 29693042960SChandan Nath #define CONFIG_BOOTP_DNS2 29793042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME 29893042960SChandan Nath #define CONFIG_BOOTP_GATEWAY 29993042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK 30093042960SChandan Nath #define CONFIG_NET_RETRY_COUNT 10 30193042960SChandan Nath #define CONFIG_NET_MULTI 30293042960SChandan Nath #define CONFIG_PHY_GIGE 30393042960SChandan Nath #define CONFIG_PHYLIB 304c44080b2SIlya Yanok #define CONFIG_PHY_SMSC 30593042960SChandan Nath 30698b5c269SIlya Yanok #define CONFIG_NAND 30798b5c269SIlya Yanok /* NAND support */ 30898b5c269SIlya Yanok #ifdef CONFIG_NAND 30998b5c269SIlya Yanok #define CONFIG_CMD_NAND 31098b5c269SIlya Yanok #define CONFIG_NAND_OMAP_GPMC 31198b5c269SIlya Yanok #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 31298b5c269SIlya Yanok #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ 31398b5c269SIlya Yanok /* to access nand at */ 31498b5c269SIlya Yanok /* CS0 */ 315*b4606c6cSIlya Yanok #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND 316*b4606c6cSIlya Yanok devices */ 317*b4606c6cSIlya Yanok #undef CONFIG_ENV_IS_NOWHERE 318*b4606c6cSIlya Yanok #define CONFIG_ENV_IS_IN_NAND 319*b4606c6cSIlya Yanok #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 320*b4606c6cSIlya Yanok #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 321*b4606c6cSIlya Yanok #endif 32298b5c269SIlya Yanok 3235289e83aSChandan Nath #endif /* ! __CONFIG_AM335X_EVM_H */ 324