xref: /rk3399_rockchip-uboot/include/configs/am335x_evm.h (revision a4a99fffd8a006d99958e5bcded36d7e7218bd36)
15289e83aSChandan Nath /*
25289e83aSChandan Nath  * am335x_evm.h
35289e83aSChandan Nath  *
45289e83aSChandan Nath  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
55289e83aSChandan Nath  *
65289e83aSChandan Nath  * This program is free software; you can redistribute it and/or
75289e83aSChandan Nath  * modify it under the terms of the GNU General Public License as
85289e83aSChandan Nath  * published by the Free Software Foundation version 2.
95289e83aSChandan Nath  *
105289e83aSChandan Nath  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
115289e83aSChandan Nath  * kind, whether express or implied; without even the implied warranty
125289e83aSChandan Nath  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
135289e83aSChandan Nath  * GNU General Public License for more details.
145289e83aSChandan Nath  */
155289e83aSChandan Nath 
165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H
175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H
185289e83aSChandan Nath 
19f16da746SChandan Nath #define CONFIG_AM33XX
205289e83aSChandan Nath 
215289e83aSChandan Nath #include <asm/arch/cpu.h>
225289e83aSChandan Nath #include <asm/arch/hardware.h>
235289e83aSChandan Nath 
2493042960SChandan Nath #define CONFIG_DMA_COHERENT
2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
2693042960SChandan Nath 
277bf038ecSTom Rini #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP		/* undef to save memory */
307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT		"U-Boot# "
325289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH
33a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
345289e83aSChandan Nath #define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
355289e83aSChandan Nath 
367bf038ecSTom Rini #define CONFIG_OF_LIBFDT
377bf038ecSTom Rini #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
387bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS
397bf038ecSTom Rini #define CONFIG_INITRD_TAG
407bf038ecSTom Rini 
417bf038ecSTom Rini /* commands to include */
427bf038ecSTom Rini #include <config_cmd_default.h>
437bf038ecSTom Rini 
445289e83aSChandan Nath #define CONFIG_CMD_ASKENV
455289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE
465289e83aSChandan Nath 
475289e83aSChandan Nath /* set to negative value for no autoboot */
485289e83aSChandan Nath #define CONFIG_BOOTDELAY		3
495289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \
507bf038ecSTom Rini 	"loadaddr=0x80200000\0" \
517bf038ecSTom Rini 	"fdtaddr=0x80F80000\0" \
527bf038ecSTom Rini 	"rdaddr=0x81000000\0" \
537bf038ecSTom Rini 	"bootfile=/boot/uImage\0" \
547bf038ecSTom Rini 	"console=ttyO0,115200n8\0" \
557bf038ecSTom Rini 	"optargs=\0" \
567bf038ecSTom Rini 	"mmcdev=0\0" \
577bf038ecSTom Rini 	"mmcroot=/dev/mmcblk0p2 rw\0" \
587bf038ecSTom Rini 	"mmcrootfstype=ext4 rootwait\0" \
597bf038ecSTom Rini 	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
607bf038ecSTom Rini 	"ramrootfstype=ext2\0" \
617bf038ecSTom Rini 	"mmcargs=setenv bootargs console=${console} " \
627bf038ecSTom Rini 		"${optargs} " \
637bf038ecSTom Rini 		"root=${mmcroot} " \
647bf038ecSTom Rini 		"rootfstype=${mmcrootfstype}\0" \
657bf038ecSTom Rini 	"bootenv=uEnv.txt\0" \
667bf038ecSTom Rini 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
677bf038ecSTom Rini 	"importbootenv=echo Importing environment from mmc ...; " \
687bf038ecSTom Rini 		"env import -t $loadaddr $filesize\0" \
697bf038ecSTom Rini 	"ramargs=setenv bootargs console=${console} " \
707bf038ecSTom Rini 		"${optargs} " \
717bf038ecSTom Rini 		"root=${ramroot} " \
727bf038ecSTom Rini 		"rootfstype=${ramrootfstype}\0" \
737bf038ecSTom Rini 	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
747bf038ecSTom Rini 	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
757bf038ecSTom Rini 	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
767bf038ecSTom Rini 	"mmcboot=echo Booting from mmc ...; " \
777bf038ecSTom Rini 		"run mmcargs; " \
787bf038ecSTom Rini 		"bootm ${loadaddr}\0" \
797bf038ecSTom Rini 	"ramboot=echo Booting from ramdisk ...; " \
807bf038ecSTom Rini 		"run ramargs; " \
817bf038ecSTom Rini 		"bootm ${loadaddr}\0" \
827bf038ecSTom Rini 
837bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \
847bf038ecSTom Rini 	"if mmc rescan ${mmcdev}; then " \
857bf038ecSTom Rini 		"echo SD/MMC found on device ${mmcdev};" \
867bf038ecSTom Rini 		"if run loadbootenv; then " \
877bf038ecSTom Rini 			"echo Loaded environment from ${bootenv};" \
887bf038ecSTom Rini 			"run importbootenv;" \
897bf038ecSTom Rini 		"fi;" \
907bf038ecSTom Rini 		"if test -n $uenvcmd; then " \
917bf038ecSTom Rini 			"echo Running uenvcmd ...;" \
927bf038ecSTom Rini 			"run uenvcmd;" \
937bf038ecSTom Rini 		"fi;" \
947bf038ecSTom Rini 		"if run loaduimage; then " \
957bf038ecSTom Rini 			"run mmcboot;" \
967bf038ecSTom Rini 		"fi;" \
977bf038ecSTom Rini 	"fi;" \
985289e83aSChandan Nath 
995289e83aSChandan Nath /* Clock Defines */
1005289e83aSChandan Nath #define V_OSCK				24000000  /* Clock output from T2 */
101750b4bfeSChandan Nath #define V_SCLK				(V_OSCK)
1025289e83aSChandan Nath 
1035289e83aSChandan Nath #define CONFIG_CMD_ECHO
1045289e83aSChandan Nath 
1055289e83aSChandan Nath /* max number of command args */
106750b4bfeSChandan Nath #define CONFIG_SYS_MAXARGS		16
1075289e83aSChandan Nath 
1085289e83aSChandan Nath /* Console I/O Buffer Size */
1095289e83aSChandan Nath #define CONFIG_SYS_CBSIZE		512
1105289e83aSChandan Nath 
1115289e83aSChandan Nath /* Print Buffer Size */
1125289e83aSChandan Nath #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
1135289e83aSChandan Nath 					+ sizeof(CONFIG_SYS_PROMPT) + 16)
1145289e83aSChandan Nath 
1155289e83aSChandan Nath /* Boot Argument Buffer Size */
1165289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
1175289e83aSChandan Nath 
1185289e83aSChandan Nath /*
1195289e83aSChandan Nath  * memtest works on 8 MB in DRAM after skipping 32MB from
1205289e83aSChandan Nath  * start addr of ram disk
1215289e83aSChandan Nath  */
1225289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
1235289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
1245289e83aSChandan Nath 					+ (8 * 1024 * 1024))
1255289e83aSChandan Nath 
1265289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
1275289e83aSChandan Nath #define CONFIG_SYS_HZ			1000 /* 1ms clock */
1285289e83aSChandan Nath 
129876bdd6dSChandan Nath #define CONFIG_MMC
130876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC
131876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC
132876bdd6dSChandan Nath #define CONFIG_CMD_MMC
133876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION
134876bdd6dSChandan Nath #define CONFIG_CMD_FAT
135876bdd6dSChandan Nath #define CONFIG_CMD_EXT2
136876bdd6dSChandan Nath 
137*a4a99fffSTom Rini #define CONFIG_SPI
138*a4a99fffSTom Rini #define CONFIG_OMAP3_SPI
139*a4a99fffSTom Rini #define CONFIG_MTD_DEVICE
140*a4a99fffSTom Rini #define CONFIG_SPI_FLASH
141*a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND
142*a4a99fffSTom Rini #define CONFIG_CMD_SF
143*a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED		(24000000)
144*a4a99fffSTom Rini 
1455289e83aSChandan Nath  /* Physical Memory Map */
1465289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
1475289e83aSChandan Nath #define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
1485289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
1495289e83aSChandan Nath 
1505289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
1515289e83aSChandan Nath #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
1525289e83aSChandan Nath 						GENERATED_GBL_DATA_SIZE)
1535289e83aSChandan Nath  /* Platform/Board specific defs */
1545289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
1555289e83aSChandan Nath #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
1565289e83aSChandan Nath #define CONFIG_SYS_HZ			1000
1575289e83aSChandan Nath 
1585289e83aSChandan Nath /* NS16550 Configuration */
1595289e83aSChandan Nath #define CONFIG_SYS_NS16550
1605289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL
1615289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
1625289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK		(48000000)
1635289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
1645289e83aSChandan Nath 
165b4116edeSPatil, Rachna /* I2C Configuration */
166b4116edeSPatil, Rachna #define CONFIG_I2C
167b4116edeSPatil, Rachna #define CONFIG_CMD_I2C
168b4116edeSPatil, Rachna #define CONFIG_HARD_I2C
169b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED		100000
170b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE		1
171d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS
172b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C
173726c05d2STom Rini #define CONFIG_CMD_EEPROM
174*a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C
175726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
176726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
177726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS
178b4116edeSPatil, Rachna 
179308252adSMarek Vasut #define CONFIG_OMAP_GPIO
180308252adSMarek Vasut 
1815289e83aSChandan Nath #define CONFIG_BAUDRATE		115200
1825289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
1835289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
1845289e83aSChandan Nath 
1855289e83aSChandan Nath /*
1865289e83aSChandan Nath  * select serial console configuration
1875289e83aSChandan Nath  */
1885289e83aSChandan Nath #define CONFIG_SERIAL1			1
1895289e83aSChandan Nath #define CONFIG_CONS_INDEX		1
1905289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET
1915289e83aSChandan Nath 
1925289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE
1935289e83aSChandan Nath 
1948a8f084eSChandan Nath /* Defines for SPL */
1958a8f084eSChandan Nath #define CONFIG_SPL
1968a8f084eSChandan Nath #define CONFIG_SPL_TEXT_BASE		0x402F0400
1978a8f084eSChandan Nath #define CONFIG_SPL_MAX_SIZE		(46 * 1024)
1988a8f084eSChandan Nath #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
1998a8f084eSChandan Nath 
2008a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR	0x80000000
2018a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
2028a8f084eSChandan Nath 
2038a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
2048a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
2058a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
2068a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
2078a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT
2088a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT
209b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT
2108a8f084eSChandan Nath 
2118a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT
2128a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT
2138a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT
2148a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT
21516e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT
216763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT
2178a8f084eSChandan Nath #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
2188a8f084eSChandan Nath 
2198a8f084eSChandan Nath /*
2208a8f084eSChandan Nath  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
2218a8f084eSChandan Nath  * 64 bytes before this address should be set aside for u-boot.img's
2228a8f084eSChandan Nath  * header. That is 0x800FFFC0--0x80100000 should not be used for any
2238a8f084eSChandan Nath  * other needs.
2248a8f084eSChandan Nath  */
2258a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE		0x80800000
2268a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
2278a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
2288a8f084eSChandan Nath 
2298a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us,
2308a8f084eSChandan Nath  * we don't need to do it twice.
2318a8f084eSChandan Nath  */
2328a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD
2338a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT
2348a8f084eSChandan Nath #endif
2355289e83aSChandan Nath 
2365289e83aSChandan Nath /* Unsupported features */
2375289e83aSChandan Nath #undef CONFIG_USE_IRQ
2385289e83aSChandan Nath 
23993042960SChandan Nath #define CONFIG_CMD_NET
24093042960SChandan Nath #define CONFIG_CMD_DHCP
24193042960SChandan Nath #define CONFIG_CMD_PING
24293042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW
24393042960SChandan Nath #define CONFIG_MII
24493042960SChandan Nath #define CONFIG_BOOTP_DEFAULT
24593042960SChandan Nath #define CONFIG_BOOTP_DNS
24693042960SChandan Nath #define CONFIG_BOOTP_DNS2
24793042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME
24893042960SChandan Nath #define CONFIG_BOOTP_GATEWAY
24993042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK
25093042960SChandan Nath #define CONFIG_NET_RETRY_COUNT         10
25193042960SChandan Nath #define CONFIG_NET_MULTI
25293042960SChandan Nath #define CONFIG_PHY_GIGE
25393042960SChandan Nath #define CONFIG_PHYLIB
254c44080b2SIlya Yanok #define CONFIG_PHY_SMSC
25593042960SChandan Nath 
2565289e83aSChandan Nath #endif	/* ! __CONFIG_AM335X_EVM_H */
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