15289e83aSChandan Nath /* 25289e83aSChandan Nath * am335x_evm.h 35289e83aSChandan Nath * 45289e83aSChandan Nath * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 55289e83aSChandan Nath * 65289e83aSChandan Nath * This program is free software; you can redistribute it and/or 75289e83aSChandan Nath * modify it under the terms of the GNU General Public License as 85289e83aSChandan Nath * published by the Free Software Foundation version 2. 95289e83aSChandan Nath * 105289e83aSChandan Nath * This program is distributed "as is" WITHOUT ANY WARRANTY of any 115289e83aSChandan Nath * kind, whether express or implied; without even the implied warranty 125289e83aSChandan Nath * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 135289e83aSChandan Nath * GNU General Public License for more details. 145289e83aSChandan Nath */ 155289e83aSChandan Nath 165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H 175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H 185289e83aSChandan Nath 19f16da746SChandan Nath #define CONFIG_AM33XX 205289e83aSChandan Nath 215289e83aSChandan Nath #include <asm/arch/cpu.h> 225289e83aSChandan Nath #include <asm/arch/hardware.h> 235289e83aSChandan Nath 2493042960SChandan Nath #define CONFIG_DMA_COHERENT 2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 2693042960SChandan Nath 277bf038ecSTom Rini #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP /* undef to save memory */ 307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT "U-Boot# " 32044fc14bSTom Rini #define CONFIG_BOARD_LATE_INIT 335289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH 34a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ 355289e83aSChandan Nath #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM 365289e83aSChandan Nath 377bf038ecSTom Rini #define CONFIG_OF_LIBFDT 38d446c903STom Rini #define CONFIG_CMD_BOOTZ 397bf038ecSTom Rini #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 407bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS 417bf038ecSTom Rini #define CONFIG_INITRD_TAG 427bf038ecSTom Rini 437bf038ecSTom Rini /* commands to include */ 447bf038ecSTom Rini #include <config_cmd_default.h> 457bf038ecSTom Rini 465289e83aSChandan Nath #define CONFIG_CMD_ASKENV 475289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE 485289e83aSChandan Nath 495289e83aSChandan Nath /* set to negative value for no autoboot */ 503580777bSKoen Kooi #define CONFIG_BOOTDELAY 1 51044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG 52044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 53a32f42f6STom Rini #ifndef CONFIG_SPL_BUILD 545289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \ 557bf038ecSTom Rini "loadaddr=0x80200000\0" \ 567bf038ecSTom Rini "fdtaddr=0x80F80000\0" \ 57f170899fShvaibhav@ti.com "fdt_high=0xffffffff\0" \ 587bf038ecSTom Rini "rdaddr=0x81000000\0" \ 597bf038ecSTom Rini "bootfile=/boot/uImage\0" \ 60044fc14bSTom Rini "fdtfile=\0" \ 617bf038ecSTom Rini "console=ttyO0,115200n8\0" \ 627bf038ecSTom Rini "optargs=\0" \ 637bf038ecSTom Rini "mmcdev=0\0" \ 643580777bSKoen Kooi "mmcroot=/dev/mmcblk0p2 ro\0" \ 657bf038ecSTom Rini "mmcrootfstype=ext4 rootwait\0" \ 66*73a27a84SKoen Kooi "bootpart=0:2\0" \ 6773c1f4afSChase Maupin "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ 6873c1f4afSChase Maupin "nandrootfstype=ubifs rootwait=1\0" \ 6973c1f4afSChase Maupin "nandsrcaddr=0x280000\0" \ 7073c1f4afSChase Maupin "nandimgsize=0x500000\0" \ 71abdd178dSChase Maupin "rootpath=/export/rootfs\0" \ 72abdd178dSChase Maupin "nfsopts=nolock\0" \ 73abdd178dSChase Maupin "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ 74abdd178dSChase Maupin "::off\0" \ 757bf038ecSTom Rini "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 767bf038ecSTom Rini "ramrootfstype=ext2\0" \ 777bf038ecSTom Rini "mmcargs=setenv bootargs console=${console} " \ 787bf038ecSTom Rini "${optargs} " \ 797bf038ecSTom Rini "root=${mmcroot} " \ 807bf038ecSTom Rini "rootfstype=${mmcrootfstype}\0" \ 8173c1f4afSChase Maupin "nandargs=setenv bootargs console=${console} " \ 8273c1f4afSChase Maupin "${optargs} " \ 8373c1f4afSChase Maupin "root=${nandroot} " \ 8473c1f4afSChase Maupin "rootfstype=${nandrootfstype}\0" \ 8563ba7c66SChase Maupin "spiroot=/dev/mtdblock4 rw\0" \ 8663ba7c66SChase Maupin "spirootfstype=jffs2\0" \ 8763ba7c66SChase Maupin "spisrcaddr=0xe0000\0" \ 8863ba7c66SChase Maupin "spiimgsize=0x362000\0" \ 8963ba7c66SChase Maupin "spibusno=0\0" \ 9063ba7c66SChase Maupin "spiargs=setenv bootargs console=${console} " \ 9163ba7c66SChase Maupin "${optargs} " \ 9263ba7c66SChase Maupin "root=${spiroot} " \ 9363ba7c66SChase Maupin "rootfstype=${spirootfstype}\0" \ 94abdd178dSChase Maupin "netargs=setenv bootargs console=${console} " \ 95abdd178dSChase Maupin "${optargs} " \ 96abdd178dSChase Maupin "root=/dev/nfs " \ 97abdd178dSChase Maupin "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ 98abdd178dSChase Maupin "ip=dhcp\0" \ 997bf038ecSTom Rini "bootenv=uEnv.txt\0" \ 100*73a27a84SKoen Kooi "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 1017bf038ecSTom Rini "importbootenv=echo Importing environment from mmc ...; " \ 1027bf038ecSTom Rini "env import -t $loadaddr $filesize\0" \ 1037bf038ecSTom Rini "ramargs=setenv bootargs console=${console} " \ 1047bf038ecSTom Rini "${optargs} " \ 1057bf038ecSTom Rini "root=${ramroot} " \ 1067bf038ecSTom Rini "rootfstype=${ramrootfstype}\0" \ 107*73a27a84SKoen Kooi "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 108*73a27a84SKoen Kooi "loaduimage=load mmc ${bootpart} ${loadaddr} ${bootfile}\0" \ 1097bf038ecSTom Rini "mmcboot=echo Booting from mmc ...; " \ 1107bf038ecSTom Rini "run mmcargs; " \ 1117bf038ecSTom Rini "bootm ${loadaddr}\0" \ 11273c1f4afSChase Maupin "nandboot=echo Booting from nand ...; " \ 11373c1f4afSChase Maupin "run nandargs; " \ 11473c1f4afSChase Maupin "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ 11573c1f4afSChase Maupin "bootm ${loadaddr}\0" \ 11663ba7c66SChase Maupin "spiboot=echo Booting from spi ...; " \ 11763ba7c66SChase Maupin "run spiargs; " \ 11863ba7c66SChase Maupin "sf probe ${spibusno}:0; " \ 11963ba7c66SChase Maupin "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ 12063ba7c66SChase Maupin "bootm ${loadaddr}\0" \ 121abdd178dSChase Maupin "netboot=echo Booting from network ...; " \ 122abdd178dSChase Maupin "setenv autoload no; " \ 123abdd178dSChase Maupin "dhcp; " \ 124abdd178dSChase Maupin "tftp ${loadaddr} ${bootfile}; " \ 125abdd178dSChase Maupin "run netargs; " \ 126abdd178dSChase Maupin "bootm ${loadaddr}\0" \ 1277bf038ecSTom Rini "ramboot=echo Booting from ramdisk ...; " \ 1287bf038ecSTom Rini "run ramargs; " \ 1297bf038ecSTom Rini "bootm ${loadaddr}\0" \ 130044fc14bSTom Rini "findfdt="\ 131044fc14bSTom Rini "if test $board_name = A335BONE; then " \ 132044fc14bSTom Rini "setenv fdtfile am335x-bone.dtb; fi; " \ 13320775906SKoen Kooi "if test $board_name = A335BNLT; then " \ 13420775906SKoen Kooi "setenv fdtfile am335x-boneblack.dtb; fi; " \ 135044fc14bSTom Rini "if test $board_name = A33515BB; then " \ 136044fc14bSTom Rini "setenv fdtfile am335x-evm.dtb; fi; " \ 137044fc14bSTom Rini "if test $board_name = A335X_SK; then " \ 138044fc14bSTom Rini "setenv fdtfile am335x-evmsk.dtb; fi\0" \ 1397bf038ecSTom Rini 140a32f42f6STom Rini #endif 141a32f42f6STom Rini 1427bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \ 14366968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 1447bf038ecSTom Rini "echo SD/MMC found on device ${mmcdev};" \ 1457bf038ecSTom Rini "if run loadbootenv; then " \ 1467bf038ecSTom Rini "echo Loaded environment from ${bootenv};" \ 1477bf038ecSTom Rini "run importbootenv;" \ 1487bf038ecSTom Rini "fi;" \ 1497bf038ecSTom Rini "if test -n $uenvcmd; then " \ 1507bf038ecSTom Rini "echo Running uenvcmd ...;" \ 1517bf038ecSTom Rini "run uenvcmd;" \ 1527bf038ecSTom Rini "fi;" \ 1537bf038ecSTom Rini "if run loaduimage; then " \ 1547bf038ecSTom Rini "run mmcboot;" \ 1557bf038ecSTom Rini "fi;" \ 15673c1f4afSChase Maupin "else " \ 15773c1f4afSChase Maupin "run nandboot;" \ 1587bf038ecSTom Rini "fi;" \ 1595289e83aSChandan Nath 1605289e83aSChandan Nath /* Clock Defines */ 1615289e83aSChandan Nath #define V_OSCK 24000000 /* Clock output from T2 */ 162750b4bfeSChandan Nath #define V_SCLK (V_OSCK) 1635289e83aSChandan Nath 1645289e83aSChandan Nath #define CONFIG_CMD_ECHO 1655289e83aSChandan Nath 1665289e83aSChandan Nath /* max number of command args */ 167750b4bfeSChandan Nath #define CONFIG_SYS_MAXARGS 16 1685289e83aSChandan Nath 1695289e83aSChandan Nath /* Console I/O Buffer Size */ 1705289e83aSChandan Nath #define CONFIG_SYS_CBSIZE 512 1715289e83aSChandan Nath 1725289e83aSChandan Nath /* Print Buffer Size */ 1735289e83aSChandan Nath #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 1745289e83aSChandan Nath + sizeof(CONFIG_SYS_PROMPT) + 16) 1755289e83aSChandan Nath 1765289e83aSChandan Nath /* Boot Argument Buffer Size */ 1775289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 1785289e83aSChandan Nath 1795289e83aSChandan Nath /* 1805289e83aSChandan Nath * memtest works on 8 MB in DRAM after skipping 32MB from 1815289e83aSChandan Nath * start addr of ram disk 1825289e83aSChandan Nath */ 1835289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 1845289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 1855289e83aSChandan Nath + (8 * 1024 * 1024)) 1865289e83aSChandan Nath 1875289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 1885289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 1895289e83aSChandan Nath 190876bdd6dSChandan Nath #define CONFIG_MMC 191876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC 192876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC 193876bdd6dSChandan Nath #define CONFIG_CMD_MMC 194876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION 195876bdd6dSChandan Nath #define CONFIG_CMD_FAT 196876bdd6dSChandan Nath #define CONFIG_CMD_EXT2 197*73a27a84SKoen Kooi #define CONFIG_CMD_EXT4 198*73a27a84SKoen Kooi #define CONFIG_CMD_FS_GENERIC 199876bdd6dSChandan Nath 200a4a99fffSTom Rini #define CONFIG_SPI 201a4a99fffSTom Rini #define CONFIG_OMAP3_SPI 202a4a99fffSTom Rini #define CONFIG_MTD_DEVICE 203a4a99fffSTom Rini #define CONFIG_SPI_FLASH 204a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND 205a4a99fffSTom Rini #define CONFIG_CMD_SF 206a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED (24000000) 207a4a99fffSTom Rini 2085289e83aSChandan Nath /* Physical Memory Map */ 2095289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 2105289e83aSChandan Nath #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 2115289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 2125289e83aSChandan Nath 2135289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 21441aebf81STom Rini #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 2155289e83aSChandan Nath GENERATED_GBL_DATA_SIZE) 2165289e83aSChandan Nath /* Platform/Board specific defs */ 2175289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 2185289e83aSChandan Nath #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 2195289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 2205289e83aSChandan Nath 2215289e83aSChandan Nath /* NS16550 Configuration */ 2225289e83aSChandan Nath #define CONFIG_SYS_NS16550 2235289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL 224c3f8318fSAndrew Bradford #define CONFIG_SERIAL_MULTI 2255289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE (-4) 2265289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK (48000000) 2275289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 228c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 229c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 230c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 231c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 232c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 2335289e83aSChandan Nath 234b4116edeSPatil, Rachna /* I2C Configuration */ 235b4116edeSPatil, Rachna #define CONFIG_I2C 236b4116edeSPatil, Rachna #define CONFIG_CMD_I2C 237b4116edeSPatil, Rachna #define CONFIG_HARD_I2C 238b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED 100000 239b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE 1 240d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS 241b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C 242726c05d2STom Rini #define CONFIG_CMD_EEPROM 243a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C 244726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 245726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 246726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS 247b4116edeSPatil, Rachna 248308252adSMarek Vasut #define CONFIG_OMAP_GPIO 249308252adSMarek Vasut 2505289e83aSChandan Nath #define CONFIG_BAUDRATE 115200 2515289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 2525289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 2535289e83aSChandan Nath 254c3f8318fSAndrew Bradford #define CONFIG_ENV_OVERWRITE 1 2555289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET 2565289e83aSChandan Nath 2575289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE 2585289e83aSChandan Nath 2598a8f084eSChandan Nath /* Defines for SPL */ 2608a8f084eSChandan Nath #define CONFIG_SPL 26147f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 2628a8f084eSChandan Nath #define CONFIG_SPL_TEXT_BASE 0x402F0400 2636feb4e9dSIlya Yanok #define CONFIG_SPL_MAX_SIZE (101 * 1024) 26441aebf81STom Rini #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 2658a8f084eSChandan Nath 2668a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR 0x80000000 2678a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 2688a8f084eSChandan Nath 2698a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 2708a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 2718a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 2728a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 2738a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT 2748a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT 275b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT 2768a8f084eSChandan Nath 2778a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT 2788a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT 2798a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT 2808a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT 28116e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT 282763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT 2836feb4e9dSIlya Yanok #define CONFIG_SPL_NET_SUPPORT 2846feb4e9dSIlya Yanok #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" 2856feb4e9dSIlya Yanok #define CONFIG_SPL_ETH_SUPPORT 28669916bcfSTom Rini #define CONFIG_SPL_SPI_SUPPORT 28769916bcfSTom Rini #define CONFIG_SPL_SPI_FLASH_SUPPORT 28869916bcfSTom Rini #define CONFIG_SPL_SPI_LOAD 28969916bcfSTom Rini #define CONFIG_SPL_SPI_BUS 0 29069916bcfSTom Rini #define CONFIG_SPL_SPI_CS 0 2914adfcd68STom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 292c0e66793SIlya Yanok #define CONFIG_SPL_MUSB_NEW_SUPPORT 29365cdd643SAlbert ARIBAUD #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 2948a8f084eSChandan Nath 295b4606c6cSIlya Yanok #define CONFIG_SPL_BOARD_INIT 296b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_AM33XX_BCH 297b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_SUPPORT 29879f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_BASE 29979f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_DRIVERS 30079f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_ECC 301b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_5_ADDR_CYCLE 302b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 303b4606c6cSIlya Yanok CONFIG_SYS_NAND_PAGE_SIZE) 304b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_SIZE 2048 305b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_OOBSIZE 64 306b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 307b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 308b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 309b4606c6cSIlya Yanok 10, 11, 12, 13, 14, 15, 16, 17, \ 310b4606c6cSIlya Yanok 18, 19, 20, 21, 22, 23, 24, 25, \ 311b4606c6cSIlya Yanok 26, 27, 28, 29, 30, 31, 32, 33, \ 312b4606c6cSIlya Yanok 34, 35, 36, 37, 38, 39, 40, 41, \ 313b4606c6cSIlya Yanok 42, 43, 44, 45, 46, 47, 48, 49, \ 314b4606c6cSIlya Yanok 50, 51, 52, 53, 54, 55, 56, 57, } 315b4606c6cSIlya Yanok 316b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSIZE 512 317b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCBYTES 14 318b4606c6cSIlya Yanok 319b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSTEPS 4 320b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ 321b4606c6cSIlya Yanok CONFIG_SYS_NAND_ECCSTEPS) 322b4606c6cSIlya Yanok 323b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 324b4606c6cSIlya Yanok 325b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 326b4606c6cSIlya Yanok 3278a8f084eSChandan Nath /* 3288a8f084eSChandan Nath * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 3298a8f084eSChandan Nath * 64 bytes before this address should be set aside for u-boot.img's 3308a8f084eSChandan Nath * header. That is 0x800FFFC0--0x80100000 should not be used for any 3318a8f084eSChandan Nath * other needs. 3328a8f084eSChandan Nath */ 3338a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE 0x80800000 3348a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 3358a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 3368a8f084eSChandan Nath 3378a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us, 3388a8f084eSChandan Nath * we don't need to do it twice. 3398a8f084eSChandan Nath */ 3408a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD 3418a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT 3428a8f084eSChandan Nath #endif 3435289e83aSChandan Nath 344d2aa1154SIlya Yanok /* 345d2aa1154SIlya Yanok * USB configuration 346d2aa1154SIlya Yanok */ 347d2aa1154SIlya Yanok #define CONFIG_USB_MUSB_DSPS 348d2aa1154SIlya Yanok #define CONFIG_ARCH_MISC_INIT 349d2aa1154SIlya Yanok #define CONFIG_MUSB_GADGET 350d2aa1154SIlya Yanok #define CONFIG_MUSB_PIO_ONLY 351d2aa1154SIlya Yanok #define CONFIG_USB_GADGET_DUALSPEED 352d2aa1154SIlya Yanok #define CONFIG_MUSB_HOST 353d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0 354d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL 355d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1 356d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1_MODE MUSB_HOST 357d2aa1154SIlya Yanok 358d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_HOST 359d2aa1154SIlya Yanok #define CONFIG_CMD_USB 360d2aa1154SIlya Yanok #define CONFIG_USB_STORAGE 361d2aa1154SIlya Yanok #endif 362d2aa1154SIlya Yanok 363d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_GADGET 364d2aa1154SIlya Yanok #define CONFIG_USB_ETHER 365d2aa1154SIlya Yanok #define CONFIG_USB_ETH_RNDIS 366c0e66793SIlya Yanok #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" 367d2aa1154SIlya Yanok #endif /* CONFIG_MUSB_GADGET */ 368d2aa1154SIlya Yanok 369c0e66793SIlya Yanok #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) 370c0e66793SIlya Yanok /* disable host part of MUSB in SPL */ 371c0e66793SIlya Yanok #undef CONFIG_MUSB_HOST 372c0e66793SIlya Yanok /* 37398bc1228STom Rini * Disable CPSW SPL support so we fit within the 101KiB limit. 374c0e66793SIlya Yanok */ 375c0e66793SIlya Yanok #undef CONFIG_SPL_ETH_SUPPORT 376c0e66793SIlya Yanok #endif 377c0e66793SIlya Yanok 3784adfcd68STom Rini /* 3794adfcd68STom Rini * Default to using SPI for environment, etc. We have multiple copies 3804adfcd68STom Rini * of SPL as the ROM will check these locations. 3814adfcd68STom Rini * 0x0 - 0x20000 : First copy of SPL 3824adfcd68STom Rini * 0x20000 - 0x40000 : Second copy of SPL 3834adfcd68STom Rini * 0x40000 - 0x60000 : Third copy of SPL 3844adfcd68STom Rini * 0x60000 - 0x80000 : Fourth copy of SPL 3854adfcd68STom Rini * 0x80000 - 0xDF000 : U-Boot 3864adfcd68STom Rini * 0xDF000 - 0xE0000 : U-Boot Environment 3874adfcd68STom Rini * 0xE0000 - 0x442000 : Linux Kernel 3884adfcd68STom Rini * 0x442000 - 0x800000 : Userland 3894adfcd68STom Rini */ 3904adfcd68STom Rini #if defined(CONFIG_SPI_BOOT) 3914adfcd68STom Rini # undef CONFIG_ENV_IS_NOWHERE 3924adfcd68STom Rini # define CONFIG_ENV_IS_IN_SPI_FLASH 3934adfcd68STom Rini # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 3944adfcd68STom Rini # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ 3954adfcd68STom Rini # define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ 3964adfcd68STom Rini #endif /* SPI support */ 3974adfcd68STom Rini 398d2aa1154SIlya Yanok /* Unsupported features */ 399d2aa1154SIlya Yanok #undef CONFIG_USE_IRQ 400d2aa1154SIlya Yanok 40193042960SChandan Nath #define CONFIG_CMD_NET 40293042960SChandan Nath #define CONFIG_CMD_DHCP 40393042960SChandan Nath #define CONFIG_CMD_PING 40493042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW 40593042960SChandan Nath #define CONFIG_MII 40693042960SChandan Nath #define CONFIG_BOOTP_DEFAULT 40793042960SChandan Nath #define CONFIG_BOOTP_DNS 40893042960SChandan Nath #define CONFIG_BOOTP_DNS2 40993042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME 41093042960SChandan Nath #define CONFIG_BOOTP_GATEWAY 41193042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK 41293042960SChandan Nath #define CONFIG_NET_RETRY_COUNT 10 41393042960SChandan Nath #define CONFIG_NET_MULTI 41493042960SChandan Nath #define CONFIG_PHY_GIGE 41593042960SChandan Nath #define CONFIG_PHYLIB 416cdd0729eSYegor Yefremov #define CONFIG_PHY_ADDR 0 417c44080b2SIlya Yanok #define CONFIG_PHY_SMSC 41893042960SChandan Nath 41998b5c269SIlya Yanok #define CONFIG_NAND 42098b5c269SIlya Yanok /* NAND support */ 42198b5c269SIlya Yanok #ifdef CONFIG_NAND 42298b5c269SIlya Yanok #define CONFIG_CMD_NAND 42398b5c269SIlya Yanok #define CONFIG_NAND_OMAP_GPMC 42498b5c269SIlya Yanok #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 42598b5c269SIlya Yanok #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ 42698b5c269SIlya Yanok /* to access nand at */ 42798b5c269SIlya Yanok /* CS0 */ 428b4606c6cSIlya Yanok #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND 429b4606c6cSIlya Yanok devices */ 4304adfcd68STom Rini #if !defined(CONFIG_SPI_BOOT) 431b4606c6cSIlya Yanok #undef CONFIG_ENV_IS_NOWHERE 432b4606c6cSIlya Yanok #define CONFIG_ENV_IS_IN_NAND 433b4606c6cSIlya Yanok #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 434b4606c6cSIlya Yanok #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 435b4606c6cSIlya Yanok #endif 4364adfcd68STom Rini #endif 43798b5c269SIlya Yanok 4385289e83aSChandan Nath #endif /* ! __CONFIG_AM335X_EVM_H */ 439