15289e83aSChandan Nath /* 25289e83aSChandan Nath * am335x_evm.h 35289e83aSChandan Nath * 45289e83aSChandan Nath * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 55289e83aSChandan Nath * 65289e83aSChandan Nath * This program is free software; you can redistribute it and/or 75289e83aSChandan Nath * modify it under the terms of the GNU General Public License as 85289e83aSChandan Nath * published by the Free Software Foundation version 2. 95289e83aSChandan Nath * 105289e83aSChandan Nath * This program is distributed "as is" WITHOUT ANY WARRANTY of any 115289e83aSChandan Nath * kind, whether express or implied; without even the implied warranty 125289e83aSChandan Nath * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 135289e83aSChandan Nath * GNU General Public License for more details. 145289e83aSChandan Nath */ 155289e83aSChandan Nath 165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H 175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H 185289e83aSChandan Nath 19f16da746SChandan Nath #define CONFIG_AM33XX 205289e83aSChandan Nath 215289e83aSChandan Nath #include <asm/arch/cpu.h> 225289e83aSChandan Nath #include <asm/arch/hardware.h> 235289e83aSChandan Nath 2493042960SChandan Nath #define CONFIG_DMA_COHERENT 2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 2693042960SChandan Nath 277bf038ecSTom Rini #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP /* undef to save memory */ 307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT "U-Boot# " 32044fc14bSTom Rini #define CONFIG_BOARD_LATE_INIT 335289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH 34a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ 355289e83aSChandan Nath #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM 365289e83aSChandan Nath 377bf038ecSTom Rini #define CONFIG_OF_LIBFDT 387bf038ecSTom Rini #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 397bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS 407bf038ecSTom Rini #define CONFIG_INITRD_TAG 417bf038ecSTom Rini 427bf038ecSTom Rini /* commands to include */ 437bf038ecSTom Rini #include <config_cmd_default.h> 447bf038ecSTom Rini 455289e83aSChandan Nath #define CONFIG_CMD_ASKENV 465289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE 475289e83aSChandan Nath 485289e83aSChandan Nath /* set to negative value for no autoboot */ 493580777bSKoen Kooi #define CONFIG_BOOTDELAY 1 50044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG 51044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 525289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \ 537bf038ecSTom Rini "loadaddr=0x80200000\0" \ 547bf038ecSTom Rini "fdtaddr=0x80F80000\0" \ 55f170899fShvaibhav@ti.com "fdt_high=0xffffffff\0" \ 567bf038ecSTom Rini "rdaddr=0x81000000\0" \ 577bf038ecSTom Rini "bootfile=/boot/uImage\0" \ 58044fc14bSTom Rini "fdtfile=\0" \ 597bf038ecSTom Rini "console=ttyO0,115200n8\0" \ 607bf038ecSTom Rini "optargs=\0" \ 617bf038ecSTom Rini "mmcdev=0\0" \ 623580777bSKoen Kooi "mmcroot=/dev/mmcblk0p2 ro\0" \ 637bf038ecSTom Rini "mmcrootfstype=ext4 rootwait\0" \ 6473c1f4afSChase Maupin "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ 6573c1f4afSChase Maupin "nandrootfstype=ubifs rootwait=1\0" \ 6673c1f4afSChase Maupin "nandsrcaddr=0x280000\0" \ 6773c1f4afSChase Maupin "nandimgsize=0x500000\0" \ 687bf038ecSTom Rini "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 697bf038ecSTom Rini "ramrootfstype=ext2\0" \ 707bf038ecSTom Rini "mmcargs=setenv bootargs console=${console} " \ 717bf038ecSTom Rini "${optargs} " \ 727bf038ecSTom Rini "root=${mmcroot} " \ 737bf038ecSTom Rini "rootfstype=${mmcrootfstype}\0" \ 7473c1f4afSChase Maupin "nandargs=setenv bootargs console=${console} " \ 7573c1f4afSChase Maupin "${optargs} " \ 7673c1f4afSChase Maupin "root=${nandroot} " \ 7773c1f4afSChase Maupin "rootfstype=${nandrootfstype}\0" \ 78*63ba7c66SChase Maupin "spiroot=/dev/mtdblock4 rw\0" \ 79*63ba7c66SChase Maupin "spirootfstype=jffs2\0" \ 80*63ba7c66SChase Maupin "spisrcaddr=0xe0000\0" \ 81*63ba7c66SChase Maupin "spiimgsize=0x362000\0" \ 82*63ba7c66SChase Maupin "spibusno=0\0" \ 83*63ba7c66SChase Maupin "spiargs=setenv bootargs console=${console} " \ 84*63ba7c66SChase Maupin "${optargs} " \ 85*63ba7c66SChase Maupin "root=${spiroot} " \ 86*63ba7c66SChase Maupin "rootfstype=${spirootfstype}\0" \ 877bf038ecSTom Rini "bootenv=uEnv.txt\0" \ 887bf038ecSTom Rini "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 897bf038ecSTom Rini "importbootenv=echo Importing environment from mmc ...; " \ 907bf038ecSTom Rini "env import -t $loadaddr $filesize\0" \ 917bf038ecSTom Rini "ramargs=setenv bootargs console=${console} " \ 927bf038ecSTom Rini "${optargs} " \ 937bf038ecSTom Rini "root=${ramroot} " \ 947bf038ecSTom Rini "rootfstype=${ramrootfstype}\0" \ 957bf038ecSTom Rini "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 967bf038ecSTom Rini "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ 977bf038ecSTom Rini "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ 987bf038ecSTom Rini "mmcboot=echo Booting from mmc ...; " \ 997bf038ecSTom Rini "run mmcargs; " \ 1007bf038ecSTom Rini "bootm ${loadaddr}\0" \ 10173c1f4afSChase Maupin "nandboot=echo Booting from nand ...; " \ 10273c1f4afSChase Maupin "run nandargs; " \ 10373c1f4afSChase Maupin "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ 10473c1f4afSChase Maupin "bootm ${loadaddr}\0" \ 105*63ba7c66SChase Maupin "spiboot=echo Booting from spi ...; " \ 106*63ba7c66SChase Maupin "run spiargs; " \ 107*63ba7c66SChase Maupin "sf probe ${spibusno}:0; " \ 108*63ba7c66SChase Maupin "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ 109*63ba7c66SChase Maupin "bootm ${loadaddr}\0" \ 1107bf038ecSTom Rini "ramboot=echo Booting from ramdisk ...; " \ 1117bf038ecSTom Rini "run ramargs; " \ 1127bf038ecSTom Rini "bootm ${loadaddr}\0" \ 113044fc14bSTom Rini "findfdt="\ 114044fc14bSTom Rini "if test $board_name = A335BONE; then " \ 115044fc14bSTom Rini "setenv fdtfile am335x-bone.dtb; fi; " \ 116044fc14bSTom Rini "if test $board_name = A33515BB; then " \ 117044fc14bSTom Rini "setenv fdtfile am335x-evm.dtb; fi; " \ 118044fc14bSTom Rini "if test $board_name = A335X_SK; then " \ 119044fc14bSTom Rini "setenv fdtfile am335x-evmsk.dtb; fi\0" \ 1207bf038ecSTom Rini 1217bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \ 12266968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 1237bf038ecSTom Rini "echo SD/MMC found on device ${mmcdev};" \ 1247bf038ecSTom Rini "if run loadbootenv; then " \ 1257bf038ecSTom Rini "echo Loaded environment from ${bootenv};" \ 1267bf038ecSTom Rini "run importbootenv;" \ 1277bf038ecSTom Rini "fi;" \ 1287bf038ecSTom Rini "if test -n $uenvcmd; then " \ 1297bf038ecSTom Rini "echo Running uenvcmd ...;" \ 1307bf038ecSTom Rini "run uenvcmd;" \ 1317bf038ecSTom Rini "fi;" \ 1327bf038ecSTom Rini "if run loaduimage; then " \ 1337bf038ecSTom Rini "run mmcboot;" \ 1347bf038ecSTom Rini "fi;" \ 13573c1f4afSChase Maupin "else " \ 13673c1f4afSChase Maupin "run nandboot;" \ 1377bf038ecSTom Rini "fi;" \ 1385289e83aSChandan Nath 1395289e83aSChandan Nath /* Clock Defines */ 1405289e83aSChandan Nath #define V_OSCK 24000000 /* Clock output from T2 */ 141750b4bfeSChandan Nath #define V_SCLK (V_OSCK) 1425289e83aSChandan Nath 1435289e83aSChandan Nath #define CONFIG_CMD_ECHO 1445289e83aSChandan Nath 1455289e83aSChandan Nath /* max number of command args */ 146750b4bfeSChandan Nath #define CONFIG_SYS_MAXARGS 16 1475289e83aSChandan Nath 1485289e83aSChandan Nath /* Console I/O Buffer Size */ 1495289e83aSChandan Nath #define CONFIG_SYS_CBSIZE 512 1505289e83aSChandan Nath 1515289e83aSChandan Nath /* Print Buffer Size */ 1525289e83aSChandan Nath #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 1535289e83aSChandan Nath + sizeof(CONFIG_SYS_PROMPT) + 16) 1545289e83aSChandan Nath 1555289e83aSChandan Nath /* Boot Argument Buffer Size */ 1565289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 1575289e83aSChandan Nath 1585289e83aSChandan Nath /* 1595289e83aSChandan Nath * memtest works on 8 MB in DRAM after skipping 32MB from 1605289e83aSChandan Nath * start addr of ram disk 1615289e83aSChandan Nath */ 1625289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 1635289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 1645289e83aSChandan Nath + (8 * 1024 * 1024)) 1655289e83aSChandan Nath 1665289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 1675289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 1685289e83aSChandan Nath 169876bdd6dSChandan Nath #define CONFIG_MMC 170876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC 171876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC 172876bdd6dSChandan Nath #define CONFIG_CMD_MMC 173876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION 174876bdd6dSChandan Nath #define CONFIG_CMD_FAT 175876bdd6dSChandan Nath #define CONFIG_CMD_EXT2 176876bdd6dSChandan Nath 177a4a99fffSTom Rini #define CONFIG_SPI 178a4a99fffSTom Rini #define CONFIG_OMAP3_SPI 179a4a99fffSTom Rini #define CONFIG_MTD_DEVICE 180a4a99fffSTom Rini #define CONFIG_SPI_FLASH 181a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND 182a4a99fffSTom Rini #define CONFIG_CMD_SF 183a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED (24000000) 184a4a99fffSTom Rini 1855289e83aSChandan Nath /* Physical Memory Map */ 1865289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 1875289e83aSChandan Nath #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 1885289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 1895289e83aSChandan Nath 1905289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 19141aebf81STom Rini #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 1925289e83aSChandan Nath GENERATED_GBL_DATA_SIZE) 1935289e83aSChandan Nath /* Platform/Board specific defs */ 1945289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 1955289e83aSChandan Nath #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 1965289e83aSChandan Nath #define CONFIG_SYS_HZ 1000 1975289e83aSChandan Nath 1985289e83aSChandan Nath /* NS16550 Configuration */ 1995289e83aSChandan Nath #define CONFIG_SYS_NS16550 2005289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL 201c3f8318fSAndrew Bradford #define CONFIG_SERIAL_MULTI 2025289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE (-4) 2035289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK (48000000) 2045289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 205c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 206c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 207c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 208c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 209c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 2105289e83aSChandan Nath 211b4116edeSPatil, Rachna /* I2C Configuration */ 212b4116edeSPatil, Rachna #define CONFIG_I2C 213b4116edeSPatil, Rachna #define CONFIG_CMD_I2C 214b4116edeSPatil, Rachna #define CONFIG_HARD_I2C 215b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED 100000 216b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE 1 217d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS 218b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C 219726c05d2STom Rini #define CONFIG_CMD_EEPROM 220a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C 221726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 222726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 223726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS 224b4116edeSPatil, Rachna 225308252adSMarek Vasut #define CONFIG_OMAP_GPIO 226308252adSMarek Vasut 2275289e83aSChandan Nath #define CONFIG_BAUDRATE 115200 2285289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 2295289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 2305289e83aSChandan Nath 231c3f8318fSAndrew Bradford #define CONFIG_ENV_OVERWRITE 1 2325289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET 2335289e83aSChandan Nath 2345289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE 2355289e83aSChandan Nath 2368a8f084eSChandan Nath /* Defines for SPL */ 2378a8f084eSChandan Nath #define CONFIG_SPL 23847f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 2398a8f084eSChandan Nath #define CONFIG_SPL_TEXT_BASE 0x402F0400 2406feb4e9dSIlya Yanok #define CONFIG_SPL_MAX_SIZE (101 * 1024) 24141aebf81STom Rini #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 2428a8f084eSChandan Nath 2438a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR 0x80000000 2448a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 2458a8f084eSChandan Nath 2468a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 2478a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 2488a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 2498a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 2508a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT 2518a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT 252b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT 2538a8f084eSChandan Nath 2548a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT 2558a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT 2568a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT 2578a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT 25816e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT 259763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT 2606feb4e9dSIlya Yanok #define CONFIG_SPL_NET_SUPPORT 2616feb4e9dSIlya Yanok #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" 2626feb4e9dSIlya Yanok #define CONFIG_SPL_ETH_SUPPORT 26369916bcfSTom Rini #define CONFIG_SPL_SPI_SUPPORT 26469916bcfSTom Rini #define CONFIG_SPL_SPI_FLASH_SUPPORT 26569916bcfSTom Rini #define CONFIG_SPL_SPI_LOAD 26669916bcfSTom Rini #define CONFIG_SPL_SPI_BUS 0 26769916bcfSTom Rini #define CONFIG_SPL_SPI_CS 0 26869916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 26969916bcfSTom Rini #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 270c0e66793SIlya Yanok #define CONFIG_SPL_MUSB_NEW_SUPPORT 2718a8f084eSChandan Nath #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 2728a8f084eSChandan Nath 273b4606c6cSIlya Yanok #define CONFIG_SPL_BOARD_INIT 274b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_AM33XX_BCH 275b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_SUPPORT 27679f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_BASE 27779f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_DRIVERS 27879f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_ECC 279b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_5_ADDR_CYCLE 280b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 281b4606c6cSIlya Yanok CONFIG_SYS_NAND_PAGE_SIZE) 282b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_SIZE 2048 283b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_OOBSIZE 64 284b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 285b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 286b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 287b4606c6cSIlya Yanok 10, 11, 12, 13, 14, 15, 16, 17, \ 288b4606c6cSIlya Yanok 18, 19, 20, 21, 22, 23, 24, 25, \ 289b4606c6cSIlya Yanok 26, 27, 28, 29, 30, 31, 32, 33, \ 290b4606c6cSIlya Yanok 34, 35, 36, 37, 38, 39, 40, 41, \ 291b4606c6cSIlya Yanok 42, 43, 44, 45, 46, 47, 48, 49, \ 292b4606c6cSIlya Yanok 50, 51, 52, 53, 54, 55, 56, 57, } 293b4606c6cSIlya Yanok 294b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSIZE 512 295b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCBYTES 14 296b4606c6cSIlya Yanok 297b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSTEPS 4 298b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ 299b4606c6cSIlya Yanok CONFIG_SYS_NAND_ECCSTEPS) 300b4606c6cSIlya Yanok 301b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 302b4606c6cSIlya Yanok 303b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 304b4606c6cSIlya Yanok 3058a8f084eSChandan Nath /* 3068a8f084eSChandan Nath * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 3078a8f084eSChandan Nath * 64 bytes before this address should be set aside for u-boot.img's 3088a8f084eSChandan Nath * header. That is 0x800FFFC0--0x80100000 should not be used for any 3098a8f084eSChandan Nath * other needs. 3108a8f084eSChandan Nath */ 3118a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE 0x80800000 3128a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 3138a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 3148a8f084eSChandan Nath 3158a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us, 3168a8f084eSChandan Nath * we don't need to do it twice. 3178a8f084eSChandan Nath */ 3188a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD 3198a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT 3208a8f084eSChandan Nath #endif 3215289e83aSChandan Nath 322d2aa1154SIlya Yanok /* 323d2aa1154SIlya Yanok * USB configuration 324d2aa1154SIlya Yanok */ 325d2aa1154SIlya Yanok #define CONFIG_USB_MUSB_DSPS 326d2aa1154SIlya Yanok #define CONFIG_ARCH_MISC_INIT 327d2aa1154SIlya Yanok #define CONFIG_MUSB_GADGET 328d2aa1154SIlya Yanok #define CONFIG_MUSB_PIO_ONLY 329d2aa1154SIlya Yanok #define CONFIG_USB_GADGET_DUALSPEED 330d2aa1154SIlya Yanok #define CONFIG_MUSB_HOST 331d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0 332d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL 333d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1 334d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1_MODE MUSB_HOST 335d2aa1154SIlya Yanok 336d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_HOST 337d2aa1154SIlya Yanok #define CONFIG_CMD_USB 338d2aa1154SIlya Yanok #define CONFIG_USB_STORAGE 339d2aa1154SIlya Yanok #endif 340d2aa1154SIlya Yanok 341d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_GADGET 342d2aa1154SIlya Yanok #define CONFIG_USB_ETHER 343d2aa1154SIlya Yanok #define CONFIG_USB_ETH_RNDIS 344c0e66793SIlya Yanok #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" 345d2aa1154SIlya Yanok #endif /* CONFIG_MUSB_GADGET */ 346d2aa1154SIlya Yanok 347c0e66793SIlya Yanok #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) 348c0e66793SIlya Yanok /* disable host part of MUSB in SPL */ 349c0e66793SIlya Yanok #undef CONFIG_MUSB_HOST 350c0e66793SIlya Yanok /* 351c0e66793SIlya Yanok * Disable UART, CPSW ethernet support and extra environment settings so we 352c0e66793SIlya Yanok * will fit within 101KiB. 353c0e66793SIlya Yanok */ 354c0e66793SIlya Yanok #undef CONFIG_SPL_ETH_SUPPORT 355c0e66793SIlya Yanok #undef CONFIG_SPL_YMODEM_SUPPORT 356c0e66793SIlya Yanok #undef CONFIG_EXTRA_ENV_SETTINGS 357c0e66793SIlya Yanok #endif 358c0e66793SIlya Yanok 359d2aa1154SIlya Yanok /* Unsupported features */ 360d2aa1154SIlya Yanok #undef CONFIG_USE_IRQ 361d2aa1154SIlya Yanok 36293042960SChandan Nath #define CONFIG_CMD_NET 36393042960SChandan Nath #define CONFIG_CMD_DHCP 36493042960SChandan Nath #define CONFIG_CMD_PING 36593042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW 36693042960SChandan Nath #define CONFIG_MII 36793042960SChandan Nath #define CONFIG_BOOTP_DEFAULT 36893042960SChandan Nath #define CONFIG_BOOTP_DNS 36993042960SChandan Nath #define CONFIG_BOOTP_DNS2 37093042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME 37193042960SChandan Nath #define CONFIG_BOOTP_GATEWAY 37293042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK 37393042960SChandan Nath #define CONFIG_NET_RETRY_COUNT 10 37493042960SChandan Nath #define CONFIG_NET_MULTI 37593042960SChandan Nath #define CONFIG_PHY_GIGE 37693042960SChandan Nath #define CONFIG_PHYLIB 377cdd0729eSYegor Yefremov #define CONFIG_PHY_ADDR 0 378c44080b2SIlya Yanok #define CONFIG_PHY_SMSC 37993042960SChandan Nath 38098b5c269SIlya Yanok #define CONFIG_NAND 38198b5c269SIlya Yanok /* NAND support */ 38298b5c269SIlya Yanok #ifdef CONFIG_NAND 38398b5c269SIlya Yanok #define CONFIG_CMD_NAND 38498b5c269SIlya Yanok #define CONFIG_NAND_OMAP_GPMC 38598b5c269SIlya Yanok #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 38698b5c269SIlya Yanok #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ 38798b5c269SIlya Yanok /* to access nand at */ 38898b5c269SIlya Yanok /* CS0 */ 389b4606c6cSIlya Yanok #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND 390b4606c6cSIlya Yanok devices */ 391b4606c6cSIlya Yanok #undef CONFIG_ENV_IS_NOWHERE 392b4606c6cSIlya Yanok #define CONFIG_ENV_IS_IN_NAND 393b4606c6cSIlya Yanok #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 394b4606c6cSIlya Yanok #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 395b4606c6cSIlya Yanok #endif 39698b5c269SIlya Yanok 3975289e83aSChandan Nath #endif /* ! __CONFIG_AM335X_EVM_H */ 398