15289e83aSChandan Nath /* 25289e83aSChandan Nath * am335x_evm.h 35289e83aSChandan Nath * 45289e83aSChandan Nath * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 55289e83aSChandan Nath * 65289e83aSChandan Nath * This program is free software; you can redistribute it and/or 75289e83aSChandan Nath * modify it under the terms of the GNU General Public License as 85289e83aSChandan Nath * published by the Free Software Foundation version 2. 95289e83aSChandan Nath * 105289e83aSChandan Nath * This program is distributed "as is" WITHOUT ANY WARRANTY of any 115289e83aSChandan Nath * kind, whether express or implied; without even the implied warranty 125289e83aSChandan Nath * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 135289e83aSChandan Nath * GNU General Public License for more details. 145289e83aSChandan Nath */ 155289e83aSChandan Nath 165289e83aSChandan Nath #ifndef __CONFIG_AM335X_EVM_H 175289e83aSChandan Nath #define __CONFIG_AM335X_EVM_H 185289e83aSChandan Nath 19f16da746SChandan Nath #define CONFIG_AM33XX 204a0eb757SSRICHARAN R #define CONFIG_OMAP 215289e83aSChandan Nath 2298f92001STom Rini #include <asm/arch/omap.h> 235289e83aSChandan Nath 2493042960SChandan Nath #define CONFIG_DMA_COHERENT 2593042960SChandan Nath #define CONFIG_DMA_COHERENT_SIZE (1 << 20) 2693042960SChandan Nath 277bf038ecSTom Rini #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 287bf038ecSTom Rini #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 297bf038ecSTom Rini #define CONFIG_SYS_LONGHELP /* undef to save memory */ 307bf038ecSTom Rini #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 31750b4bfeSChandan Nath #define CONFIG_SYS_PROMPT "U-Boot# " 32044fc14bSTom Rini #define CONFIG_BOARD_LATE_INIT 335289e83aSChandan Nath #define CONFIG_SYS_NO_FLASH 34a88f70b9STom Rini #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ 355289e83aSChandan Nath #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM 365289e83aSChandan Nath 377bf038ecSTom Rini #define CONFIG_OF_LIBFDT 38d446c903STom Rini #define CONFIG_CMD_BOOTZ 397bf038ecSTom Rini #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 407bf038ecSTom Rini #define CONFIG_SETUP_MEMORY_TAGS 417bf038ecSTom Rini #define CONFIG_INITRD_TAG 427bf038ecSTom Rini 43559eae1cSPantelis Antoniou #define CONFIG_SYS_CACHELINE_SIZE 64 44559eae1cSPantelis Antoniou 457bf038ecSTom Rini /* commands to include */ 467bf038ecSTom Rini #include <config_cmd_default.h> 477bf038ecSTom Rini 485289e83aSChandan Nath #define CONFIG_CMD_ASKENV 495289e83aSChandan Nath #define CONFIG_VERSION_VARIABLE 505289e83aSChandan Nath 515289e83aSChandan Nath /* set to negative value for no autoboot */ 523580777bSKoen Kooi #define CONFIG_BOOTDELAY 1 53044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_CONFIG 54044fc14bSTom Rini #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 55a32f42f6STom Rini #ifndef CONFIG_SPL_BUILD 565289e83aSChandan Nath #define CONFIG_EXTRA_ENV_SETTINGS \ 577bf038ecSTom Rini "loadaddr=0x80200000\0" \ 587bf038ecSTom Rini "fdtaddr=0x80F80000\0" \ 59f170899fShvaibhav@ti.com "fdt_high=0xffffffff\0" \ 607bf038ecSTom Rini "rdaddr=0x81000000\0" \ 61951d5827SKoen Kooi "bootdir=/boot\0" \ 62951d5827SKoen Kooi "bootfile=uImage\0" \ 63044fc14bSTom Rini "fdtfile=\0" \ 647bf038ecSTom Rini "console=ttyO0,115200n8\0" \ 657bf038ecSTom Rini "optargs=\0" \ 66af5666c8STom Rini "mtdids=" MTDIDS_DEFAULT "\0" \ 67af5666c8STom Rini "mtdparts=" MTDPARTS_DEFAULT "\0" \ 68ef4e9fc6SPantelis Antoniou "dfu_alt_info_mmc=" DFU_ALT_INFO_MMC "\0" \ 69ef4e9fc6SPantelis Antoniou "dfu_alt_info_emmc=rawemmc mmc 0 3751936\0" \ 70ef4e9fc6SPantelis Antoniou "dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \ 717bf038ecSTom Rini "mmcdev=0\0" \ 723580777bSKoen Kooi "mmcroot=/dev/mmcblk0p2 ro\0" \ 737bf038ecSTom Rini "mmcrootfstype=ext4 rootwait\0" \ 7473a27a84SKoen Kooi "bootpart=0:2\0" \ 7573c1f4afSChase Maupin "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ 7673c1f4afSChase Maupin "nandrootfstype=ubifs rootwait=1\0" \ 7773c1f4afSChase Maupin "nandsrcaddr=0x280000\0" \ 7873c1f4afSChase Maupin "nandimgsize=0x500000\0" \ 79abdd178dSChase Maupin "rootpath=/export/rootfs\0" \ 80abdd178dSChase Maupin "nfsopts=nolock\0" \ 81abdd178dSChase Maupin "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ 82abdd178dSChase Maupin "::off\0" \ 837bf038ecSTom Rini "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ 847bf038ecSTom Rini "ramrootfstype=ext2\0" \ 857bf038ecSTom Rini "mmcargs=setenv bootargs console=${console} " \ 867bf038ecSTom Rini "${optargs} " \ 877bf038ecSTom Rini "root=${mmcroot} " \ 887bf038ecSTom Rini "rootfstype=${mmcrootfstype}\0" \ 8973c1f4afSChase Maupin "nandargs=setenv bootargs console=${console} " \ 9073c1f4afSChase Maupin "${optargs} " \ 9173c1f4afSChase Maupin "root=${nandroot} " \ 9273c1f4afSChase Maupin "rootfstype=${nandrootfstype}\0" \ 9363ba7c66SChase Maupin "spiroot=/dev/mtdblock4 rw\0" \ 9463ba7c66SChase Maupin "spirootfstype=jffs2\0" \ 9563ba7c66SChase Maupin "spisrcaddr=0xe0000\0" \ 9663ba7c66SChase Maupin "spiimgsize=0x362000\0" \ 9763ba7c66SChase Maupin "spibusno=0\0" \ 9863ba7c66SChase Maupin "spiargs=setenv bootargs console=${console} " \ 9963ba7c66SChase Maupin "${optargs} " \ 10063ba7c66SChase Maupin "root=${spiroot} " \ 10163ba7c66SChase Maupin "rootfstype=${spirootfstype}\0" \ 102abdd178dSChase Maupin "netargs=setenv bootargs console=${console} " \ 103abdd178dSChase Maupin "${optargs} " \ 104abdd178dSChase Maupin "root=/dev/nfs " \ 105abdd178dSChase Maupin "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ 106abdd178dSChase Maupin "ip=dhcp\0" \ 1077bf038ecSTom Rini "bootenv=uEnv.txt\0" \ 10873a27a84SKoen Kooi "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ 1097bf038ecSTom Rini "importbootenv=echo Importing environment from mmc ...; " \ 1107bf038ecSTom Rini "env import -t $loadaddr $filesize\0" \ 1117bf038ecSTom Rini "ramargs=setenv bootargs console=${console} " \ 1127bf038ecSTom Rini "${optargs} " \ 1137bf038ecSTom Rini "root=${ramroot} " \ 1147bf038ecSTom Rini "rootfstype=${ramrootfstype}\0" \ 11573a27a84SKoen Kooi "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ 116951d5827SKoen Kooi "loaduimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 117951d5827SKoen Kooi "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 1187bf038ecSTom Rini "mmcboot=echo Booting from mmc ...; " \ 1197bf038ecSTom Rini "run mmcargs; " \ 120951d5827SKoen Kooi "bootm ${loadaddr} - ${fdtaddr}\0" \ 12173c1f4afSChase Maupin "nandboot=echo Booting from nand ...; " \ 12273c1f4afSChase Maupin "run nandargs; " \ 12373c1f4afSChase Maupin "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ 12473c1f4afSChase Maupin "bootm ${loadaddr}\0" \ 12563ba7c66SChase Maupin "spiboot=echo Booting from spi ...; " \ 12663ba7c66SChase Maupin "run spiargs; " \ 12763ba7c66SChase Maupin "sf probe ${spibusno}:0; " \ 12863ba7c66SChase Maupin "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ 12963ba7c66SChase Maupin "bootm ${loadaddr}\0" \ 130abdd178dSChase Maupin "netboot=echo Booting from network ...; " \ 131abdd178dSChase Maupin "setenv autoload no; " \ 132abdd178dSChase Maupin "dhcp; " \ 133abdd178dSChase Maupin "tftp ${loadaddr} ${bootfile}; " \ 134951d5827SKoen Kooi "tftp ${fdtaddr} ${fdtfile}; " \ 135abdd178dSChase Maupin "run netargs; " \ 136951d5827SKoen Kooi "bootm ${loadaddr} - ${fdtaddr}\0" \ 1377bf038ecSTom Rini "ramboot=echo Booting from ramdisk ...; " \ 1387bf038ecSTom Rini "run ramargs; " \ 139951d5827SKoen Kooi "bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ 140044fc14bSTom Rini "findfdt="\ 141044fc14bSTom Rini "if test $board_name = A335BONE; then " \ 142044fc14bSTom Rini "setenv fdtfile am335x-bone.dtb; fi; " \ 14320775906SKoen Kooi "if test $board_name = A335BNLT; then " \ 14420775906SKoen Kooi "setenv fdtfile am335x-boneblack.dtb; fi; " \ 145044fc14bSTom Rini "if test $board_name = A33515BB; then " \ 146044fc14bSTom Rini "setenv fdtfile am335x-evm.dtb; fi; " \ 147044fc14bSTom Rini "if test $board_name = A335X_SK; then " \ 148044fc14bSTom Rini "setenv fdtfile am335x-evmsk.dtb; fi\0" \ 1497bf038ecSTom Rini 150a32f42f6STom Rini #endif 151a32f42f6STom Rini 1527bf038ecSTom Rini #define CONFIG_BOOTCOMMAND \ 153951d5827SKoen Kooi "run findfdt; " \ 15466968110SAndrew Bradford "mmc dev ${mmcdev}; if mmc rescan; then " \ 1557bf038ecSTom Rini "echo SD/MMC found on device ${mmcdev};" \ 1567bf038ecSTom Rini "if run loadbootenv; then " \ 1577bf038ecSTom Rini "echo Loaded environment from ${bootenv};" \ 1587bf038ecSTom Rini "run importbootenv;" \ 1597bf038ecSTom Rini "fi;" \ 1607bf038ecSTom Rini "if test -n $uenvcmd; then " \ 1617bf038ecSTom Rini "echo Running uenvcmd ...;" \ 1627bf038ecSTom Rini "run uenvcmd;" \ 1637bf038ecSTom Rini "fi;" \ 1647bf038ecSTom Rini "if run loaduimage; then " \ 165951d5827SKoen Kooi "run loadfdt;" \ 1667bf038ecSTom Rini "run mmcboot;" \ 1677bf038ecSTom Rini "fi;" \ 16873c1f4afSChase Maupin "else " \ 16973c1f4afSChase Maupin "run nandboot;" \ 1707bf038ecSTom Rini "fi;" \ 1715289e83aSChandan Nath 1725289e83aSChandan Nath /* Clock Defines */ 1735289e83aSChandan Nath #define V_OSCK 24000000 /* Clock output from T2 */ 174750b4bfeSChandan Nath #define V_SCLK (V_OSCK) 1755289e83aSChandan Nath 1765289e83aSChandan Nath #define CONFIG_CMD_ECHO 1775289e83aSChandan Nath 178ef4e9fc6SPantelis Antoniou /* We set the max number of command args high to avoid HUSH bugs. */ 179ef4e9fc6SPantelis Antoniou #define CONFIG_SYS_MAXARGS 64 1805289e83aSChandan Nath 1815289e83aSChandan Nath /* Console I/O Buffer Size */ 1825289e83aSChandan Nath #define CONFIG_SYS_CBSIZE 512 1835289e83aSChandan Nath 1845289e83aSChandan Nath /* Print Buffer Size */ 1855289e83aSChandan Nath #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 1865289e83aSChandan Nath + sizeof(CONFIG_SYS_PROMPT) + 16) 1875289e83aSChandan Nath 1885289e83aSChandan Nath /* Boot Argument Buffer Size */ 1895289e83aSChandan Nath #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 1905289e83aSChandan Nath 1915289e83aSChandan Nath /* 1925289e83aSChandan Nath * memtest works on 8 MB in DRAM after skipping 32MB from 1935289e83aSChandan Nath * start addr of ram disk 1945289e83aSChandan Nath */ 1955289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) 1965289e83aSChandan Nath #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ 1975289e83aSChandan Nath + (8 * 1024 * 1024)) 1985289e83aSChandan Nath 1995289e83aSChandan Nath #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 2005289e83aSChandan Nath 201876bdd6dSChandan Nath #define CONFIG_MMC 202876bdd6dSChandan Nath #define CONFIG_GENERIC_MMC 203876bdd6dSChandan Nath #define CONFIG_OMAP_HSMMC 204876bdd6dSChandan Nath #define CONFIG_CMD_MMC 205876bdd6dSChandan Nath #define CONFIG_DOS_PARTITION 206876bdd6dSChandan Nath #define CONFIG_CMD_FAT 207ef4e9fc6SPantelis Antoniou #define CONFIG_FAT_WRITE 208876bdd6dSChandan Nath #define CONFIG_CMD_EXT2 20973a27a84SKoen Kooi #define CONFIG_CMD_EXT4 21073a27a84SKoen Kooi #define CONFIG_CMD_FS_GENERIC 211876bdd6dSChandan Nath 212a4a99fffSTom Rini #define CONFIG_SPI 213a4a99fffSTom Rini #define CONFIG_OMAP3_SPI 214a4a99fffSTom Rini #define CONFIG_MTD_DEVICE 215a4a99fffSTom Rini #define CONFIG_SPI_FLASH 216a4a99fffSTom Rini #define CONFIG_SPI_FLASH_WINBOND 217a4a99fffSTom Rini #define CONFIG_CMD_SF 218a4a99fffSTom Rini #define CONFIG_SF_DEFAULT_SPEED (24000000) 219a4a99fffSTom Rini 220ef4e9fc6SPantelis Antoniou /* USB Composite download gadget - g_dnl */ 221ef4e9fc6SPantelis Antoniou #define CONFIG_USB_GADGET 222ef4e9fc6SPantelis Antoniou #define CONFIG_USBDOWNLOAD_GADGET 223ef4e9fc6SPantelis Antoniou 224ef4e9fc6SPantelis Antoniou /* USB TI's IDs */ 225ef4e9fc6SPantelis Antoniou #define CONFIG_USBD_HS 226ef4e9fc6SPantelis Antoniou #define CONFIG_G_DNL_VENDOR_NUM 0x0403 227ef4e9fc6SPantelis Antoniou #define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 228ef4e9fc6SPantelis Antoniou #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" 229ef4e9fc6SPantelis Antoniou 230ef4e9fc6SPantelis Antoniou /* USB Device Firmware Update support */ 231ef4e9fc6SPantelis Antoniou #define CONFIG_DFU_FUNCTION 232ef4e9fc6SPantelis Antoniou #define CONFIG_DFU_MMC 233ef4e9fc6SPantelis Antoniou #define CONFIG_DFU_NAND 234ef4e9fc6SPantelis Antoniou #define CONFIG_CMD_DFU 235ef4e9fc6SPantelis Antoniou #define DFU_ALT_INFO_MMC \ 236ef4e9fc6SPantelis Antoniou "boot part 0 1;" \ 237ef4e9fc6SPantelis Antoniou "rootfs part 0 2;" \ 238ef4e9fc6SPantelis Antoniou "MLO fat 0 1;" \ 239ef4e9fc6SPantelis Antoniou "MLO.raw mmc 100 100;" \ 240ef4e9fc6SPantelis Antoniou "u-boot.img.raw mmc 300 3C0;" \ 241ef4e9fc6SPantelis Antoniou "u-boot.img fat 0 1;" \ 242ef4e9fc6SPantelis Antoniou "uEnv.txt fat 0 1" 243ef4e9fc6SPantelis Antoniou #define DFU_ALT_INFO_NAND \ 244ef4e9fc6SPantelis Antoniou "SPL part 0 1;" \ 245ef4e9fc6SPantelis Antoniou "SPL.backup1 part 0 2;" \ 246ef4e9fc6SPantelis Antoniou "SPL.backup2 part 0 3;" \ 247ef4e9fc6SPantelis Antoniou "SPL.backup3 part 0 4;" \ 248ef4e9fc6SPantelis Antoniou "u-boot part 0 5;" \ 249ef4e9fc6SPantelis Antoniou "kernel part 0 7;" \ 250ef4e9fc6SPantelis Antoniou "rootfs part 0 8" 251ef4e9fc6SPantelis Antoniou 2525289e83aSChandan Nath /* Physical Memory Map */ 2535289e83aSChandan Nath #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 2545289e83aSChandan Nath #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 2555289e83aSChandan Nath #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 2565289e83aSChandan Nath 2575289e83aSChandan Nath #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 25841aebf81STom Rini #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 2595289e83aSChandan Nath GENERATED_GBL_DATA_SIZE) 2605289e83aSChandan Nath /* Platform/Board specific defs */ 2615289e83aSChandan Nath #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 2625289e83aSChandan Nath #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 26315191c91SMark Jackson #define CONFIG_SYS_HZ 1000 /* 1ms clock */ 2645289e83aSChandan Nath 2655289e83aSChandan Nath /* NS16550 Configuration */ 2665289e83aSChandan Nath #define CONFIG_SYS_NS16550 2675289e83aSChandan Nath #define CONFIG_SYS_NS16550_SERIAL 2685289e83aSChandan Nath #define CONFIG_SYS_NS16550_REG_SIZE (-4) 2695289e83aSChandan Nath #define CONFIG_SYS_NS16550_CLK (48000000) 2705289e83aSChandan Nath #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 271c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 272c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 273c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 274c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 275c3f8318fSAndrew Bradford #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 2765289e83aSChandan Nath 277b4116edeSPatil, Rachna /* I2C Configuration */ 278b4116edeSPatil, Rachna #define CONFIG_I2C 279b4116edeSPatil, Rachna #define CONFIG_CMD_I2C 280b4116edeSPatil, Rachna #define CONFIG_HARD_I2C 281b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SPEED 100000 282b4116edeSPatil, Rachna #define CONFIG_SYS_I2C_SLAVE 1 283d3decdebSSteve Sakoman #define CONFIG_I2C_MULTI_BUS 284b4116edeSPatil, Rachna #define CONFIG_DRIVER_OMAP24XX_I2C 285726c05d2STom Rini #define CONFIG_CMD_EEPROM 286a4a99fffSTom Rini #define CONFIG_ENV_EEPROM_IS_ON_I2C 287726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 288726c05d2STom Rini #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 289726c05d2STom Rini #define CONFIG_SYS_I2C_MULTI_EEPROMS 290b4116edeSPatil, Rachna 291308252adSMarek Vasut #define CONFIG_OMAP_GPIO 292308252adSMarek Vasut 2935289e83aSChandan Nath #define CONFIG_BAUDRATE 115200 2945289e83aSChandan Nath #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ 2955289e83aSChandan Nath 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } 2965289e83aSChandan Nath 29747c6ea07SSRICHARAN R /* CPU */ 29847c6ea07SSRICHARAN R #define CONFIG_ARCH_CPU_INIT 29947c6ea07SSRICHARAN R 300c3f8318fSAndrew Bradford #define CONFIG_ENV_OVERWRITE 1 3015289e83aSChandan Nath #define CONFIG_SYS_CONSOLE_INFO_QUIET 3025289e83aSChandan Nath 3035289e83aSChandan Nath #define CONFIG_ENV_IS_NOWHERE 3045289e83aSChandan Nath 3058a8f084eSChandan Nath /* Defines for SPL */ 3068a8f084eSChandan Nath #define CONFIG_SPL 30747f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 308*320d9746STom Rini /* 309*320d9746STom Rini * Place the image at the start of the ROM defined image space and leave 310*320d9746STom Rini * space for SRAM scratch entries (see arch/arm/include/omap_common.h). 311*320d9746STom Rini * We limit our size to the ROM-defined downloaded image area, and use the 312*320d9746STom Rini * rest of the space for stack. 313*320d9746STom Rini */ 314*320d9746STom Rini #define CONFIG_SPL_TEXT_BASE 0x402F0500 315*320d9746STom Rini #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) 31641aebf81STom Rini #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 3178a8f084eSChandan Nath 3188a8f084eSChandan Nath #define CONFIG_SPL_BSS_START_ADDR 0x80000000 3198a8f084eSChandan Nath #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 3208a8f084eSChandan Nath 3218a8f084eSChandan Nath #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 3228a8f084eSChandan Nath #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 3238a8f084eSChandan Nath #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 3248a8f084eSChandan Nath #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 3258a8f084eSChandan Nath #define CONFIG_SPL_MMC_SUPPORT 3268a8f084eSChandan Nath #define CONFIG_SPL_FAT_SUPPORT 327b4116edeSPatil, Rachna #define CONFIG_SPL_I2C_SUPPORT 3288a8f084eSChandan Nath 3298a8f084eSChandan Nath #define CONFIG_SPL_LIBCOMMON_SUPPORT 3308a8f084eSChandan Nath #define CONFIG_SPL_LIBDISK_SUPPORT 3318a8f084eSChandan Nath #define CONFIG_SPL_LIBGENERIC_SUPPORT 3328a8f084eSChandan Nath #define CONFIG_SPL_SERIAL_SUPPORT 33316e41c85SMarek Vasut #define CONFIG_SPL_GPIO_SUPPORT 334763cf0a3SMatt Porter #define CONFIG_SPL_YMODEM_SUPPORT 3356feb4e9dSIlya Yanok #define CONFIG_SPL_NET_SUPPORT 3366feb4e9dSIlya Yanok #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" 3376feb4e9dSIlya Yanok #define CONFIG_SPL_ETH_SUPPORT 33869916bcfSTom Rini #define CONFIG_SPL_SPI_SUPPORT 33969916bcfSTom Rini #define CONFIG_SPL_SPI_FLASH_SUPPORT 34069916bcfSTom Rini #define CONFIG_SPL_SPI_LOAD 34169916bcfSTom Rini #define CONFIG_SPL_SPI_BUS 0 34269916bcfSTom Rini #define CONFIG_SPL_SPI_CS 0 3434adfcd68STom Rini #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 344c0e66793SIlya Yanok #define CONFIG_SPL_MUSB_NEW_SUPPORT 34565cdd643SAlbert ARIBAUD #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" 3468a8f084eSChandan Nath 347b4606c6cSIlya Yanok #define CONFIG_SPL_BOARD_INIT 348b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_AM33XX_BCH 349b4606c6cSIlya Yanok #define CONFIG_SPL_NAND_SUPPORT 35079f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_BASE 35179f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_DRIVERS 35279f38777SAlbert ARIBAUD #define CONFIG_SPL_NAND_ECC 353b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_5_ADDR_CYCLE 354b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 355b4606c6cSIlya Yanok CONFIG_SYS_NAND_PAGE_SIZE) 356b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_PAGE_SIZE 2048 357b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_OOBSIZE 64 358b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 359b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 360b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 361b4606c6cSIlya Yanok 10, 11, 12, 13, 14, 15, 16, 17, \ 362b4606c6cSIlya Yanok 18, 19, 20, 21, 22, 23, 24, 25, \ 363b4606c6cSIlya Yanok 26, 27, 28, 29, 30, 31, 32, 33, \ 364b4606c6cSIlya Yanok 34, 35, 36, 37, 38, 39, 40, 41, \ 365b4606c6cSIlya Yanok 42, 43, 44, 45, 46, 47, 48, 49, \ 366b4606c6cSIlya Yanok 50, 51, 52, 53, 54, 55, 56, 57, } 367b4606c6cSIlya Yanok 368b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCSIZE 512 369b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_ECCBYTES 14 370b4606c6cSIlya Yanok 371b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 372b4606c6cSIlya Yanok 373b4606c6cSIlya Yanok #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 374b4606c6cSIlya Yanok 3758a8f084eSChandan Nath /* 3768a8f084eSChandan Nath * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 3778a8f084eSChandan Nath * 64 bytes before this address should be set aside for u-boot.img's 3788a8f084eSChandan Nath * header. That is 0x800FFFC0--0x80100000 should not be used for any 3798a8f084eSChandan Nath * other needs. 3808a8f084eSChandan Nath */ 3818a8f084eSChandan Nath #define CONFIG_SYS_TEXT_BASE 0x80800000 3828a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 3838a8f084eSChandan Nath #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 3848a8f084eSChandan Nath 3858a8f084eSChandan Nath /* Since SPL did pll and ddr initialization for us, 3868a8f084eSChandan Nath * we don't need to do it twice. 3878a8f084eSChandan Nath */ 3888a8f084eSChandan Nath #ifndef CONFIG_SPL_BUILD 3898a8f084eSChandan Nath #define CONFIG_SKIP_LOWLEVEL_INIT 3908a8f084eSChandan Nath #endif 3915289e83aSChandan Nath 392d2aa1154SIlya Yanok /* 393d2aa1154SIlya Yanok * USB configuration 394d2aa1154SIlya Yanok */ 395d2aa1154SIlya Yanok #define CONFIG_USB_MUSB_DSPS 396d2aa1154SIlya Yanok #define CONFIG_ARCH_MISC_INIT 397d2aa1154SIlya Yanok #define CONFIG_MUSB_GADGET 398d2aa1154SIlya Yanok #define CONFIG_MUSB_PIO_ONLY 3994de602f2SBin Liu #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT 400d2aa1154SIlya Yanok #define CONFIG_USB_GADGET_DUALSPEED 401ef4e9fc6SPantelis Antoniou #define CONFIG_USB_GADGET_VBUS_DRAW 2 402d2aa1154SIlya Yanok #define CONFIG_MUSB_HOST 403d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0 404d2aa1154SIlya Yanok #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL 405d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1 406d2aa1154SIlya Yanok #define CONFIG_AM335X_USB1_MODE MUSB_HOST 407d2aa1154SIlya Yanok 408d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_HOST 409d2aa1154SIlya Yanok #define CONFIG_CMD_USB 410d2aa1154SIlya Yanok #define CONFIG_USB_STORAGE 411d2aa1154SIlya Yanok #endif 412d2aa1154SIlya Yanok 413d2aa1154SIlya Yanok #ifdef CONFIG_MUSB_GADGET 414d2aa1154SIlya Yanok #define CONFIG_USB_ETHER 415d2aa1154SIlya Yanok #define CONFIG_USB_ETH_RNDIS 416c0e66793SIlya Yanok #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" 417d2aa1154SIlya Yanok #endif /* CONFIG_MUSB_GADGET */ 418d2aa1154SIlya Yanok 419c0e66793SIlya Yanok #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) 420c0e66793SIlya Yanok /* disable host part of MUSB in SPL */ 421c0e66793SIlya Yanok #undef CONFIG_MUSB_HOST 422c0e66793SIlya Yanok /* 42398bc1228STom Rini * Disable CPSW SPL support so we fit within the 101KiB limit. 424c0e66793SIlya Yanok */ 425c0e66793SIlya Yanok #undef CONFIG_SPL_ETH_SUPPORT 426c0e66793SIlya Yanok #endif 427c0e66793SIlya Yanok 4284adfcd68STom Rini /* 4294adfcd68STom Rini * Default to using SPI for environment, etc. We have multiple copies 4304adfcd68STom Rini * of SPL as the ROM will check these locations. 4314adfcd68STom Rini * 0x0 - 0x20000 : First copy of SPL 4324adfcd68STom Rini * 0x20000 - 0x40000 : Second copy of SPL 4334adfcd68STom Rini * 0x40000 - 0x60000 : Third copy of SPL 4344adfcd68STom Rini * 0x60000 - 0x80000 : Fourth copy of SPL 4354adfcd68STom Rini * 0x80000 - 0xDF000 : U-Boot 4364adfcd68STom Rini * 0xDF000 - 0xE0000 : U-Boot Environment 4374adfcd68STom Rini * 0xE0000 - 0x442000 : Linux Kernel 4384adfcd68STom Rini * 0x442000 - 0x800000 : Userland 4394adfcd68STom Rini */ 4404adfcd68STom Rini #if defined(CONFIG_SPI_BOOT) 4414adfcd68STom Rini # undef CONFIG_ENV_IS_NOWHERE 4424adfcd68STom Rini # define CONFIG_ENV_IS_IN_SPI_FLASH 4434adfcd68STom Rini # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 4444adfcd68STom Rini # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ 4454adfcd68STom Rini # define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ 4464adfcd68STom Rini #endif /* SPI support */ 4474adfcd68STom Rini 448d2aa1154SIlya Yanok /* Unsupported features */ 449d2aa1154SIlya Yanok #undef CONFIG_USE_IRQ 450d2aa1154SIlya Yanok 45193042960SChandan Nath #define CONFIG_CMD_NET 45293042960SChandan Nath #define CONFIG_CMD_DHCP 45393042960SChandan Nath #define CONFIG_CMD_PING 45493042960SChandan Nath #define CONFIG_DRIVER_TI_CPSW 45593042960SChandan Nath #define CONFIG_MII 45693042960SChandan Nath #define CONFIG_BOOTP_DEFAULT 45793042960SChandan Nath #define CONFIG_BOOTP_DNS 45893042960SChandan Nath #define CONFIG_BOOTP_DNS2 45993042960SChandan Nath #define CONFIG_BOOTP_SEND_HOSTNAME 46093042960SChandan Nath #define CONFIG_BOOTP_GATEWAY 46193042960SChandan Nath #define CONFIG_BOOTP_SUBNETMASK 46293042960SChandan Nath #define CONFIG_NET_RETRY_COUNT 10 46393042960SChandan Nath #define CONFIG_NET_MULTI 46493042960SChandan Nath #define CONFIG_PHY_GIGE 46593042960SChandan Nath #define CONFIG_PHYLIB 466cdd0729eSYegor Yefremov #define CONFIG_PHY_ADDR 0 467c44080b2SIlya Yanok #define CONFIG_PHY_SMSC 46893042960SChandan Nath 46998b5c269SIlya Yanok #define CONFIG_NAND 47098b5c269SIlya Yanok /* NAND support */ 47198b5c269SIlya Yanok #ifdef CONFIG_NAND 47298b5c269SIlya Yanok #define CONFIG_CMD_NAND 473af5666c8STom Rini #define CONFIG_CMD_MTDPARTS 474af5666c8STom Rini #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 475af5666c8STom Rini #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ 476af5666c8STom Rini "128k(SPL.backup1)," \ 477af5666c8STom Rini "128k(SPL.backup2)," \ 478af5666c8STom Rini "128k(SPL.backup3),1920k(u-boot)," \ 479af5666c8STom Rini "128k(u-boot-env),5m(kernel),-(rootfs)" 48098b5c269SIlya Yanok #define CONFIG_NAND_OMAP_GPMC 48198b5c269SIlya Yanok #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 48298b5c269SIlya Yanok #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ 48398b5c269SIlya Yanok /* to access nand at */ 48498b5c269SIlya Yanok /* CS0 */ 485b4606c6cSIlya Yanok #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND 486b4606c6cSIlya Yanok devices */ 4874adfcd68STom Rini #if !defined(CONFIG_SPI_BOOT) 488b4606c6cSIlya Yanok #undef CONFIG_ENV_IS_NOWHERE 489b4606c6cSIlya Yanok #define CONFIG_ENV_IS_IN_NAND 490b4606c6cSIlya Yanok #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ 491b4606c6cSIlya Yanok #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 492b4606c6cSIlya Yanok #endif 4934adfcd68STom Rini #endif 49498b5c269SIlya Yanok 4955289e83aSChandan Nath #endif /* ! __CONFIG_AM335X_EVM_H */ 496