1e02aea61SKumar Gala /* 2e02aea61SKumar Gala * Copyright 2009-2011 Freescale Semiconductor, Inc. 3e02aea61SKumar Gala * 4*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 5e02aea61SKumar Gala */ 6e02aea61SKumar Gala 7e02aea61SKumar Gala /* 8e02aea61SKumar Gala * P5020 DS board configuration file 93e978f5dSScott Wood * Also supports P5010 DS 10e02aea61SKumar Gala */ 11e02aea61SKumar Gala #define CONFIG_P5020DS 12e02aea61SKumar Gala #define CONFIG_PHYS_64BIT 13e02aea61SKumar Gala #define CONFIG_PPC_P5020 14e02aea61SKumar Gala 15c6d33901SKumar Gala #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ 16c6d33901SKumar Gala 17c6d33901SKumar Gala #define CONFIG_MMC 18c6d33901SKumar Gala #define CONFIG_NAND_FSL_ELBC 199760b274SZang Roy-R61911 #define CONFIG_FSL_SATA_V2 20c6d33901SKumar Gala #define CONFIG_PCIE3 21e02aea61SKumar Gala #define CONFIG_PCIE4 226b3a8d00SKumar Gala #define CONFIG_SYS_FSL_RAID_ENGINE 234d28db8aSKumar Gala #define CONFIG_SYS_DPAA_RMAN 24e02aea61SKumar Gala 2511860d88STimur Tabi #define CONFIG_SYS_SRIO 2611860d88STimur Tabi #define CONFIG_SRIO1 /* SRIO port 1 */ 2711860d88STimur Tabi #define CONFIG_SRIO2 /* SRIO port 2 */ 28c8b28152SLiu Gang #define CONFIG_SRIO_PCIE_BOOT_MASTER 29e02aea61SKumar Gala #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ 30e02aea61SKumar Gala 31e02aea61SKumar Gala #include "corenet_ds.h" 32