xref: /rk3399_rockchip-uboot/include/configs/P4080DS.h (revision 8d3a25685e4aac7070365a2b3c53c2c81b27930f)
1d1712369SKumar Gala /*
2d621da00SJerry Huang  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3d1712369SKumar Gala  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5d1712369SKumar Gala  */
6d1712369SKumar Gala 
7d1712369SKumar Gala /*
8d1712369SKumar Gala  * P4080 DS board configuration file
93e978f5dSScott Wood  * Also supports P4040 DS
10d1712369SKumar Gala  */
11c6d33901SKumar Gala #define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
12c6d33901SKumar Gala 
13c6d33901SKumar Gala #define CONFIG_PCIE3
14c6d33901SKumar Gala 
15*70672a29SShaohui Xie #define CONFIG_SATA_SIL
16*70672a29SShaohui Xie #define CONFIG_SYS_SATA_MAX_DEVICE  2
17*70672a29SShaohui Xie #define CONFIG_LIBATA
18*70672a29SShaohui Xie #define CONFIG_LBA48
19*70672a29SShaohui Xie 
2011860d88STimur Tabi #define CONFIG_SYS_SRIO
2111860d88STimur Tabi #define CONFIG_SRIO1			/* SRIO port 1 */
2211860d88STimur Tabi #define CONFIG_SRIO2			/* SRIO port 2 */
23c8b28152SLiu Gang #define CONFIG_SRIO_PCIE_BOOT_MASTER
240ce8437fSKumar Gala #define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
250ce8437fSKumar Gala 
26d1712369SKumar Gala #include "corenet_ds.h"
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