1c2042f59Sgoda.yusuke /* 2c2042f59Sgoda.yusuke * Configuation settings for the Renesas Solutions Migo-R board 3c2042f59Sgoda.yusuke * 4c2042f59Sgoda.yusuke * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5c2042f59Sgoda.yusuke * 6c2042f59Sgoda.yusuke * See file CREDITS for list of people who contributed to this 7c2042f59Sgoda.yusuke * project. 8c2042f59Sgoda.yusuke * 9c2042f59Sgoda.yusuke * This program is free software; you can redistribute it and/or 10c2042f59Sgoda.yusuke * modify it under the terms of the GNU General Public License as 11c2042f59Sgoda.yusuke * published by the Free Software Foundation; either version 2 of 12c2042f59Sgoda.yusuke * the License, or (at your option) any later version. 13c2042f59Sgoda.yusuke * 14c2042f59Sgoda.yusuke * This program is distributed in the hope that it will be useful, 15c2042f59Sgoda.yusuke * but WITHOUT ANY WARRANTY; without even the implied warranty of 16c2042f59Sgoda.yusuke * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17c2042f59Sgoda.yusuke * GNU General Public License for more details. 18c2042f59Sgoda.yusuke * 19c2042f59Sgoda.yusuke * You should have received a copy of the GNU General Public License 20c2042f59Sgoda.yusuke * along with this program; if not, write to the Free Software 21c2042f59Sgoda.yusuke * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22c2042f59Sgoda.yusuke * MA 02111-1307 USA 23c2042f59Sgoda.yusuke */ 24c2042f59Sgoda.yusuke 25c2042f59Sgoda.yusuke #ifndef __MIGO_R_H 26c2042f59Sgoda.yusuke #define __MIGO_R_H 27c2042f59Sgoda.yusuke 28c2042f59Sgoda.yusuke #undef DEBUG 29c2042f59Sgoda.yusuke #define CONFIG_SH 1 30c2042f59Sgoda.yusuke #define CONFIG_SH4 1 31c2042f59Sgoda.yusuke #define CONFIG_CPU_SH7722 1 32c2042f59Sgoda.yusuke #define CONFIG_MIGO_R 1 33c2042f59Sgoda.yusuke 34c2042f59Sgoda.yusuke #define CONFIG_CMD_LOADB 35c2042f59Sgoda.yusuke #define CONFIG_CMD_LOADS 36c2042f59Sgoda.yusuke #define CONFIG_CMD_FLASH 37c2042f59Sgoda.yusuke #define CONFIG_CMD_MEMORY 38c2042f59Sgoda.yusuke #define CONFIG_CMD_NET 39c2042f59Sgoda.yusuke #define CONFIG_CMD_PING 40c2042f59Sgoda.yusuke #define CONFIG_CMD_NFS 41c2042f59Sgoda.yusuke #define CONFIG_CMD_DFL 42c2042f59Sgoda.yusuke #define CONFIG_CMD_SDRAM 43c2042f59Sgoda.yusuke #define CONFIG_CMD_ENV 44c2042f59Sgoda.yusuke 45c2042f59Sgoda.yusuke #define CONFIG_BAUDRATE 115200 46c2042f59Sgoda.yusuke #define CONFIG_BOOTDELAY 3 47c2042f59Sgoda.yusuke #define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" 48c2042f59Sgoda.yusuke 49c2042f59Sgoda.yusuke #define CONFIG_VERSION_VARIABLE 50c2042f59Sgoda.yusuke #undef CONFIG_SHOW_BOOT_PROGRESS 51c2042f59Sgoda.yusuke 52c2042f59Sgoda.yusuke /* SMC9111 */ 53c2042f59Sgoda.yusuke #define CONFIG_DRIVER_SMC91111 54c2042f59Sgoda.yusuke #define CONFIG_SMC91111_BASE (0xB0000000) 55c2042f59Sgoda.yusuke 56c2042f59Sgoda.yusuke /* MEMORY */ 57c2042f59Sgoda.yusuke #define MIGO_R_SDRAM_BASE (0x8C000000) 58c2042f59Sgoda.yusuke #define MIGO_R_FLASH_BASE_1 (0xA0000000) 59c2042f59Sgoda.yusuke #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) 60c2042f59Sgoda.yusuke 61*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP /* undef to save memory */ 62*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 63*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 64*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 65*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 66*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ 67*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 68c2042f59Sgoda.yusuke 69c2042f59Sgoda.yusuke /* SCIF */ 706c58a030SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SCIF_CONSOLE 1 71c2042f59Sgoda.yusuke #define CONFIG_CONS_SCIF0 1 72*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress display of console 73c2042f59Sgoda.yusuke information at boot */ 74*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 75*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 76c2042f59Sgoda.yusuke 77*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE) 78*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 79c2042f59Sgoda.yusuke 80c2042f59Sgoda.yusuke /* Enable alternate, more extensive, memory test */ 81*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_ALT_MEMTEST 82c2042f59Sgoda.yusuke /* Scratch address used by the alternate memory test */ 83*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_MEMTEST_SCRATCH 84c2042f59Sgoda.yusuke 85c2042f59Sgoda.yusuke /* Enable temporary baudrate change while serial download */ 86*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_LOADS_BAUD_CHANGE 87c2042f59Sgoda.yusuke 88*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE) 89c2042f59Sgoda.yusuke /* maybe more, but if so u-boot doesn't know about it... */ 90*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 91c2042f59Sgoda.yusuke /* default load address for scripts ?!? */ 92*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 93c2042f59Sgoda.yusuke 94c2042f59Sgoda.yusuke /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 95*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1) 96c2042f59Sgoda.yusuke /* Monitor size */ 97*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 98c2042f59Sgoda.yusuke /* Size of DRAM reserved for malloc() use */ 99*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 100c2042f59Sgoda.yusuke /* size in bytes reserved for initial data */ 101*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE (256) 102*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 103c2042f59Sgoda.yusuke 104c2042f59Sgoda.yusuke /* FLASH */ 105*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI 10600b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER 107*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_QUIET_TEST 108c2042f59Sgoda.yusuke /* print 'E' for empty sector on flinfo */ 109*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO 110c2042f59Sgoda.yusuke /* Physical start address of Flash memory */ 111*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1) 112c2042f59Sgoda.yusuke /* Max number of sectors on each Flash chip */ 113*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT 512 114c2042f59Sgoda.yusuke 115c2042f59Sgoda.yusuke /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ 116*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS 1 117*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } 118c2042f59Sgoda.yusuke 119c2042f59Sgoda.yusuke /* Timeout for Flash erase operations (in ms) */ 120*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 121c2042f59Sgoda.yusuke /* Timeout for Flash write operations (in ms) */ 122*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 123c2042f59Sgoda.yusuke /* Timeout for Flash set sector lock bit operations (in ms) */ 124*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 125c2042f59Sgoda.yusuke /* Timeout for Flash clear lock bit operations (in ms) */ 126*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 127c2042f59Sgoda.yusuke 128c2042f59Sgoda.yusuke /* Use hardware flash sectors protection instead of U-Boot software protection */ 129*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_PROTECTION 130*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_DIRECT_FLASH_TFTP 131c2042f59Sgoda.yusuke 132c2042f59Sgoda.yusuke /* ENV setting */ 1335a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH 134c2042f59Sgoda.yusuke #define CONFIG_ENV_OVERWRITE 1 1350e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE (128 * 1024) 1360e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 137*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 138*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 139*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 1400e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 141c2042f59Sgoda.yusuke 142c2042f59Sgoda.yusuke /* Board Clock */ 143c2042f59Sgoda.yusuke #define CONFIG_SYS_CLK_FREQ 33333333 144c2042f59Sgoda.yusuke #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 145*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) 146c2042f59Sgoda.yusuke 147c2042f59Sgoda.yusuke #endif /* __MIGO_R_H */ 148