1 /* 2 * Configuation settings for the Motorola MC5275EVB board. 3 * 4 * By Arthur Shipkowski <art@videon-central.com> 5 * Copyright (C) 2005 Videon Central, Inc. 6 * 7 * Based off of M5272C3 board code by Josef Baumgartner 8 * <josef.baumgartner@telex.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 /* 14 * board/config.h - configuration options, board specific 15 */ 16 17 #ifndef _M5275EVB_H 18 #define _M5275EVB_H 19 20 /* 21 * High Level Configuration Options 22 * (easy to change) 23 */ 24 #define CONFIG_M5275EVB /* define board type */ 25 26 #define CONFIG_MCFTMR 27 28 #define CONFIG_MCFUART 29 #define CONFIG_SYS_UART_PORT (0) 30 #define CONFIG_BAUDRATE 115200 31 32 /* Configuration for environment 33 * Environment is embedded in u-boot in the second sector of the flash 34 */ 35 #ifndef CONFIG_MONITOR_IS_IN_RAM 36 #define CONFIG_ENV_OFFSET 0x4000 37 #define CONFIG_ENV_SECT_SIZE 0x2000 38 #define CONFIG_ENV_IS_IN_FLASH 1 39 #else 40 #define CONFIG_ENV_ADDR 0xffe04000 41 #define CONFIG_ENV_SECT_SIZE 0x2000 42 #define CONFIG_ENV_IS_IN_FLASH 1 43 #endif 44 45 #define LDS_BOARD_TEXT \ 46 . = DEFINED(env_offset) ? env_offset : .; \ 47 common/env_embedded.o (.text); 48 49 /* 50 * BOOTP options 51 */ 52 #define CONFIG_BOOTP_BOOTFILESIZE 53 #define CONFIG_BOOTP_BOOTPATH 54 #define CONFIG_BOOTP_GATEWAY 55 #define CONFIG_BOOTP_HOSTNAME 56 57 /* Available command configuration */ 58 #define CONFIG_CMD_CACHE 59 #define CONFIG_CMD_MII 60 61 #define CONFIG_MCFFEC 62 #ifdef CONFIG_MCFFEC 63 #define CONFIG_MII 1 64 #define CONFIG_MII_INIT 1 65 #define CONFIG_SYS_DISCOVER_PHY 66 #define CONFIG_SYS_RX_ETH_BUFFER 8 67 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 68 #define CONFIG_SYS_FEC0_PINMUX 0 69 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 70 #define CONFIG_SYS_FEC1_PINMUX 0 71 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE 72 #define MCFFEC_TOUT_LOOP 50000 73 #define CONFIG_HAS_ETH1 74 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 75 #ifndef CONFIG_SYS_DISCOVER_PHY 76 #define FECDUPLEX FULL 77 #define FECSPEED _100BASET 78 #else 79 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 80 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 81 #endif 82 #endif 83 #endif 84 85 /* I2C */ 86 #define CONFIG_SYS_I2C 87 #define CONFIG_SYS_I2C_FSL 88 #define CONFIG_SYS_FSL_I2C_SPEED 80000 89 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 90 #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 91 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 92 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) 93 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) 94 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) 95 96 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 97 98 #if (CONFIG_CMD_KGDB) 99 # define CONFIG_SYS_CBSIZE 1024 100 #else 101 # define CONFIG_SYS_CBSIZE 256 102 #endif 103 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 104 #define CONFIG_SYS_MAXARGS 16 105 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 106 107 #define CONFIG_SYS_LOAD_ADDR 0x800000 108 109 #define CONFIG_BOOTDELAY 5 110 #define CONFIG_BOOTCOMMAND "bootm ffe40000" 111 #define CONFIG_SYS_MEMTEST_START 0x400 112 #define CONFIG_SYS_MEMTEST_END 0x380000 113 114 #ifdef CONFIG_MCFFEC 115 # define CONFIG_NET_RETRY_COUNT 5 116 # define CONFIG_OVERWRITE_ETHADDR_ONCE 117 #endif /* FEC_ENET */ 118 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "netdev=eth0\0" \ 121 "loadaddr=10000\0" \ 122 "uboot=u-boot.bin\0" \ 123 "load=tftp ${loadaddr} ${uboot}\0" \ 124 "upd=run load; run prog\0" \ 125 "prog=prot off ffe00000 ffe3ffff;" \ 126 "era ffe00000 ffe3ffff;" \ 127 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 128 "save\0" \ 129 "" 130 131 #define CONFIG_SYS_CLK 150000000 132 133 /* 134 * Low Level Configuration Settings 135 * (address mappings, register initial values, etc.) 136 * You should know what you are doing if you make changes here. 137 */ 138 139 #define CONFIG_SYS_MBAR 0x40000000 140 141 /*----------------------------------------------------------------------- 142 * Definitions for initial stack pointer and data area (in DPRAM) 143 */ 144 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 145 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 146 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 147 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 148 149 /*----------------------------------------------------------------------- 150 * Start addresses for the final memory configuration 151 * (Set up by the startup code) 152 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 153 */ 154 #define CONFIG_SYS_SDRAM_BASE 0x00000000 155 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 156 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 157 158 #ifdef CONFIG_MONITOR_IS_IN_RAM 159 #define CONFIG_SYS_MONITOR_BASE 0x20000 160 #else 161 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 162 #endif 163 164 #define CONFIG_SYS_MONITOR_LEN 0x20000 165 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 166 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 167 168 /* 169 * For booting Linux, the board info and command line data 170 * have to be in the first 8 MB of memory, since this is 171 * the maximum mapped by the Linux kernel during initialization ?? 172 */ 173 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 174 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 175 176 /*----------------------------------------------------------------------- 177 * FLASH organization 178 */ 179 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 180 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 181 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 182 183 #define CONFIG_SYS_FLASH_CFI 1 184 #define CONFIG_FLASH_CFI_DRIVER 1 185 #define CONFIG_SYS_FLASH_SIZE 0x200000 186 187 /*----------------------------------------------------------------------- 188 * Cache Configuration 189 */ 190 #define CONFIG_SYS_CACHELINE_SIZE 16 191 192 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 193 CONFIG_SYS_INIT_RAM_SIZE - 8) 194 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 195 CONFIG_SYS_INIT_RAM_SIZE - 4) 196 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 197 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 198 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 199 CF_ACR_EN | CF_ACR_SM_ALL) 200 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 201 CF_CACR_DISD | CF_CACR_INVI | \ 202 CF_CACR_CEIB | CF_CACR_DCM | \ 203 CF_CACR_EUSP) 204 205 /*----------------------------------------------------------------------- 206 * Memory bank definitions 207 */ 208 #define CONFIG_SYS_CS0_BASE 0xffe00000 209 #define CONFIG_SYS_CS0_CTRL 0x00001980 210 #define CONFIG_SYS_CS0_MASK 0x001F0001 211 212 #define CONFIG_SYS_CS1_BASE 0x30000000 213 #define CONFIG_SYS_CS1_CTRL 0x00001900 214 #define CONFIG_SYS_CS1_MASK 0x00070001 215 216 /*----------------------------------------------------------------------- 217 * Port configuration 218 */ 219 #define CONFIG_SYS_FECI2C 0x0FA0 220 221 #endif /* _M5275EVB_H */ 222