xref: /rk3399_rockchip-uboot/include/configs/M5275EVB.h (revision 0e8a75550695aba9d8cfe9c7f7713da42c1f3e89)
1545c8e0aSMatthew Fettke /*
2545c8e0aSMatthew Fettke  * Configuation settings for the Motorola MC5275EVB board.
3545c8e0aSMatthew Fettke  *
4545c8e0aSMatthew Fettke  * By Arthur Shipkowski <art@videon-central.com>
5545c8e0aSMatthew Fettke  * Copyright (C) 2005 Videon Central, Inc.
6545c8e0aSMatthew Fettke  *
7545c8e0aSMatthew Fettke  * Based off of M5272C3 board code by Josef Baumgartner
8545c8e0aSMatthew Fettke  * <josef.baumgartner@telex.de>
9545c8e0aSMatthew Fettke  *
10545c8e0aSMatthew Fettke  * See file CREDITS for list of people who contributed to this
11545c8e0aSMatthew Fettke  * project.
12545c8e0aSMatthew Fettke  *
13545c8e0aSMatthew Fettke  * This program is free software; you can redistribute it and/or
14545c8e0aSMatthew Fettke  * modify it under the terms of the GNU General Public License as
15545c8e0aSMatthew Fettke  * published by the Free Software Foundation; either version 2 of
16545c8e0aSMatthew Fettke  * the License, or (at your option) any later version.
17545c8e0aSMatthew Fettke  *
18545c8e0aSMatthew Fettke  * This program is distributed in the hope that it will be useful,
19545c8e0aSMatthew Fettke  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20545c8e0aSMatthew Fettke  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
21545c8e0aSMatthew Fettke  * GNU General Public License for more details.
22545c8e0aSMatthew Fettke  *
23545c8e0aSMatthew Fettke  * You should have received a copy of the GNU General Public License
24545c8e0aSMatthew Fettke  * along with this program; if not, write to the Free Software
25545c8e0aSMatthew Fettke  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26545c8e0aSMatthew Fettke  * MA 02111-1307 USA
27545c8e0aSMatthew Fettke  */
28545c8e0aSMatthew Fettke 
29545c8e0aSMatthew Fettke /*
30545c8e0aSMatthew Fettke  * board/config.h - configuration options, board specific
31545c8e0aSMatthew Fettke  */
32545c8e0aSMatthew Fettke 
33545c8e0aSMatthew Fettke #ifndef _M5275EVB_H
34545c8e0aSMatthew Fettke #define _M5275EVB_H
35545c8e0aSMatthew Fettke 
36545c8e0aSMatthew Fettke /*
37545c8e0aSMatthew Fettke  * High Level Configuration Options
38545c8e0aSMatthew Fettke  * (easy to change)
39545c8e0aSMatthew Fettke  */
40545c8e0aSMatthew Fettke #define CONFIG_MCF52x2			/* define processor family */
41545c8e0aSMatthew Fettke #define CONFIG_M5275			/* define processor type */
42545c8e0aSMatthew Fettke #define CONFIG_M5275EVB			/* define board type */
43545c8e0aSMatthew Fettke 
44545c8e0aSMatthew Fettke #define CONFIG_MCFTMR
45545c8e0aSMatthew Fettke 
46545c8e0aSMatthew Fettke #define CONFIG_MCFUART
476d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_UART_PORT		(0)
4879e0799cSTsiChung Liew #define CONFIG_BAUDRATE		115200
496d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
50545c8e0aSMatthew Fettke 
51545c8e0aSMatthew Fettke /* Configuration for environment
52545c8e0aSMatthew Fettke  * Environment is embedded in u-boot in the second sector of the flash
53545c8e0aSMatthew Fettke  */
54545c8e0aSMatthew Fettke #ifndef CONFIG_MONITOR_IS_IN_RAM
550e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET		0x4000
560e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
575a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
58545c8e0aSMatthew Fettke #else
590e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR		0xffe04000
600e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE	0x2000
615a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH	1
62545c8e0aSMatthew Fettke #endif
63545c8e0aSMatthew Fettke 
64545c8e0aSMatthew Fettke /*
65545c8e0aSMatthew Fettke  * BOOTP options
66545c8e0aSMatthew Fettke  */
67545c8e0aSMatthew Fettke #define CONFIG_BOOTP_BOOTFILESIZE
68545c8e0aSMatthew Fettke #define CONFIG_BOOTP_BOOTPATH
69545c8e0aSMatthew Fettke #define CONFIG_BOOTP_GATEWAY
70545c8e0aSMatthew Fettke #define CONFIG_BOOTP_HOSTNAME
71545c8e0aSMatthew Fettke 
72545c8e0aSMatthew Fettke /* Available command configuration */
73545c8e0aSMatthew Fettke #include <config_cmd_default.h>
74545c8e0aSMatthew Fettke 
75545c8e0aSMatthew Fettke #define CONFIG_CMD_PING
76545c8e0aSMatthew Fettke #define CONFIG_CMD_MII
77545c8e0aSMatthew Fettke #define CONFIG_CMD_NET
78545c8e0aSMatthew Fettke #define CONFIG_CMD_ELF
79545c8e0aSMatthew Fettke #define CONFIG_CMD_FLASH
80545c8e0aSMatthew Fettke #define CONFIG_CMD_I2C
81545c8e0aSMatthew Fettke #define CONFIG_CMD_MEMORY
82545c8e0aSMatthew Fettke #define CONFIG_CMD_DHCP
83545c8e0aSMatthew Fettke 
84545c8e0aSMatthew Fettke #undef CONFIG_CMD_LOADS
85545c8e0aSMatthew Fettke #undef CONFIG_CMD_LOADB
86545c8e0aSMatthew Fettke 
87545c8e0aSMatthew Fettke #define CONFIG_MCFFEC
88545c8e0aSMatthew Fettke #ifdef CONFIG_MCFFEC
89545c8e0aSMatthew Fettke #define CONFIG_NET_MULTI	1
90545c8e0aSMatthew Fettke #define CONFIG_MII		1
910f3ba7e9STsiChung Liew #define CONFIG_MII_INIT		1
926d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DISCOVER_PHY
936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_RX_ETH_BUFFER	8
946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FEC0_PINMUX		0
966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FEC0_MIIBASE	CONFIG_SYS_FEC0_IOBASE
976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FEC1_PINMUX		0
986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FEC1_MIIBASE	CONFIG_SYS_FEC1_IOBASE
99545c8e0aSMatthew Fettke #define MCFFEC_TOUT_LOOP	50000
100545c8e0aSMatthew Fettke #define CONFIG_HAS_ETH1
1016d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
1026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifndef CONFIG_SYS_DISCOVER_PHY
103545c8e0aSMatthew Fettke #define FECDUPLEX		FULL
104545c8e0aSMatthew Fettke #define FECSPEED		_100BASET
105545c8e0aSMatthew Fettke #else
1066d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
1076d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
108545c8e0aSMatthew Fettke #endif
109545c8e0aSMatthew Fettke #endif
110545c8e0aSMatthew Fettke #endif
111545c8e0aSMatthew Fettke 
112545c8e0aSMatthew Fettke /* I2C */
113545c8e0aSMatthew Fettke #define CONFIG_FSL_I2C
114545c8e0aSMatthew Fettke #define CONFIG_HARD_I2C		/* I2C with hw support */
115545c8e0aSMatthew Fettke #undef CONFIG_SOFT_I2C
1166d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_SPEED		80000
1176d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_SLAVE		0x7F
1186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_OFFSET		0x00000300
1196d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
1206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
1216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
1226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
123545c8e0aSMatthew Fettke 
1246d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT		"-> "
1256d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
126545c8e0aSMatthew Fettke 
127545c8e0aSMatthew Fettke #if (CONFIG_CMD_KGDB)
1286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_CBSIZE	1024
129545c8e0aSMatthew Fettke #else
1306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #	define CONFIG_SYS_CBSIZE	256
131545c8e0aSMatthew Fettke #endif
1326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
1336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS		16
1346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
135545c8e0aSMatthew Fettke 
1366d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR		0x800000
137545c8e0aSMatthew Fettke 
138545c8e0aSMatthew Fettke #define CONFIG_BOOTDELAY	5
139545c8e0aSMatthew Fettke #define CONFIG_BOOTCOMMAND	"bootm ffe40000"
1406d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START	0x400
1416d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END		0x380000
142545c8e0aSMatthew Fettke 
143*0e8a7555STsiChung Liew #ifdef CONFIG_MCFFEC
144*0e8a7555STsiChung Liew #	define CONFIG_NET_RETRY_COUNT	5
145*0e8a7555STsiChung Liew #	define CONFIG_OVERWRITE_ETHADDR_ONCE
146*0e8a7555STsiChung Liew #endif				/* FEC_ENET */
147*0e8a7555STsiChung Liew 
148*0e8a7555STsiChung Liew #define CONFIG_EXTRA_ENV_SETTINGS		\
149*0e8a7555STsiChung Liew 	"netdev=eth0\0"				\
150*0e8a7555STsiChung Liew 	"loadaddr=10000\0"			\
151*0e8a7555STsiChung Liew 	"uboot=u-boot.bin\0"			\
152*0e8a7555STsiChung Liew 	"load=tftp ${loadaddr} ${uboot}\0"	\
153*0e8a7555STsiChung Liew 	"upd=run load; run prog\0"		\
154*0e8a7555STsiChung Liew 	"prog=prot off ffe00000 ffe3ffff;"	\
155*0e8a7555STsiChung Liew 	"era ffe00000 ffe3ffff;"		\
156*0e8a7555STsiChung Liew 	"cp.b ${loadaddr} ffe00000 ${filesize};"\
157*0e8a7555STsiChung Liew 	"save\0"				\
158*0e8a7555STsiChung Liew 	""
159*0e8a7555STsiChung Liew 
1606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ			1000
1616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CLK			150000000
162545c8e0aSMatthew Fettke 
163545c8e0aSMatthew Fettke /*
164545c8e0aSMatthew Fettke  * Low Level Configuration Settings
165545c8e0aSMatthew Fettke  * (address mappings, register initial values, etc.)
166545c8e0aSMatthew Fettke  * You should know what you are doing if you make changes here.
167545c8e0aSMatthew Fettke  */
168545c8e0aSMatthew Fettke 
1696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MBAR		0x40000000
170545c8e0aSMatthew Fettke 
171545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
172545c8e0aSMatthew Fettke  * Definitions for initial stack pointer and data area (in DPRAM)
173545c8e0aSMatthew Fettke  */
1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
1756d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_RAM_END	0x10000	/* End of used area in internal SRAM */
1766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE	1000	/* bytes reserved for initial data */
1776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
1786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
179545c8e0aSMatthew Fettke 
180545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
181545c8e0aSMatthew Fettke  * Start addresses for the final memory configuration
182545c8e0aSMatthew Fettke  * (Set up by the startup code)
1836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
184545c8e0aSMatthew Fettke  */
1856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE		0x00000000
1866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
187012522feSTsiChung Liew #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
188545c8e0aSMatthew Fettke 
189545c8e0aSMatthew Fettke #ifdef CONFIG_MONITOR_IS_IN_RAM
1906d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	0x20000
191545c8e0aSMatthew Fettke #else
1926d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
193545c8e0aSMatthew Fettke #endif
194545c8e0aSMatthew Fettke 
1956d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN		0x20000
1966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
1976d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
198545c8e0aSMatthew Fettke 
199545c8e0aSMatthew Fettke /*
200545c8e0aSMatthew Fettke  * For booting Linux, the board info and command line data
201545c8e0aSMatthew Fettke  * have to be in the first 8 MB of memory, since this is
202545c8e0aSMatthew Fettke  * the maximum mapped by the Linux kernel during initialization ??
203545c8e0aSMatthew Fettke  */
204d6e4baf4STsiChung Liew #define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
205d6e4baf4STsiChung Liew #define CONFIG_SYS_BOOTM_LEN		(CONFIG_SYS_SDRAM_SIZE << 20)
206545c8e0aSMatthew Fettke 
207545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
208545c8e0aSMatthew Fettke  * FLASH organization
209545c8e0aSMatthew Fettke  */
2106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
2116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip */
2126d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT	1000
213545c8e0aSMatthew Fettke 
2146d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI		1
21500b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER	1
2166d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_SIZE		0x200000
217545c8e0aSMatthew Fettke 
218545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
219545c8e0aSMatthew Fettke  * Cache Configuration
220545c8e0aSMatthew Fettke  */
2216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CACHELINE_SIZE	16
222545c8e0aSMatthew Fettke 
223545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
224545c8e0aSMatthew Fettke  * Memory bank definitions
225545c8e0aSMatthew Fettke  */
226012522feSTsiChung Liew #define CONFIG_SYS_CS0_BASE		0xffe00000
227012522feSTsiChung Liew #define CONFIG_SYS_CS0_CTRL		0x00001980
228012522feSTsiChung Liew #define CONFIG_SYS_CS0_MASK		0x001F0001
229545c8e0aSMatthew Fettke 
230012522feSTsiChung Liew #define CONFIG_SYS_CS1_BASE		0x30000000
231012522feSTsiChung Liew #define CONFIG_SYS_CS1_CTRL		0x00001900
232012522feSTsiChung Liew #define CONFIG_SYS_CS1_MASK		0x00070001
233545c8e0aSMatthew Fettke 
234545c8e0aSMatthew Fettke /*-----------------------------------------------------------------------
235545c8e0aSMatthew Fettke  * Port configuration
236545c8e0aSMatthew Fettke  */
2376d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FECI2C		0x0FA0
238545c8e0aSMatthew Fettke 
239545c8e0aSMatthew Fettke #endif	/* _M5275EVB_H */
240