xref: /rk3399_rockchip-uboot/include/configs/M5272C3.h (revision 659e2f6736232a08acca8785c206e2b4d9cd07d7)
1bf9e3b38Swdenk /*
2bf9e3b38Swdenk  * Configuation settings for the Motorola MC5272C3 board.
3bf9e3b38Swdenk  *
4bf9e3b38Swdenk  * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5bf9e3b38Swdenk  *
6bf9e3b38Swdenk  * See file CREDITS for list of people who contributed to this
7bf9e3b38Swdenk  * project.
8bf9e3b38Swdenk  *
9bf9e3b38Swdenk  * This program is free software; you can redistribute it and/or
10bf9e3b38Swdenk  * modify it under the terms of the GNU General Public License as
11bf9e3b38Swdenk  * published by the Free Software Foundation; either version 2 of
12bf9e3b38Swdenk  * the License, or (at your option) any later version.
13bf9e3b38Swdenk  *
14bf9e3b38Swdenk  * This program is distributed in the hope that it will be useful,
15bf9e3b38Swdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16bf9e3b38Swdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
17bf9e3b38Swdenk  * GNU General Public License for more details.
18bf9e3b38Swdenk  *
19bf9e3b38Swdenk  * You should have received a copy of the GNU General Public License
20bf9e3b38Swdenk  * along with this program; if not, write to the Free Software
21bf9e3b38Swdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22bf9e3b38Swdenk  * MA 02111-1307 USA
23bf9e3b38Swdenk  */
244e5ca3ebSwdenk 
25bf9e3b38Swdenk /*
26bf9e3b38Swdenk  * board/config.h - configuration options, board specific
27bf9e3b38Swdenk  */
284e5ca3ebSwdenk 
29bf9e3b38Swdenk #ifndef _M5272C3_H
30bf9e3b38Swdenk #define _M5272C3_H
31bf9e3b38Swdenk 
32bf9e3b38Swdenk /*
33bf9e3b38Swdenk  * High Level Configuration Options
34bf9e3b38Swdenk  * (easy to change)
35bf9e3b38Swdenk  */
36bf9e3b38Swdenk #define CONFIG_MCF52x2			/* define processor family */
37bf9e3b38Swdenk #define CONFIG_M5272			/* define processor type */
384e5ca3ebSwdenk 
394e5ca3ebSwdenk #define FEC_ENET
404e5ca3ebSwdenk 
41bf9e3b38Swdenk #define CONFIG_BAUDRATE		19200
42bf9e3b38Swdenk #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
434e5ca3ebSwdenk 
44bf9e3b38Swdenk #define CONFIG_WATCHDOG
45bf9e3b38Swdenk #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
46bf9e3b38Swdenk 
47bf9e3b38Swdenk #define CONFIG_MONITOR_IS_IN_RAM	/* define if monitor is started from a pre-loader */
48bf9e3b38Swdenk 
49bf9e3b38Swdenk /* Configuration for environment
50bf9e3b38Swdenk  * Environment is embedded in u-boot in the second sector of the flash
51bf9e3b38Swdenk  */
52bf9e3b38Swdenk #ifndef CONFIG_MONITOR_IS_IN_RAM
53bf9e3b38Swdenk #define CFG_ENV_OFFSET		0x4000
54bf9e3b38Swdenk #define CFG_ENV_SECT_SIZE	0x2000
55bf9e3b38Swdenk #define CFG_ENV_IS_IN_FLASH	1
56bf9e3b38Swdenk #define CFG_ENV_IS_EMBEDDED	1
57bf9e3b38Swdenk #else
58bf9e3b38Swdenk #define CFG_ENV_ADDR		0xffe04000
59bf9e3b38Swdenk #define CFG_ENV_SECT_SIZE	0x2000
60bf9e3b38Swdenk #define CFG_ENV_IS_IN_FLASH	1
61bf9e3b38Swdenk #endif
62bf9e3b38Swdenk 
63bf9e3b38Swdenk 
648353e139SJon Loeliger /*
65*659e2f67SJon Loeliger  * BOOTP options
66*659e2f67SJon Loeliger  */
67*659e2f67SJon Loeliger #define CONFIG_BOOTP_BOOTFILESIZE
68*659e2f67SJon Loeliger #define CONFIG_BOOTP_BOOTPATH
69*659e2f67SJon Loeliger #define CONFIG_BOOTP_GATEWAY
70*659e2f67SJon Loeliger #define CONFIG_BOOTP_HOSTNAME
71*659e2f67SJon Loeliger 
72*659e2f67SJon Loeliger 
73*659e2f67SJon Loeliger /*
748353e139SJon Loeliger  * Command line configuration.
758353e139SJon Loeliger  */
768353e139SJon Loeliger #include <config_cmd_default.h>
778353e139SJon Loeliger 
788353e139SJon Loeliger #define CONFIG_CMD_MII
798353e139SJon Loeliger 
808353e139SJon Loeliger #undef CONFIG_CMD_LOADS
818353e139SJon Loeliger #undef CONFIG_CMD_LOADB
828353e139SJon Loeliger 
838353e139SJon Loeliger 
84bf9e3b38Swdenk #define CONFIG_BOOTDELAY	5
85bf9e3b38Swdenk 
86bf9e3b38Swdenk #define CFG_PROMPT		"-> "
87bf9e3b38Swdenk #define CFG_LONGHELP				/* undef to save memory		*/
88bf9e3b38Swdenk 
898353e139SJon Loeliger #if defined(CONFIG_CMD_KGDB)
90bf9e3b38Swdenk #define CFG_CBSIZE		1024		/* Console I/O Buffer Size	*/
91bf9e3b38Swdenk #else
92bf9e3b38Swdenk #define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
93bf9e3b38Swdenk #endif
94bf9e3b38Swdenk #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
95bf9e3b38Swdenk #define CFG_MAXARGS		16		/* max number of command args	*/
96bf9e3b38Swdenk #define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
97bf9e3b38Swdenk 
98bf9e3b38Swdenk #define CFG_LOAD_ADDR		0x20000
99bf9e3b38Swdenk 
100bf9e3b38Swdenk #define CFG_MEMTEST_START	0x400
101bf9e3b38Swdenk #define CFG_MEMTEST_END		0x380000
102bf9e3b38Swdenk 
103bf9e3b38Swdenk #define CFG_HZ			1000
104bf9e3b38Swdenk #define CFG_CLK			66000000
105bf9e3b38Swdenk 
106bf9e3b38Swdenk /*
107bf9e3b38Swdenk  * Low Level Configuration Settings
108bf9e3b38Swdenk  * (address mappings, register initial values, etc.)
109bf9e3b38Swdenk  * You should know what you are doing if you make changes here.
110bf9e3b38Swdenk  */
111bf9e3b38Swdenk 
112bf9e3b38Swdenk #define CFG_MBAR		0x10000000	/* Register Base Addrs */
113bf9e3b38Swdenk 
114bf9e3b38Swdenk #define CFG_SCR			0x0003;
115bf9e3b38Swdenk #define CFG_SPR			0xffff;
116bf9e3b38Swdenk 
117bf9e3b38Swdenk #define CFG_DISCOVER_PHY
118bf9e3b38Swdenk #define CFG_ENET_BD_BASE	0x380000
119bf9e3b38Swdenk 
120bf9e3b38Swdenk /*-----------------------------------------------------------------------
121bf9e3b38Swdenk  * Definitions for initial stack pointer and data area (in DPRAM)
122bf9e3b38Swdenk  */
123bf9e3b38Swdenk #define CFG_INIT_RAM_ADDR	0x20000000
124bf9e3b38Swdenk #define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM	*/
125bf9e3b38Swdenk #define CFG_GBL_DATA_SIZE	64	/* size in bytes reserved for initial data */
126bf9e3b38Swdenk #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
127bf9e3b38Swdenk #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
128bf9e3b38Swdenk 
129bf9e3b38Swdenk /*-----------------------------------------------------------------------
130bf9e3b38Swdenk  * Start addresses for the final memory configuration
131bf9e3b38Swdenk  * (Set up by the startup code)
132bf9e3b38Swdenk  * Please note that CFG_SDRAM_BASE _must_ start at 0
133bf9e3b38Swdenk  */
134bf9e3b38Swdenk #define CFG_SDRAM_BASE		0x00000000
135bf9e3b38Swdenk #define CFG_SDRAM_SIZE		4		/* SDRAM size in MB */
136bf9e3b38Swdenk #define CFG_FLASH_BASE		0xffe00000
137bf9e3b38Swdenk 
138bf9e3b38Swdenk #ifdef	CONFIG_MONITOR_IS_IN_RAM
139bf9e3b38Swdenk #define CFG_MONITOR_BASE	0x20000
140bf9e3b38Swdenk #else
141bf9e3b38Swdenk #define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
142bf9e3b38Swdenk #endif
143bf9e3b38Swdenk 
144bf9e3b38Swdenk #define CFG_MONITOR_LEN		0x20000
145bf9e3b38Swdenk #define CFG_MALLOC_LEN		(256 << 10)
146bf9e3b38Swdenk #define CFG_BOOTPARAMS_LEN	64*1024
147bf9e3b38Swdenk 
148bf9e3b38Swdenk /*
149bf9e3b38Swdenk  * For booting Linux, the board info and command line data
150bf9e3b38Swdenk  * have to be in the first 8 MB of memory, since this is
151bf9e3b38Swdenk  * the maximum mapped by the Linux kernel during initialization ??
152bf9e3b38Swdenk  */
153bf9e3b38Swdenk #define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
154bf9e3b38Swdenk 
155bf9e3b38Swdenk /*-----------------------------------------------------------------------
156bf9e3b38Swdenk  * FLASH organization
157bf9e3b38Swdenk  */
158bf9e3b38Swdenk #define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
159bf9e3b38Swdenk #define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip	*/
160bf9e3b38Swdenk #define CFG_FLASH_ERASE_TOUT	1000
161bf9e3b38Swdenk 
162bf9e3b38Swdenk /*-----------------------------------------------------------------------
163bf9e3b38Swdenk  * Cache Configuration
164bf9e3b38Swdenk  */
165bf9e3b38Swdenk #define CFG_CACHELINE_SIZE	16
166bf9e3b38Swdenk 
167bf9e3b38Swdenk /*-----------------------------------------------------------------------
168bf9e3b38Swdenk  * Memory bank definitions
169bf9e3b38Swdenk  */
170bf9e3b38Swdenk #define CFG_BR0_PRELIM		0xFFE00201
171bf9e3b38Swdenk #define CFG_OR0_PRELIM		0xFFE00014
172bf9e3b38Swdenk 
173bf9e3b38Swdenk #define CFG_BR1_PRELIM		0
174bf9e3b38Swdenk #define CFG_OR1_PRELIM		0
175bf9e3b38Swdenk 
176bf9e3b38Swdenk #define CFG_BR2_PRELIM		0x30000001
177bf9e3b38Swdenk #define CFG_OR2_PRELIM		0xFFF80000
178bf9e3b38Swdenk 
179bf9e3b38Swdenk #define CFG_BR3_PRELIM		0
180bf9e3b38Swdenk #define CFG_OR3_PRELIM		0
181bf9e3b38Swdenk 
182bf9e3b38Swdenk #define CFG_BR4_PRELIM		0
183bf9e3b38Swdenk #define CFG_OR4_PRELIM		0
184bf9e3b38Swdenk 
185bf9e3b38Swdenk #define CFG_BR5_PRELIM		0
186bf9e3b38Swdenk #define CFG_OR5_PRELIM		0
187bf9e3b38Swdenk 
188bf9e3b38Swdenk #define CFG_BR6_PRELIM		0
189bf9e3b38Swdenk #define CFG_OR6_PRELIM		0
190bf9e3b38Swdenk 
191bf9e3b38Swdenk #define CFG_BR7_PRELIM		0x00000701
192bf9e3b38Swdenk #define CFG_OR7_PRELIM		0xFFC0007C
193bf9e3b38Swdenk 
194bf9e3b38Swdenk /*-----------------------------------------------------------------------
195bf9e3b38Swdenk  * Port configuration
196bf9e3b38Swdenk  */
197bf9e3b38Swdenk #define CFG_PACNT		0x00000000
198bf9e3b38Swdenk #define CFG_PADDR		0x0000
199bf9e3b38Swdenk #define CFG_PADAT		0x0000
200bf9e3b38Swdenk #define CFG_PBCNT		0x55554155		/* Ethernet/UART configuration */
201bf9e3b38Swdenk #define CFG_PBDDR		0x0000
202bf9e3b38Swdenk #define CFG_PBDAT		0x0000
203bf9e3b38Swdenk #define CFG_PDCNT		0x00000000
204bf9e3b38Swdenk 
205bf9e3b38Swdenk #endif	/* _M5272C3_H */
206