15c7f10fdSOliver Schinagl /* 25c7f10fdSOliver Schinagl * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 35c7f10fdSOliver Schinagl * 45c7f10fdSOliver Schinagl * X-Powers AXP221 Power Management IC driver 55c7f10fdSOliver Schinagl * 65c7f10fdSOliver Schinagl * SPDX-License-Identifier: GPL-2.0+ 75c7f10fdSOliver Schinagl */ 85c7f10fdSOliver Schinagl 95c7f10fdSOliver Schinagl #define AXP221_CHIP_ADDR 0x68 105c7f10fdSOliver Schinagl #define AXP221_CTRL_ADDR 0x3e 115c7f10fdSOliver Schinagl #define AXP221_INIT_DATA 0x3e 125c7f10fdSOliver Schinagl 13bdcdf846SHans de Goede #define AXP223_DEVICE_ADDR 0x3a3 14bdcdf846SHans de Goede #define AXP223_RUNTIME_ADDR 0x2d 15bdcdf846SHans de Goede #define AXP223_DEVICE_MODE_DATA 0x7c3e00 16bdcdf846SHans de Goede 17f3fba566SHans de Goede /* Page 0 addresses */ 185c7f10fdSOliver Schinagl #define AXP221_CHIP_ID 0x03 195c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1 0x10 20*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC0_EN (1 << 0) 21*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC1_EN (1 << 1) 22*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC2_EN (1 << 2) 23*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC3_EN (1 << 3) 24*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC4_EN (1 << 4) 25*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL1_DCDC5_EN (1 << 5) 265c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO1_EN (1 << 6) 275c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL1_ALDO2_EN (1 << 7) 285c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2 0x12 295c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO1_EN (1 << 3) 305c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO2_EN (1 << 4) 315c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO3_EN (1 << 5) 325c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL2_DLDO4_EN (1 << 6) 33*50e0d5e6SHans de Goede #define AXP221_OUTPUT_CTRL2_DCDC1SW_EN (1 << 7) 345c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3 0x13 355c7f10fdSOliver Schinagl #define AXP221_OUTPUT_CTRL3_ALDO3_EN (1 << 7) 365c7f10fdSOliver Schinagl #define AXP221_DLDO1_CTRL 0x15 375c7f10fdSOliver Schinagl #define AXP221_DLDO2_CTRL 0x16 385c7f10fdSOliver Schinagl #define AXP221_DLDO3_CTRL 0x17 395c7f10fdSOliver Schinagl #define AXP221_DLDO4_CTRL 0x18 405c7f10fdSOliver Schinagl #define AXP221_DCDC1_CTRL 0x21 415c7f10fdSOliver Schinagl #define AXP221_DCDC2_CTRL 0x22 425c7f10fdSOliver Schinagl #define AXP221_DCDC3_CTRL 0x23 435c7f10fdSOliver Schinagl #define AXP221_DCDC4_CTRL 0x24 445c7f10fdSOliver Schinagl #define AXP221_DCDC5_CTRL 0x25 455c7f10fdSOliver Schinagl #define AXP221_ALDO1_CTRL 0x28 465ba47194SHans de Goede #define AXP221_ALDO2_CTRL 0x29 475c7f10fdSOliver Schinagl #define AXP221_ALDO3_CTRL 0x2a 48f3fba566SHans de Goede #define AXP221_PAGE 0xff 49f3fba566SHans de Goede 50f3fba566SHans de Goede /* Page 1 addresses */ 51f3fba566SHans de Goede #define AXP221_SID 0x20 525c7f10fdSOliver Schinagl 535c7f10fdSOliver Schinagl int axp221_set_dcdc1(unsigned int mvolt); 545c7f10fdSOliver Schinagl int axp221_set_dcdc2(unsigned int mvolt); 555c7f10fdSOliver Schinagl int axp221_set_dcdc3(unsigned int mvolt); 565c7f10fdSOliver Schinagl int axp221_set_dcdc4(unsigned int mvolt); 575c7f10fdSOliver Schinagl int axp221_set_dcdc5(unsigned int mvolt); 585c7f10fdSOliver Schinagl int axp221_set_dldo1(unsigned int mvolt); 595c7f10fdSOliver Schinagl int axp221_set_dldo2(unsigned int mvolt); 605c7f10fdSOliver Schinagl int axp221_set_dldo3(unsigned int mvolt); 615c7f10fdSOliver Schinagl int axp221_set_dldo4(unsigned int mvolt); 625c7f10fdSOliver Schinagl int axp221_set_aldo1(unsigned int mvolt); 635c7f10fdSOliver Schinagl int axp221_set_aldo2(unsigned int mvolt); 645c7f10fdSOliver Schinagl int axp221_set_aldo3(unsigned int mvolt); 655c7f10fdSOliver Schinagl int axp221_init(void); 66f3fba566SHans de Goede int axp221_get_sid(unsigned int *sid); 67