1 /* 2 * Copyright (C) 2005-2006 Atmel Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef __ATMEL_MCI_H__ 7 #define __ATMEL_MCI_H__ 8 9 int atmel_mci_init(void *regs); 10 11 #ifndef __ASSEMBLY__ 12 13 /* 14 * Structure for struct SoC access. 15 * Names starting with '_' are fillers. 16 */ 17 typedef struct atmel_mci { 18 /* reg Offset */ 19 u32 cr; /* 0x00 */ 20 u32 mr; /* 0x04 */ 21 u32 dtor; /* 0x08 */ 22 u32 sdcr; /* 0x0c */ 23 u32 argr; /* 0x10 */ 24 u32 cmdr; /* 0x14 */ 25 u32 blkr; /* 0x18 */ 26 u32 _1c; /* 0x1c */ 27 u32 rspr; /* 0x20 */ 28 u32 rspr1; /* 0x24 */ 29 u32 rspr2; /* 0x28 */ 30 u32 rspr3; /* 0x2c */ 31 u32 rdr; /* 0x30 */ 32 u32 tdr; /* 0x34 */ 33 u32 _38; /* 0x38 */ 34 u32 _3c; /* 0x3c */ 35 u32 sr; /* 0x40 */ 36 u32 ier; /* 0x44 */ 37 u32 idr; /* 0x48 */ 38 u32 imr; /* 0x4c */ 39 u32 reserved[43]; 40 u32 version; 41 } atmel_mci_t; 42 43 #endif /* __ASSEMBLY__ */ 44 45 /* Bitfields in CR */ 46 #define MMCI_MCIEN_OFFSET 0 47 #define MMCI_MCIEN_SIZE 1 48 #define MMCI_MCIDIS_OFFSET 1 49 #define MMCI_MCIDIS_SIZE 1 50 #define MMCI_PWSEN_OFFSET 2 51 #define MMCI_PWSEN_SIZE 1 52 #define MMCI_PWSDIS_OFFSET 3 53 #define MMCI_PWSDIS_SIZE 1 54 #define MMCI_SWRST_OFFSET 7 55 #define MMCI_SWRST_SIZE 1 56 57 /* Bitfields in MR */ 58 #define MMCI_CLKDIV_OFFSET 0 59 #define MMCI_CLKDIV_SIZE 8 60 #define MMCI_PWSDIV_OFFSET 8 61 #define MMCI_PWSDIV_SIZE 3 62 #define MMCI_RDPROOF_OFFSET 11 63 #define MMCI_RDPROOF_SIZE 1 64 #define MMCI_WRPROOF_OFFSET 12 65 #define MMCI_WRPROOF_SIZE 1 66 #define MMCI_PDCPADV_OFFSET 14 67 #define MMCI_PDCPADV_SIZE 1 68 #define MMCI_PDCMODE_OFFSET 15 69 #define MMCI_PDCMODE_SIZE 1 70 /* MCI IP version >= 0x500, MR bit 16 used for CLKODD */ 71 #define MMCI_CLKODD_OFFSET 16 72 #define MMCI_CLKODD_SIZE 1 73 /* MCI IP version < 0x200, MR higher 16bits for BLKLEN */ 74 #define MMCI_BLKLEN_OFFSET 16 75 #define MMCI_BLKLEN_SIZE 16 76 77 /* Bitfields in DTOR */ 78 #define MMCI_DTOCYC_OFFSET 0 79 #define MMCI_DTOCYC_SIZE 4 80 #define MMCI_DTOMUL_OFFSET 4 81 #define MMCI_DTOMUL_SIZE 3 82 83 /* Bitfields in SDCR */ 84 #define MMCI_SCDSEL_OFFSET 0 85 #define MMCI_SCDSEL_SIZE 4 86 #define MMCI_SCDBUS_OFFSET 7 87 #define MMCI_SCDBUS_SIZE 1 88 89 /* Bitfields in ARGR */ 90 #define MMCI_ARG_OFFSET 0 91 #define MMCI_ARG_SIZE 32 92 93 /* Bitfields in CMDR */ 94 #define MMCI_CMDNB_OFFSET 0 95 #define MMCI_CMDNB_SIZE 6 96 #define MMCI_RSPTYP_OFFSET 6 97 #define MMCI_RSPTYP_SIZE 2 98 #define MMCI_SPCMD_OFFSET 8 99 #define MMCI_SPCMD_SIZE 3 100 #define MMCI_OPDCMD_OFFSET 11 101 #define MMCI_OPDCMD_SIZE 1 102 #define MMCI_MAXLAT_OFFSET 12 103 #define MMCI_MAXLAT_SIZE 1 104 #define MMCI_TRCMD_OFFSET 16 105 #define MMCI_TRCMD_SIZE 2 106 #define MMCI_TRDIR_OFFSET 18 107 #define MMCI_TRDIR_SIZE 1 108 #define MMCI_TRTYP_OFFSET 19 109 #define MMCI_TRTYP_SIZE 2 110 111 /* Bitfields in BLKR */ 112 /* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */ 113 #define MMCI_BCNT_OFFSET 0 114 #define MMCI_BCNT_SIZE 16 115 116 /* Bitfields in RSPRx */ 117 #define MMCI_RSP_OFFSET 0 118 #define MMCI_RSP_SIZE 32 119 120 /* Bitfields in SR/IER/IDR/IMR */ 121 #define MMCI_CMDRDY_OFFSET 0 122 #define MMCI_CMDRDY_SIZE 1 123 #define MMCI_RXRDY_OFFSET 1 124 #define MMCI_RXRDY_SIZE 1 125 #define MMCI_TXRDY_OFFSET 2 126 #define MMCI_TXRDY_SIZE 1 127 #define MMCI_BLKE_OFFSET 3 128 #define MMCI_BLKE_SIZE 1 129 #define MMCI_DTIP_OFFSET 4 130 #define MMCI_DTIP_SIZE 1 131 #define MMCI_NOTBUSY_OFFSET 5 132 #define MMCI_NOTBUSY_SIZE 1 133 #define MMCI_ENDRX_OFFSET 6 134 #define MMCI_ENDRX_SIZE 1 135 #define MMCI_ENDTX_OFFSET 7 136 #define MMCI_ENDTX_SIZE 1 137 #define MMCI_RXBUFF_OFFSET 14 138 #define MMCI_RXBUFF_SIZE 1 139 #define MMCI_TXBUFE_OFFSET 15 140 #define MMCI_TXBUFE_SIZE 1 141 #define MMCI_RINDE_OFFSET 16 142 #define MMCI_RINDE_SIZE 1 143 #define MMCI_RDIRE_OFFSET 17 144 #define MMCI_RDIRE_SIZE 1 145 #define MMCI_RCRCE_OFFSET 18 146 #define MMCI_RCRCE_SIZE 1 147 #define MMCI_RENDE_OFFSET 19 148 #define MMCI_RENDE_SIZE 1 149 #define MMCI_RTOE_OFFSET 20 150 #define MMCI_RTOE_SIZE 1 151 #define MMCI_DCRCE_OFFSET 21 152 #define MMCI_DCRCE_SIZE 1 153 #define MMCI_DTOE_OFFSET 22 154 #define MMCI_DTOE_SIZE 1 155 #define MMCI_OVRE_OFFSET 30 156 #define MMCI_OVRE_SIZE 1 157 #define MMCI_UNRE_OFFSET 31 158 #define MMCI_UNRE_SIZE 1 159 160 /* Constants for DTOMUL */ 161 #define MMCI_DTOMUL_1_CYCLE 0 162 #define MMCI_DTOMUL_16_CYCLES 1 163 #define MMCI_DTOMUL_128_CYCLES 2 164 #define MMCI_DTOMUL_256_CYCLES 3 165 #define MMCI_DTOMUL_1024_CYCLES 4 166 #define MMCI_DTOMUL_4096_CYCLES 5 167 #define MMCI_DTOMUL_65536_CYCLES 6 168 #define MMCI_DTOMUL_1048576_CYCLES 7 169 170 /* Constants for RSPTYP */ 171 #define MMCI_RSPTYP_NO_RESP 0 172 #define MMCI_RSPTYP_48_BIT_RESP 1 173 #define MMCI_RSPTYP_136_BIT_RESP 2 174 175 /* Constants for SPCMD */ 176 #define MMCI_SPCMD_NO_SPEC_CMD 0 177 #define MMCI_SPCMD_INIT_CMD 1 178 #define MMCI_SPCMD_SYNC_CMD 2 179 #define MMCI_SPCMD_INT_CMD 4 180 #define MMCI_SPCMD_INT_RESP 5 181 182 /* Constants for TRCMD */ 183 #define MMCI_TRCMD_NO_TRANS 0 184 #define MMCI_TRCMD_START_TRANS 1 185 #define MMCI_TRCMD_STOP_TRANS 2 186 187 /* Constants for TRTYP */ 188 #define MMCI_TRTYP_BLOCK 0 189 #define MMCI_TRTYP_MULTI_BLOCK 1 190 #define MMCI_TRTYP_STREAM 2 191 192 /* Bit manipulation macros */ 193 #define MMCI_BIT(name) \ 194 (1 << MMCI_##name##_OFFSET) 195 #define MMCI_BF(name,value) \ 196 (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \ 197 << MMCI_##name##_OFFSET) 198 #define MMCI_BFEXT(name,value) \ 199 (((value) >> MMCI_##name##_OFFSET)\ 200 & ((1 << MMCI_##name##_SIZE) - 1)) 201 #define MMCI_BFINS(name,value,old) \ 202 (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \ 203 << MMCI_##name##_OFFSET)) \ 204 | MMCI_BF(name,value)) 205 206 #endif /* __ATMEL_MCI_H__ */ 207