1 /* 2 * Copyright (C) 2005-2006 Atmel Corporation 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 #ifndef __ATMEL_MCI_H__ 23 #define __ATMEL_MCI_H__ 24 25 int atmel_mci_init(void *regs); 26 27 #ifndef __ASSEMBLY__ 28 29 /* 30 * Structure for struct SoC access. 31 * Names starting with '_' are fillers. 32 */ 33 typedef struct atmel_mci { 34 /* reg Offset */ 35 u32 cr; /* 0x00 */ 36 u32 mr; /* 0x04 */ 37 u32 dtor; /* 0x08 */ 38 u32 sdcr; /* 0x0c */ 39 u32 argr; /* 0x10 */ 40 u32 cmdr; /* 0x14 */ 41 u32 _18; /* 0x18 */ 42 u32 _1c; /* 0x1c */ 43 u32 rspr; /* 0x20 */ 44 u32 rspr1; /* 0x24 */ 45 u32 rspr2; /* 0x28 */ 46 u32 rspr3; /* 0x2c */ 47 u32 rdr; /* 0x30 */ 48 u32 tdr; /* 0x34 */ 49 u32 _38; /* 0x38 */ 50 u32 _3c; /* 0x3c */ 51 u32 sr; /* 0x40 */ 52 u32 ier; /* 0x44 */ 53 u32 idr; /* 0x48 */ 54 u32 imr; /* 0x4c */ 55 } atmel_mci_t; 56 57 #endif /* __ASSEMBLY__ */ 58 59 /* 60 * NOTICE: Use of registers offsets is depreciated. 61 * These defines will be removed once the old driver 62 * is taken out of commision. 63 * 64 * Atmel MultiMedia Card Interface (MCI) registers 65 */ 66 #define MMCI_CR 0x0000 67 #define MMCI_MR 0x0004 68 #define MMCI_DTOR 0x0008 69 #define MMCI_SDCR 0x000c 70 #define MMCI_ARGR 0x0010 71 #define MMCI_CMDR 0x0014 72 #define MMCI_RSPR 0x0020 73 #define MMCI_RSPR1 0x0024 74 #define MMCI_RSPR2 0x0028 75 #define MMCI_RSPR3 0x002c 76 #define MMCI_RDR 0x0030 77 #define MMCI_TDR 0x0034 78 #define MMCI_SR 0x0040 79 #define MMCI_IER 0x0044 80 #define MMCI_IDR 0x0048 81 #define MMCI_IMR 0x004c 82 83 /* Bitfields in CR */ 84 #define MMCI_MCIEN_OFFSET 0 85 #define MMCI_MCIEN_SIZE 1 86 #define MMCI_MCIDIS_OFFSET 1 87 #define MMCI_MCIDIS_SIZE 1 88 #define MMCI_PWSEN_OFFSET 2 89 #define MMCI_PWSEN_SIZE 1 90 #define MMCI_PWSDIS_OFFSET 3 91 #define MMCI_PWSDIS_SIZE 1 92 #define MMCI_SWRST_OFFSET 7 93 #define MMCI_SWRST_SIZE 1 94 95 /* Bitfields in MR */ 96 #define MMCI_CLKDIV_OFFSET 0 97 #define MMCI_CLKDIV_SIZE 8 98 #define MMCI_PWSDIV_OFFSET 8 99 #define MMCI_PWSDIV_SIZE 3 100 #define MMCI_RDPROOF_OFFSET 11 101 #define MMCI_RDPROOF_SIZE 1 102 #define MMCI_WRPROOF_OFFSET 12 103 #define MMCI_WRPROOF_SIZE 1 104 #define MMCI_PDCPADV_OFFSET 14 105 #define MMCI_PDCPADV_SIZE 1 106 #define MMCI_PDCMODE_OFFSET 15 107 #define MMCI_PDCMODE_SIZE 1 108 #define MMCI_BLKLEN_OFFSET 16 109 #define MMCI_BLKLEN_SIZE 16 110 111 /* Bitfields in DTOR */ 112 #define MMCI_DTOCYC_OFFSET 0 113 #define MMCI_DTOCYC_SIZE 4 114 #define MMCI_DTOMUL_OFFSET 4 115 #define MMCI_DTOMUL_SIZE 3 116 117 /* Bitfields in SDCR */ 118 #define MMCI_SCDSEL_OFFSET 0 119 #define MMCI_SCDSEL_SIZE 4 120 #define MMCI_SCDBUS_OFFSET 7 121 #define MMCI_SCDBUS_SIZE 1 122 123 /* Bitfields in ARGR */ 124 #define MMCI_ARG_OFFSET 0 125 #define MMCI_ARG_SIZE 32 126 127 /* Bitfields in CMDR */ 128 #define MMCI_CMDNB_OFFSET 0 129 #define MMCI_CMDNB_SIZE 6 130 #define MMCI_RSPTYP_OFFSET 6 131 #define MMCI_RSPTYP_SIZE 2 132 #define MMCI_SPCMD_OFFSET 8 133 #define MMCI_SPCMD_SIZE 3 134 #define MMCI_OPDCMD_OFFSET 11 135 #define MMCI_OPDCMD_SIZE 1 136 #define MMCI_MAXLAT_OFFSET 12 137 #define MMCI_MAXLAT_SIZE 1 138 #define MMCI_TRCMD_OFFSET 16 139 #define MMCI_TRCMD_SIZE 2 140 #define MMCI_TRDIR_OFFSET 18 141 #define MMCI_TRDIR_SIZE 1 142 #define MMCI_TRTYP_OFFSET 19 143 #define MMCI_TRTYP_SIZE 2 144 145 /* Bitfields in RSPRx */ 146 #define MMCI_RSP_OFFSET 0 147 #define MMCI_RSP_SIZE 32 148 149 /* Bitfields in SR/IER/IDR/IMR */ 150 #define MMCI_CMDRDY_OFFSET 0 151 #define MMCI_CMDRDY_SIZE 1 152 #define MMCI_RXRDY_OFFSET 1 153 #define MMCI_RXRDY_SIZE 1 154 #define MMCI_TXRDY_OFFSET 2 155 #define MMCI_TXRDY_SIZE 1 156 #define MMCI_BLKE_OFFSET 3 157 #define MMCI_BLKE_SIZE 1 158 #define MMCI_DTIP_OFFSET 4 159 #define MMCI_DTIP_SIZE 1 160 #define MMCI_NOTBUSY_OFFSET 5 161 #define MMCI_NOTBUSY_SIZE 1 162 #define MMCI_ENDRX_OFFSET 6 163 #define MMCI_ENDRX_SIZE 1 164 #define MMCI_ENDTX_OFFSET 7 165 #define MMCI_ENDTX_SIZE 1 166 #define MMCI_RXBUFF_OFFSET 14 167 #define MMCI_RXBUFF_SIZE 1 168 #define MMCI_TXBUFE_OFFSET 15 169 #define MMCI_TXBUFE_SIZE 1 170 #define MMCI_RINDE_OFFSET 16 171 #define MMCI_RINDE_SIZE 1 172 #define MMCI_RDIRE_OFFSET 17 173 #define MMCI_RDIRE_SIZE 1 174 #define MMCI_RCRCE_OFFSET 18 175 #define MMCI_RCRCE_SIZE 1 176 #define MMCI_RENDE_OFFSET 19 177 #define MMCI_RENDE_SIZE 1 178 #define MMCI_RTOE_OFFSET 20 179 #define MMCI_RTOE_SIZE 1 180 #define MMCI_DCRCE_OFFSET 21 181 #define MMCI_DCRCE_SIZE 1 182 #define MMCI_DTOE_OFFSET 22 183 #define MMCI_DTOE_SIZE 1 184 #define MMCI_OVRE_OFFSET 30 185 #define MMCI_OVRE_SIZE 1 186 #define MMCI_UNRE_OFFSET 31 187 #define MMCI_UNRE_SIZE 1 188 189 /* Constants for DTOMUL */ 190 #define MMCI_DTOMUL_1_CYCLE 0 191 #define MMCI_DTOMUL_16_CYCLES 1 192 #define MMCI_DTOMUL_128_CYCLES 2 193 #define MMCI_DTOMUL_256_CYCLES 3 194 #define MMCI_DTOMUL_1024_CYCLES 4 195 #define MMCI_DTOMUL_4096_CYCLES 5 196 #define MMCI_DTOMUL_65536_CYCLES 6 197 #define MMCI_DTOMUL_1048576_CYCLES 7 198 199 /* Constants for RSPTYP */ 200 #define MMCI_RSPTYP_NO_RESP 0 201 #define MMCI_RSPTYP_48_BIT_RESP 1 202 #define MMCI_RSPTYP_136_BIT_RESP 2 203 204 /* Constants for SPCMD */ 205 #define MMCI_SPCMD_NO_SPEC_CMD 0 206 #define MMCI_SPCMD_INIT_CMD 1 207 #define MMCI_SPCMD_SYNC_CMD 2 208 #define MMCI_SPCMD_INT_CMD 4 209 #define MMCI_SPCMD_INT_RESP 5 210 211 /* Constants for TRCMD */ 212 #define MMCI_TRCMD_NO_TRANS 0 213 #define MMCI_TRCMD_START_TRANS 1 214 #define MMCI_TRCMD_STOP_TRANS 2 215 216 /* Constants for TRTYP */ 217 #define MMCI_TRTYP_BLOCK 0 218 #define MMCI_TRTYP_MULTI_BLOCK 1 219 #define MMCI_TRTYP_STREAM 2 220 221 /* Bit manipulation macros */ 222 #define MMCI_BIT(name) \ 223 (1 << MMCI_##name##_OFFSET) 224 #define MMCI_BF(name,value) \ 225 (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \ 226 << MMCI_##name##_OFFSET) 227 #define MMCI_BFEXT(name,value) \ 228 (((value) >> MMCI_##name##_OFFSET)\ 229 & ((1 << MMCI_##name##_SIZE) - 1)) 230 #define MMCI_BFINS(name,value,old) \ 231 (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \ 232 << MMCI_##name##_OFFSET)) \ 233 | MMCI_BF(name,value)) 234 235 /* 236 * NOTICE: Use of registers offsets is depreciated. 237 * These defines will be removed once the old driver 238 * is taken out of commision. 239 * 240 * Register access macros 241 */ 242 #define mmci_readl(reg) \ 243 readl((void *)ATMEL_BASE_MMCI + MMCI_##reg) 244 #define mmci_writel(reg,value) \ 245 writel((value), (void *)ATMEL_BASE_MMCI + MMCI_##reg) 246 247 #endif /* __ATMEL_MCI_H__ */ 248