xref: /rk3399_rockchip-uboot/include/ata.h (revision fe8c2806cdba70479e351299881a395dc2be7785)
1*fe8c2806Swdenk /*
2*fe8c2806Swdenk  * (C) Copyright 2000
3*fe8c2806Swdenk  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*fe8c2806Swdenk  *
5*fe8c2806Swdenk  * See file CREDITS for list of people who contributed to this
6*fe8c2806Swdenk  * project.
7*fe8c2806Swdenk  *
8*fe8c2806Swdenk  * This program is free software; you can redistribute it and/or
9*fe8c2806Swdenk  * modify it under the terms of the GNU General Public License as
10*fe8c2806Swdenk  * published by the Free Software Foundation; either version 2 of
11*fe8c2806Swdenk  * the License, or (at your option) any later version.
12*fe8c2806Swdenk  *
13*fe8c2806Swdenk  * This program is distributed in the hope that it will be useful,
14*fe8c2806Swdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*fe8c2806Swdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*fe8c2806Swdenk  * GNU General Public License for more details.
17*fe8c2806Swdenk  *
18*fe8c2806Swdenk  * You should have received a copy of the GNU General Public License
19*fe8c2806Swdenk  * along with this program; if not, write to the Free Software
20*fe8c2806Swdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21*fe8c2806Swdenk  * MA 02111-1307 USA
22*fe8c2806Swdenk  */
23*fe8c2806Swdenk 
24*fe8c2806Swdenk /*
25*fe8c2806Swdenk  * Most of the following information was derived from the document
26*fe8c2806Swdenk  * "Information Technology - AT Attachment-3 Interface (ATA-3)"
27*fe8c2806Swdenk  * which can be found at:
28*fe8c2806Swdenk  * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
29*fe8c2806Swdenk  * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
30*fe8c2806Swdenk  * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
31*fe8c2806Swdenk  */
32*fe8c2806Swdenk 
33*fe8c2806Swdenk #ifndef	_ATA_H
34*fe8c2806Swdenk #define _ATA_H
35*fe8c2806Swdenk 
36*fe8c2806Swdenk /* Register addressing depends on the hardware design; for instance,
37*fe8c2806Swdenk  * 8-bit (register) and 16-bit (data) accesses might use different
38*fe8c2806Swdenk  * address spaces. This is implemented by the following definitions.
39*fe8c2806Swdenk  */
40*fe8c2806Swdenk 
41*fe8c2806Swdenk #define ATA_IO_DATA(x)	(CFG_ATA_DATA_OFFSET+(x))
42*fe8c2806Swdenk #define ATA_IO_REG(x)	(CFG_ATA_REG_OFFSET +(x))
43*fe8c2806Swdenk #define ATA_IO_ALT(x)	(CFG_ATA_ALT_OFFSET +(x))
44*fe8c2806Swdenk 
45*fe8c2806Swdenk /*
46*fe8c2806Swdenk  * I/O Register Descriptions
47*fe8c2806Swdenk  */
48*fe8c2806Swdenk #define ATA_DATA_REG	ATA_IO_DATA(0)
49*fe8c2806Swdenk #define ATA_ERROR_REG	ATA_IO_REG(1)
50*fe8c2806Swdenk #define ATA_SECT_CNT	ATA_IO_REG(2)
51*fe8c2806Swdenk #define ATA_SECT_NUM	ATA_IO_REG(3)
52*fe8c2806Swdenk #define ATA_CYL_LOW	ATA_IO_REG(4)
53*fe8c2806Swdenk #define ATA_CYL_HIGH	ATA_IO_REG(5)
54*fe8c2806Swdenk #define ATA_DEV_HD	ATA_IO_REG(6)
55*fe8c2806Swdenk #define ATA_COMMAND	ATA_IO_REG(7)
56*fe8c2806Swdenk #define ATA_STATUS	ATA_COMMAND
57*fe8c2806Swdenk #define ATA_DEV_CTL	ATA_IO_ALT(6)
58*fe8c2806Swdenk #define ATA_LBA_LOW	ATA_SECT_NUM
59*fe8c2806Swdenk #define ATA_LBA_MID	ATA_CYL_LOW
60*fe8c2806Swdenk #define ATA_LBA_HIGH	ATA_CYL_HIGH
61*fe8c2806Swdenk #define ATA_LBA_SEL	ATA_DEV_CTL
62*fe8c2806Swdenk 
63*fe8c2806Swdenk /*
64*fe8c2806Swdenk  * Status register bits
65*fe8c2806Swdenk  */
66*fe8c2806Swdenk #define ATA_STAT_BUSY	0x80	/* Device Busy			*/
67*fe8c2806Swdenk #define ATA_STAT_READY	0x40	/* Device Ready			*/
68*fe8c2806Swdenk #define ATA_STAT_FAULT	0x20	/* Device Fault			*/
69*fe8c2806Swdenk #define ATA_STAT_SEEK	0x10	/* Device Seek Complete		*/
70*fe8c2806Swdenk #define ATA_STAT_DRQ	0x08	/* Data Request (ready)		*/
71*fe8c2806Swdenk #define ATA_STAT_CORR	0x04	/* Corrected Data Error		*/
72*fe8c2806Swdenk #define ATA_STAT_INDEX	0x02	/* Vendor specific		*/
73*fe8c2806Swdenk #define ATA_STAT_ERR	0x01	/* Error			*/
74*fe8c2806Swdenk 
75*fe8c2806Swdenk /*
76*fe8c2806Swdenk  * Device / Head Register Bits
77*fe8c2806Swdenk  */
78*fe8c2806Swdenk #define ATA_DEVICE(x)	((x & 1)<<4)
79*fe8c2806Swdenk #define ATA_LBA		0xE0
80*fe8c2806Swdenk 
81*fe8c2806Swdenk /*
82*fe8c2806Swdenk  * ATA Commands (only mandatory commands listed here)
83*fe8c2806Swdenk  */
84*fe8c2806Swdenk #define ATA_CMD_READ	0x20	/* Read Sectors (with retries)	*/
85*fe8c2806Swdenk #define ATA_CMD_READN	0x21	/* Read Sectors ( no  retries)	*/
86*fe8c2806Swdenk #define ATA_CMD_WRITE	0x30	/* Write Sectores (with retries)*/
87*fe8c2806Swdenk #define ATA_CMD_WRITEN	0x31	/* Write Sectors  ( no  retries)*/
88*fe8c2806Swdenk #define ATA_CMD_VRFY	0x40	/* Read Verify  (with retries)	*/
89*fe8c2806Swdenk #define ATA_CMD_VRFYN	0x41	/* Read verify  ( no  retries)	*/
90*fe8c2806Swdenk #define ATA_CMD_SEEK	0x70	/* Seek				*/
91*fe8c2806Swdenk #define ATA_CMD_DIAG	0x90	/* Execute Device Diagnostic	*/
92*fe8c2806Swdenk #define ATA_CMD_INIT	0x91	/* Initialize Device Parameters	*/
93*fe8c2806Swdenk #define ATA_CMD_RD_MULT	0xC4	/* Read Multiple		*/
94*fe8c2806Swdenk #define ATA_CMD_WR_MULT	0xC5	/* Write Multiple		*/
95*fe8c2806Swdenk #define ATA_CMD_SETMULT	0xC6	/* Set Multiple Mode		*/
96*fe8c2806Swdenk #define ATA_CMD_RD_DMA	0xC8	/* Read DMA (with retries)	*/
97*fe8c2806Swdenk #define ATA_CMD_RD_DMAN	0xC9	/* Read DMS ( no  retries)	*/
98*fe8c2806Swdenk #define ATA_CMD_WR_DMA	0xCA	/* Write DMA (with retries)	*/
99*fe8c2806Swdenk #define ATA_CMD_WR_DMAN	0xCB	/* Write DMA ( no  retires)	*/
100*fe8c2806Swdenk #define ATA_CMD_IDENT	0xEC	/* Identify Device		*/
101*fe8c2806Swdenk #define ATA_CMD_SETF	0xEF	/* Set Features			*/
102*fe8c2806Swdenk #define ATA_CMD_CHK_PWR	0xE5	/* Check Power Mode		*/
103*fe8c2806Swdenk 
104*fe8c2806Swdenk /*
105*fe8c2806Swdenk  * ATAPI Commands
106*fe8c2806Swdenk  */
107*fe8c2806Swdenk #define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
108*fe8c2806Swdenk #define ATAPI_CMD_PACKET 0xA0 /* Packed Command */
109*fe8c2806Swdenk 
110*fe8c2806Swdenk 
111*fe8c2806Swdenk #define ATAPI_CMD_INQUIRY 0x12
112*fe8c2806Swdenk #define ATAPI_CMD_REQ_SENSE 0x03
113*fe8c2806Swdenk #define ATAPI_CMD_READ_CAP 0x25
114*fe8c2806Swdenk #define ATAPI_CMD_START_STOP 0x1B
115*fe8c2806Swdenk #define ATAPI_CMD_READ_12 0xA8
116*fe8c2806Swdenk 
117*fe8c2806Swdenk 
118*fe8c2806Swdenk #define ATA_GET_ERR()	inb(ATA_STATUS)
119*fe8c2806Swdenk #define ATA_GET_STAT()	inb(ATA_STATUS)
120*fe8c2806Swdenk #define ATA_OK_STAT(stat,good,bad)	(((stat)&((good)|(bad)))==(good))
121*fe8c2806Swdenk #define ATA_BAD_R_STAT	(ATA_STAT_BUSY	| ATA_STAT_ERR)
122*fe8c2806Swdenk #define ATA_BAD_W_STAT	(ATA_BAD_R_STAT	| ATA_STAT_FAULT)
123*fe8c2806Swdenk #define ATA_BAD_STAT	(ATA_BAD_R_STAT	| ATA_STAT_DRQ)
124*fe8c2806Swdenk #define ATA_DRIVE_READY	(ATA_READY_STAT	| ATA_STAT_SEEK)
125*fe8c2806Swdenk #define ATA_DATA_READY	(ATA_STAT_DRQ)
126*fe8c2806Swdenk 
127*fe8c2806Swdenk #define ATA_BLOCKSIZE	512	/* bytes */
128*fe8c2806Swdenk #define ATA_BLOCKSHIFT	9	/* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
129*fe8c2806Swdenk #define ATA_SECTORWORDS	(512 / sizeof(unsigned long))
130*fe8c2806Swdenk 
131*fe8c2806Swdenk #ifndef ATA_RESET_TIME
132*fe8c2806Swdenk #define ATA_RESET_TIME	60	/* spec allows up to 31 seconds */
133*fe8c2806Swdenk #endif
134*fe8c2806Swdenk 
135*fe8c2806Swdenk /* ------------------------------------------------------------------------- */
136*fe8c2806Swdenk 
137*fe8c2806Swdenk /*
138*fe8c2806Swdenk  * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
139*fe8c2806Swdenk  */
140*fe8c2806Swdenk typedef struct hd_driveid {
141*fe8c2806Swdenk 	unsigned short	config;		/* lots of obsolete bit flags */
142*fe8c2806Swdenk 	unsigned short	cyls;		/* "physical" cyls */
143*fe8c2806Swdenk 	unsigned short	reserved2;	/* reserved (word 2) */
144*fe8c2806Swdenk 	unsigned short	heads;		/* "physical" heads */
145*fe8c2806Swdenk 	unsigned short	track_bytes;	/* unformatted bytes per track */
146*fe8c2806Swdenk 	unsigned short	sector_bytes;	/* unformatted bytes per sector */
147*fe8c2806Swdenk 	unsigned short	sectors;	/* "physical" sectors per track */
148*fe8c2806Swdenk 	unsigned short	vendor0;	/* vendor unique */
149*fe8c2806Swdenk 	unsigned short	vendor1;	/* vendor unique */
150*fe8c2806Swdenk 	unsigned short	vendor2;	/* vendor unique */
151*fe8c2806Swdenk 	unsigned char	serial_no[20];	/* 0 = not_specified */
152*fe8c2806Swdenk 	unsigned short	buf_type;
153*fe8c2806Swdenk 	unsigned short	buf_size;	/* 512 byte increments; 0 = not_specified */
154*fe8c2806Swdenk 	unsigned short	ecc_bytes;	/* for r/w long cmds; 0 = not_specified */
155*fe8c2806Swdenk 	unsigned char	fw_rev[8];	/* 0 = not_specified */
156*fe8c2806Swdenk 	unsigned char	model[40];	/* 0 = not_specified */
157*fe8c2806Swdenk 	unsigned char	max_multsect;	/* 0=not_implemented */
158*fe8c2806Swdenk 	unsigned char	vendor3;	/* vendor unique */
159*fe8c2806Swdenk 	unsigned short	dword_io;	/* 0=not_implemented; 1=implemented */
160*fe8c2806Swdenk 	unsigned char	vendor4;	/* vendor unique */
161*fe8c2806Swdenk 	unsigned char	capability;	/* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
162*fe8c2806Swdenk 	unsigned short	reserved50;	/* reserved (word 50) */
163*fe8c2806Swdenk 	unsigned char	vendor5;	/* vendor unique */
164*fe8c2806Swdenk 	unsigned char	tPIO;		/* 0=slow, 1=medium, 2=fast */
165*fe8c2806Swdenk 	unsigned char	vendor6;	/* vendor unique */
166*fe8c2806Swdenk 	unsigned char	tDMA;		/* 0=slow, 1=medium, 2=fast */
167*fe8c2806Swdenk 	unsigned short	field_valid;	/* bits 0:cur_ok 1:eide_ok */
168*fe8c2806Swdenk 	unsigned short	cur_cyls;	/* logical cylinders */
169*fe8c2806Swdenk 	unsigned short	cur_heads;	/* logical heads */
170*fe8c2806Swdenk 	unsigned short	cur_sectors;	/* logical sectors per track */
171*fe8c2806Swdenk 	unsigned short	cur_capacity0;	/* logical total sectors on drive */
172*fe8c2806Swdenk 	unsigned short	cur_capacity1;	/*  (2 words, misaligned int)     */
173*fe8c2806Swdenk 	unsigned char	multsect;	/* current multiple sector count */
174*fe8c2806Swdenk 	unsigned char	multsect_valid;	/* when (bit0==1) multsect is ok */
175*fe8c2806Swdenk 	unsigned int	lba_capacity;	/* total number of sectors */
176*fe8c2806Swdenk 	unsigned short	dma_1word;	/* single-word dma info */
177*fe8c2806Swdenk 	unsigned short	dma_mword;	/* multiple-word dma info */
178*fe8c2806Swdenk 	unsigned short  eide_pio_modes; /* bits 0:mode3 1:mode4 */
179*fe8c2806Swdenk 	unsigned short  eide_dma_min;	/* min mword dma cycle time (ns) */
180*fe8c2806Swdenk 	unsigned short  eide_dma_time;	/* recommended mword dma cycle time (ns) */
181*fe8c2806Swdenk 	unsigned short  eide_pio;       /* min cycle time (ns), no IORDY  */
182*fe8c2806Swdenk 	unsigned short  eide_pio_iordy; /* min cycle time (ns), with IORDY */
183*fe8c2806Swdenk 	unsigned short	words69_70[2];	/* reserved words 69-70 */
184*fe8c2806Swdenk 	unsigned short	words71_74[4];	/* reserved words 71-74 */
185*fe8c2806Swdenk 	unsigned short  queue_depth;	/*  */
186*fe8c2806Swdenk 	unsigned short  words76_79[4];	/* reserved words 76-79 */
187*fe8c2806Swdenk 	unsigned short  major_rev_num;	/*  */
188*fe8c2806Swdenk 	unsigned short  minor_rev_num;	/*  */
189*fe8c2806Swdenk 	unsigned short  command_set_1;	/* bits 0:Smart 1:Security 2:Removable 3:PM */
190*fe8c2806Swdenk 	unsigned short  command_set_2;	/* bits 14:Smart Enabled 13:0 zero */
191*fe8c2806Swdenk 	unsigned short  cfsse;		/* command set-feature supported extensions */
192*fe8c2806Swdenk 	unsigned short  cfs_enable_1;	/* command set-feature enabled */
193*fe8c2806Swdenk 	unsigned short  cfs_enable_2;	/* command set-feature enabled */
194*fe8c2806Swdenk 	unsigned short  csf_default;	/* command set-feature default */
195*fe8c2806Swdenk 	unsigned short  dma_ultra;	/*  */
196*fe8c2806Swdenk 	unsigned short	word89;		/* reserved (word 89) */
197*fe8c2806Swdenk 	unsigned short	word90;		/* reserved (word 90) */
198*fe8c2806Swdenk 	unsigned short	CurAPMvalues;	/* current APM values */
199*fe8c2806Swdenk 	unsigned short	word92;		/* reserved (word 92) */
200*fe8c2806Swdenk 	unsigned short	hw_config;	/* hardware config */
201*fe8c2806Swdenk 	unsigned short  words94_125[32];/* reserved words 94-125 */
202*fe8c2806Swdenk 	unsigned short	last_lun;	/* reserved (word 126) */
203*fe8c2806Swdenk 	unsigned short	word127;	/* reserved (word 127) */
204*fe8c2806Swdenk 	unsigned short	dlf;		/* device lock function
205*fe8c2806Swdenk 					 * 15:9	reserved
206*fe8c2806Swdenk 					 * 8	security level 1:max 0:high
207*fe8c2806Swdenk 					 * 7:6	reserved
208*fe8c2806Swdenk 					 * 5	enhanced erase
209*fe8c2806Swdenk 					 * 4	expire
210*fe8c2806Swdenk 					 * 3	frozen
211*fe8c2806Swdenk 					 * 2	locked
212*fe8c2806Swdenk 					 * 1	en/disabled
213*fe8c2806Swdenk 					 * 0	capability
214*fe8c2806Swdenk 					 */
215*fe8c2806Swdenk 	unsigned short  csfo;		/* current set features options
216*fe8c2806Swdenk 					 * 15:4	reserved
217*fe8c2806Swdenk 					 * 3	auto reassign
218*fe8c2806Swdenk 					 * 2	reverting
219*fe8c2806Swdenk 					 * 1	read-look-ahead
220*fe8c2806Swdenk 					 * 0	write cache
221*fe8c2806Swdenk 					 */
222*fe8c2806Swdenk 	unsigned short	words130_155[26];/* reserved vendor words 130-155 */
223*fe8c2806Swdenk 	unsigned short	word156;
224*fe8c2806Swdenk 	unsigned short	words157_159[3];/* reserved vendor words 157-159 */
225*fe8c2806Swdenk 	unsigned short	words160_255[95];/* reserved words 160-255 */
226*fe8c2806Swdenk } hd_driveid_t;
227*fe8c2806Swdenk 
228*fe8c2806Swdenk 
229*fe8c2806Swdenk /*
230*fe8c2806Swdenk  * PIO Mode Configuration
231*fe8c2806Swdenk  *
232*fe8c2806Swdenk  * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
233*fe8c2806Swdenk  */
234*fe8c2806Swdenk 
235*fe8c2806Swdenk typedef struct {
236*fe8c2806Swdenk 	unsigned int	t_setup;	/* Setup  Time in [ns] or clocks	*/
237*fe8c2806Swdenk 	unsigned int	t_length;	/* Length Time in [ns] or clocks	*/
238*fe8c2806Swdenk 	unsigned int	t_hold;		/* Hold   Time in [ns] or clocks	*/
239*fe8c2806Swdenk }
240*fe8c2806Swdenk pio_config_t;
241*fe8c2806Swdenk 
242*fe8c2806Swdenk #define	IDE_MAX_PIO_MODE	4	/* max suppurted PIO mode		*/
243*fe8c2806Swdenk 
244*fe8c2806Swdenk /* ------------------------------------------------------------------------- */
245*fe8c2806Swdenk 
246*fe8c2806Swdenk #endif /* _ATA_H */
247