1 /* 2 * Copyright (c) 2012 The Chromium OS Authors. 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ASM_GENERIC_GBL_DATA_H 10 #define __ASM_GENERIC_GBL_DATA_H 11 /* 12 * The following data structure is placed in some memory which is 13 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 14 * some locked parts of the data cache) to allow for a minimum set of 15 * global variables during system initialization (until we have set 16 * up the memory controller so that we can use RAM). 17 * 18 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 19 * 20 * Each architecture has its own private fields. For now all are private 21 */ 22 23 #ifndef __ASSEMBLY__ 24 #include <membuff.h> 25 #include <linux/list.h> 26 27 /* Never change the sequence of members !!! */ 28 struct pm_ctx { 29 unsigned long sp; 30 phys_addr_t cpu_resume_addr; 31 unsigned long suspend_regs[15]; 32 }; 33 34 struct pre_serial { 35 u32 using_pre_serial; 36 u32 enable; 37 u32 id; 38 u32 baudrate; 39 ulong addr; 40 }; 41 42 typedef struct global_data { 43 bd_t *bd; 44 unsigned long flags; 45 unsigned int baudrate; 46 unsigned long cpu_clk; /* CPU clock in Hz! */ 47 unsigned long bus_clk; 48 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ 49 unsigned long pci_clk; 50 unsigned long mem_clk; 51 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 52 unsigned long fb_base; /* Base address of framebuffer mem */ 53 #endif 54 #if defined(CONFIG_POST) 55 unsigned long post_log_word; /* Record POST activities */ 56 unsigned long post_log_res; /* success of POST test */ 57 unsigned long post_init_f_time; /* When post_init_f started */ 58 #endif 59 #ifdef CONFIG_BOARD_TYPES 60 unsigned long board_type; 61 #endif 62 unsigned long have_console; /* serial_init() was called */ 63 #if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER) 64 unsigned long precon_buf_idx; /* Pre-Console buffer index */ 65 #endif 66 unsigned long env_addr; /* Address of Environment struct */ 67 unsigned long env_valid; /* Environment valid? enum env_valid */ 68 69 unsigned long ram_top; /* Top address of RAM used by U-Boot */ 70 unsigned long relocaddr; /* Start address of U-Boot in RAM */ 71 phys_size_t ram_size; /* RAM size */ 72 unsigned long mon_len; /* monitor len */ 73 unsigned long irq_sp; /* irq stack pointer */ 74 unsigned long start_addr_sp; /* start_addr_stackpointer */ 75 unsigned long reloc_off; 76 struct global_data *new_gd; /* relocated global data */ 77 78 #ifdef CONFIG_DM 79 struct udevice *dm_root; /* Root instance for Driver Model */ 80 struct udevice *dm_root_f; /* Pre-relocation root instance */ 81 struct list_head uclass_root; /* Head of core tree */ 82 #endif 83 #ifdef CONFIG_TIMER 84 struct udevice *timer; /* Timer instance for Driver Model */ 85 #endif 86 const void *fdt_blob_kern; /* Kernel dtb at the tail of u-boot.bin */ 87 const void *fdt_blob; /* Our device tree, NULL if none */ 88 89 #ifdef CONFIG_USING_KERNEL_DTB 90 const void *ufdt_blob; /* Our U-Boot device tree, NULL if none */ 91 #endif 92 void *new_fdt; /* Relocated FDT */ 93 unsigned long fdt_size; /* Space reserved for relocated FDT */ 94 #ifdef CONFIG_OF_LIVE 95 struct device_node *of_root; 96 #endif 97 struct jt_funcs *jt; /* jump table */ 98 char env_buf[32]; /* buffer for env_get() before reloc. */ 99 #ifdef CONFIG_TRACE 100 void *trace_buff; /* The trace buffer */ 101 #endif 102 #if defined(CONFIG_SYS_I2C) 103 int cur_i2c_bus; /* current used i2c bus */ 104 #endif 105 #ifdef CONFIG_SYS_I2C_MXC 106 void *srdata[10]; 107 #endif 108 unsigned int timebase_h; 109 unsigned int timebase_l; 110 #if CONFIG_VAL(SYS_MALLOC_F_LEN) 111 unsigned long malloc_base; /* base address of early malloc() */ 112 unsigned long malloc_limit; /* limit address */ 113 unsigned long malloc_ptr; /* current address */ 114 #endif 115 #ifdef CONFIG_PCI 116 struct pci_controller *hose; /* PCI hose for early use */ 117 phys_addr_t pci_ram_top; /* top of region accessible to PCI */ 118 #endif 119 #ifdef CONFIG_PCI_BOOTDELAY 120 int pcidelay_done; 121 #endif 122 struct udevice *cur_serial_dev; /* current serial device */ 123 struct arch_global_data arch; /* architecture-specific data */ 124 #ifdef CONFIG_CONSOLE_RECORD 125 struct membuff console_out; /* console output */ 126 struct membuff console_in; /* console input */ 127 #endif 128 #ifdef CONFIG_DM_VIDEO 129 ulong video_top; /* Top of video frame buffer area */ 130 ulong video_bottom; /* Bottom of video frame buffer area */ 131 #endif 132 #ifdef CONFIG_BOOTSTAGE 133 struct bootstage_data *bootstage; /* Bootstage information */ 134 struct bootstage_data *new_bootstage; /* Relocated bootstage info */ 135 #endif 136 phys_addr_t pm_ctx_phys; 137 138 #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP 139 int new_line; 140 #endif 141 struct pre_serial serial; 142 ulong sys_start_tick; /* For report system start-up time */ 143 int console_evt; /* Console event, maybe some hotkey */ 144 #ifdef CONFIG_LOG 145 int log_drop_count; /* Number of dropped log messages */ 146 int default_log_level; /* For devices with no filters */ 147 struct list_head log_head; /* List of struct log_device */ 148 #endif 149 #if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT) 150 u32 rollback_index; 151 #endif 152 } gd_t; 153 #endif 154 155 #ifdef CONFIG_BOARD_TYPES 156 #define gd_board_type() gd->board_type 157 #else 158 #define gd_board_type() 0 159 #endif 160 161 /* 162 * Global Data Flags - the top 16 bits are reserved for arch-specific flags 163 */ 164 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 165 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 166 #define GD_FLG_SILENT 0x00004 /* Silent mode */ 167 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 168 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 169 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 170 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 171 #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */ 172 #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ 173 #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ 174 #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ 175 #define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ 176 #define GD_FLG_RECORD 0x01000 /* Record console */ 177 #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ 178 #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ 179 #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ 180 #define GD_FLG_KDTB_READY 0x10000 /* Kernel dtb is ready for use */ 181 182 #ifdef CONFIG_ARCH_ROCKCHIP 183 /* BL32 is enabled */ 184 #define GD_FLG_BL32_ENABLED 0x20000 185 #endif 186 187 #endif /* __ASM_GENERIC_GBL_DATA_H */ 188