1 /* 2 * Copyright (c) 2012 The Chromium OS Authors. 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ASM_GENERIC_GBL_DATA_H 10 #define __ASM_GENERIC_GBL_DATA_H 11 /* 12 * The following data structure is placed in some memory which is 13 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 14 * some locked parts of the data cache) to allow for a minimum set of 15 * global variables during system initialization (until we have set 16 * up the memory controller so that we can use RAM). 17 * 18 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 19 * 20 * Each architecture has its own private fields. For now all are private 21 */ 22 23 #ifndef __ASSEMBLY__ 24 #include <membuff.h> 25 #include <linux/list.h> 26 27 /* Never change the sequence of members !!! */ 28 struct pm_ctx { 29 unsigned long sp; 30 phys_addr_t cpu_resume_addr; 31 unsigned long suspend_regs[15]; 32 }; 33 34 struct pre_serial { 35 u32 using_pre_serial; 36 u32 id; 37 u32 baudrate; 38 ulong addr; 39 }; 40 41 typedef struct global_data { 42 bd_t *bd; 43 unsigned long flags; 44 unsigned int baudrate; 45 unsigned long cpu_clk; /* CPU clock in Hz! */ 46 unsigned long bus_clk; 47 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ 48 unsigned long pci_clk; 49 unsigned long mem_clk; 50 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 51 unsigned long fb_base; /* Base address of framebuffer mem */ 52 #endif 53 #if defined(CONFIG_POST) 54 unsigned long post_log_word; /* Record POST activities */ 55 unsigned long post_log_res; /* success of POST test */ 56 unsigned long post_init_f_time; /* When post_init_f started */ 57 #endif 58 #ifdef CONFIG_BOARD_TYPES 59 unsigned long board_type; 60 #endif 61 unsigned long have_console; /* serial_init() was called */ 62 #if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER) 63 unsigned long precon_buf_idx; /* Pre-Console buffer index */ 64 #endif 65 unsigned long env_addr; /* Address of Environment struct */ 66 unsigned long env_valid; /* Environment valid? enum env_valid */ 67 68 unsigned long ram_top; /* Top address of RAM used by U-Boot */ 69 unsigned long relocaddr; /* Start address of U-Boot in RAM */ 70 phys_size_t ram_size; /* RAM size */ 71 unsigned long mon_len; /* monitor len */ 72 unsigned long irq_sp; /* irq stack pointer */ 73 unsigned long start_addr_sp; /* start_addr_stackpointer */ 74 unsigned long reloc_off; 75 struct global_data *new_gd; /* relocated global data */ 76 77 #ifdef CONFIG_DM 78 struct udevice *dm_root; /* Root instance for Driver Model */ 79 struct udevice *dm_root_f; /* Pre-relocation root instance */ 80 struct list_head uclass_root; /* Head of core tree */ 81 #endif 82 #ifdef CONFIG_TIMER 83 struct udevice *timer; /* Timer instance for Driver Model */ 84 #endif 85 86 #ifdef CONFIG_USING_KERNEL_DTB 87 const void *fdt_blob_kern; /* Kernel dtb at the tail of u-boot.bin */ 88 #endif 89 const void *fdt_blob; /* Our device tree, NULL if none */ 90 void *new_fdt; /* Relocated FDT */ 91 unsigned long fdt_size; /* Space reserved for relocated FDT */ 92 #ifdef CONFIG_OF_LIVE 93 struct device_node *of_root; 94 #endif 95 struct jt_funcs *jt; /* jump table */ 96 char env_buf[32]; /* buffer for env_get() before reloc. */ 97 #ifdef CONFIG_TRACE 98 void *trace_buff; /* The trace buffer */ 99 #endif 100 #if defined(CONFIG_SYS_I2C) 101 int cur_i2c_bus; /* current used i2c bus */ 102 #endif 103 #ifdef CONFIG_SYS_I2C_MXC 104 void *srdata[10]; 105 #endif 106 unsigned int timebase_h; 107 unsigned int timebase_l; 108 #if CONFIG_VAL(SYS_MALLOC_F_LEN) 109 unsigned long malloc_base; /* base address of early malloc() */ 110 unsigned long malloc_limit; /* limit address */ 111 unsigned long malloc_ptr; /* current address */ 112 #endif 113 #ifdef CONFIG_PCI 114 struct pci_controller *hose; /* PCI hose for early use */ 115 phys_addr_t pci_ram_top; /* top of region accessible to PCI */ 116 #endif 117 #ifdef CONFIG_PCI_BOOTDELAY 118 int pcidelay_done; 119 #endif 120 struct udevice *cur_serial_dev; /* current serial device */ 121 struct arch_global_data arch; /* architecture-specific data */ 122 #ifdef CONFIG_CONSOLE_RECORD 123 struct membuff console_out; /* console output */ 124 struct membuff console_in; /* console input */ 125 #endif 126 #ifdef CONFIG_DM_VIDEO 127 ulong video_top; /* Top of video frame buffer area */ 128 ulong video_bottom; /* Bottom of video frame buffer area */ 129 #endif 130 #ifdef CONFIG_BOOTSTAGE 131 struct bootstage_data *bootstage; /* Bootstage information */ 132 struct bootstage_data *new_bootstage; /* Relocated bootstage info */ 133 #endif 134 phys_addr_t pm_ctx_phys; 135 136 #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP 137 int new_line; 138 #endif 139 struct pre_serial serial; 140 ulong sys_start_tick; /* For report system start-up time */ 141 int console_evt; /* Console event, maybe some hotkey */ 142 #ifdef CONFIG_LOG 143 int log_drop_count; /* Number of dropped log messages */ 144 int default_log_level; /* For devices with no filters */ 145 struct list_head log_head; /* List of struct log_device */ 146 #endif 147 } gd_t; 148 #endif 149 150 #ifdef CONFIG_BOARD_TYPES 151 #define gd_board_type() gd->board_type 152 #else 153 #define gd_board_type() 0 154 #endif 155 156 /* 157 * Global Data Flags - the top 16 bits are reserved for arch-specific flags 158 */ 159 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 160 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 161 #define GD_FLG_SILENT 0x00004 /* Silent mode */ 162 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 163 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 164 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 165 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 166 #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */ 167 #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ 168 #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ 169 #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ 170 #define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ 171 #define GD_FLG_RECORD 0x01000 /* Record console */ 172 #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ 173 #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ 174 #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ 175 176 #ifdef CONFIG_ARCH_ROCKCHIP 177 /* BL32 is enabled */ 178 #define GD_FLG_BL32_ENABLED 0x20000 179 #endif 180 181 #endif /* __ASM_GENERIC_GBL_DATA_H */ 182