150b1fa39SSimon Glass /* 250b1fa39SSimon Glass * Copyright (c) 2012 The Chromium OS Authors. 350b1fa39SSimon Glass * (C) Copyright 2002-2010 450b1fa39SSimon Glass * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 550b1fa39SSimon Glass * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 750b1fa39SSimon Glass */ 850b1fa39SSimon Glass 950b1fa39SSimon Glass #ifndef __ASM_GENERIC_GBL_DATA_H 1050b1fa39SSimon Glass #define __ASM_GENERIC_GBL_DATA_H 1150b1fa39SSimon Glass /* 1250b1fa39SSimon Glass * The following data structure is placed in some memory which is 1350b1fa39SSimon Glass * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 1450b1fa39SSimon Glass * some locked parts of the data cache) to allow for a minimum set of 1550b1fa39SSimon Glass * global variables during system initialization (until we have set 1650b1fa39SSimon Glass * up the memory controller so that we can use RAM). 1750b1fa39SSimon Glass * 1850b1fa39SSimon Glass * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 1950b1fa39SSimon Glass * 2050b1fa39SSimon Glass * Each architecture has its own private fields. For now all are private 2150b1fa39SSimon Glass */ 2250b1fa39SSimon Glass 2350b1fa39SSimon Glass #ifndef __ASSEMBLY__ 249854a874SSimon Glass #include <membuff.h> 256494d708SSimon Glass #include <linux/list.h> 266494d708SSimon Glass 2754925552SJoseph Chen /* Never change the sequence of members !!! */ 2854925552SJoseph Chen struct pm_ctx { 2954925552SJoseph Chen unsigned long sp; 3054925552SJoseph Chen phys_addr_t cpu_resume_addr; 3154925552SJoseph Chen unsigned long suspend_regs[15]; 3254925552SJoseph Chen }; 3354925552SJoseph Chen 34064eb493SJoseph Chen struct pre_serial { 35064eb493SJoseph Chen u32 using_pre_serial; 36034db995SJoseph Chen u32 enable; 37064eb493SJoseph Chen u32 id; 38064eb493SJoseph Chen u32 baudrate; 39064eb493SJoseph Chen ulong addr; 40064eb493SJoseph Chen }; 41064eb493SJoseph Chen 4250b1fa39SSimon Glass typedef struct global_data { 4350b1fa39SSimon Glass bd_t *bd; 4450b1fa39SSimon Glass unsigned long flags; 45b5bec884SSimon Glass unsigned int baudrate; 4650b1fa39SSimon Glass unsigned long cpu_clk; /* CPU clock in Hz! */ 4750b1fa39SSimon Glass unsigned long bus_clk; 4850b1fa39SSimon Glass /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ 4950b1fa39SSimon Glass unsigned long pci_clk; 5050b1fa39SSimon Glass unsigned long mem_clk; 5150b1fa39SSimon Glass #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 5250b1fa39SSimon Glass unsigned long fb_base; /* Base address of framebuffer mem */ 5350b1fa39SSimon Glass #endif 54785b4fbfSSimon Glass #if defined(CONFIG_POST) 5550b1fa39SSimon Glass unsigned long post_log_word; /* Record POST activities */ 5650b1fa39SSimon Glass unsigned long post_log_res; /* success of POST test */ 5750b1fa39SSimon Glass unsigned long post_init_f_time; /* When post_init_f started */ 5850b1fa39SSimon Glass #endif 5950b1fa39SSimon Glass #ifdef CONFIG_BOARD_TYPES 6050b1fa39SSimon Glass unsigned long board_type; 6150b1fa39SSimon Glass #endif 6250b1fa39SSimon Glass unsigned long have_console; /* serial_init() was called */ 638f925584SSimon Glass #if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER) 6450b1fa39SSimon Glass unsigned long precon_buf_idx; /* Pre-Console buffer index */ 6550b1fa39SSimon Glass #endif 6650b1fa39SSimon Glass unsigned long env_addr; /* Address of Environment struct */ 67203e94f6SSimon Glass unsigned long env_valid; /* Environment valid? enum env_valid */ 6850b1fa39SSimon Glass 69d7cbf54aSXuhui Lin uint64_t ram_top; /* Top address of RAM used by U-Boot */ 70d8e6f8d0SJoseph Chen unsigned long ram_top_ext_size; /* Extend size of RAM top */ 7150b1fa39SSimon Glass unsigned long relocaddr; /* Start address of U-Boot in RAM */ 7250b1fa39SSimon Glass phys_size_t ram_size; /* RAM size */ 7350b1fa39SSimon Glass unsigned long mon_len; /* monitor len */ 7450b1fa39SSimon Glass unsigned long irq_sp; /* irq stack pointer */ 7550b1fa39SSimon Glass unsigned long start_addr_sp; /* start_addr_stackpointer */ 7650b1fa39SSimon Glass unsigned long reloc_off; 7750b1fa39SSimon Glass struct global_data *new_gd; /* relocated global data */ 786494d708SSimon Glass 796494d708SSimon Glass #ifdef CONFIG_DM 8054c5d08aSHeiko Schocher struct udevice *dm_root; /* Root instance for Driver Model */ 81ab7cd627SSimon Glass struct udevice *dm_root_f; /* Pre-relocation root instance */ 826494d708SSimon Glass struct list_head uclass_root; /* Head of core tree */ 836494d708SSimon Glass #endif 84c8a7ba9eSThomas Chou #ifdef CONFIG_TIMER 85c8a7ba9eSThomas Chou struct udevice *timer; /* Timer instance for Driver Model */ 86c8a7ba9eSThomas Chou #endif 8750b1fa39SSimon Glass const void *fdt_blob; /* Our device tree, NULL if none */ 881938f4a5SSimon Glass void *new_fdt; /* Relocated FDT */ 891938f4a5SSimon Glass unsigned long fdt_size; /* Space reserved for relocated FDT */ 905e060d8bSSimon Glass #ifdef CONFIG_OF_LIVE 915e060d8bSSimon Glass struct device_node *of_root; 92d9da4b44SJoseph Chen struct device_node *of_root_f; /* U-Boot of-root instance */ 93fabd4de0SJoseph Chen #endif 94998fbff6SJoseph Chen const void *ufdt_blob; /* Our U-Boot device tree, NULL if none */ 95998fbff6SJoseph Chen const void *fdt_blob_kern; /* Kernel dtb at the tail of u-boot.bin */ 9649cad547SMartin Dorwig struct jt_funcs *jt; /* jump table */ 9700caae6dSSimon Glass char env_buf[32]; /* buffer for env_get() before reloc. */ 9871c52dbaSSimon Glass #ifdef CONFIG_TRACE 9971c52dbaSSimon Glass void *trace_buff; /* The trace buffer */ 10071c52dbaSSimon Glass #endif 101385c9ef5SHeiko Schocher #if defined(CONFIG_SYS_I2C) 102385c9ef5SHeiko Schocher int cur_i2c_bus; /* current used i2c bus */ 103385c9ef5SHeiko Schocher #endif 104dec1861bSYork Sun #ifdef CONFIG_SYS_I2C_MXC 105dec1861bSYork Sun void *srdata[10]; 106dec1861bSYork Sun #endif 10725112101SPeng Fan unsigned int timebase_h; 10825112101SPeng Fan unsigned int timebase_l; 109f1896c45SAndy Yan #if CONFIG_VAL(SYS_MALLOC_F_LEN) 110d59476b6SSimon Glass unsigned long malloc_base; /* base address of early malloc() */ 111d59476b6SSimon Glass unsigned long malloc_limit; /* limit address */ 112d59476b6SSimon Glass unsigned long malloc_ptr; /* current address */ 113d59476b6SSimon Glass #endif 1148f9052fdSBin Meng #ifdef CONFIG_PCI 1158f9052fdSBin Meng struct pci_controller *hose; /* PCI hose for early use */ 116b9da5086SSimon Glass phys_addr_t pci_ram_top; /* top of region accessible to PCI */ 1178f9052fdSBin Meng #endif 1188f9052fdSBin Meng #ifdef CONFIG_PCI_BOOTDELAY 1198f9052fdSBin Meng int pcidelay_done; 1208f9052fdSBin Meng #endif 121469a579dSSimon Glass struct udevice *cur_serial_dev; /* current serial device */ 1222212e69bSSimon Glass struct arch_global_data arch; /* architecture-specific data */ 1239854a874SSimon Glass #ifdef CONFIG_CONSOLE_RECORD 1249854a874SSimon Glass struct membuff console_out; /* console output */ 1259854a874SSimon Glass struct membuff console_in; /* console input */ 1269854a874SSimon Glass #endif 1275a541945SSimon Glass #ifdef CONFIG_DM_VIDEO 1285a541945SSimon Glass ulong video_top; /* Top of video frame buffer area */ 1295a541945SSimon Glass ulong video_bottom; /* Bottom of video frame buffer area */ 1305a541945SSimon Glass #endif 131b383d6c0SSimon Glass #ifdef CONFIG_BOOTSTAGE 132b383d6c0SSimon Glass struct bootstage_data *bootstage; /* Bootstage information */ 13325e7dc6aSSimon Glass struct bootstage_data *new_bootstage; /* Relocated bootstage info */ 134b383d6c0SSimon Glass #endif 13554925552SJoseph Chen phys_addr_t pm_ctx_phys; 136243527b5SJoseph Chen 137243527b5SJoseph Chen #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP 138243527b5SJoseph Chen int new_line; 139fb809478SJoseph Chen u64 last_us; 140243527b5SJoseph Chen #endif 141064eb493SJoseph Chen struct pre_serial serial; 1426ff768feSJoseph Chen ulong sys_start_tick; /* For report system start-up time */ 14313f190efSJoseph Chen int console_evt; /* Console event, maybe some hotkey */ 1449530301cSSimon Glass #ifdef CONFIG_LOG 1459530301cSSimon Glass int log_drop_count; /* Number of dropped log messages */ 1469530301cSSimon Glass int default_log_level; /* For devices with no filters */ 1479530301cSSimon Glass struct list_head log_head; /* List of struct log_device */ 1489530301cSSimon Glass #endif 14989d8b5fbSJoseph Chen #if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT) 15089d8b5fbSJoseph Chen u32 rollback_index; 15189d8b5fbSJoseph Chen #endif 152ad771a9cSHuibin Hong #ifdef CONFIG_PSTORE 1538d6469cdSNickey Yang ulong pstore_addr; 154ad771a9cSHuibin Hong u32 pstore_size; 155ad771a9cSHuibin Hong #endif 15650b1fa39SSimon Glass } gd_t; 15750b1fa39SSimon Glass #endif 15850b1fa39SSimon Glass 15952c41180SSimon Glass #ifdef CONFIG_BOARD_TYPES 16052c41180SSimon Glass #define gd_board_type() gd->board_type 16152c41180SSimon Glass #else 16252c41180SSimon Glass #define gd_board_type() 0 16352c41180SSimon Glass #endif 16452c41180SSimon Glass 16550b1fa39SSimon Glass /* 166b0b403d9SSimon Glass * Global Data Flags - the top 16 bits are reserved for arch-specific flags 16750b1fa39SSimon Glass */ 16850b1fa39SSimon Glass #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 16950b1fa39SSimon Glass #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 17050b1fa39SSimon Glass #define GD_FLG_SILENT 0x00004 /* Silent mode */ 17150b1fa39SSimon Glass #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 17250b1fa39SSimon Glass #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 17350b1fa39SSimon Glass #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 17450b1fa39SSimon Glass #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 17550b1fa39SSimon Glass #define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */ 176093f79abSSimon Glass #define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */ 177c9356be3SSimon Glass #define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */ 178070d00b8SSimon Glass #define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */ 179f05ad9baSSimon Glass #define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */ 1809854a874SSimon Glass #define GD_FLG_RECORD 0x01000 /* Record console */ 181340b0e3bSMichal Simek #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ 182340f418aSEddie Cai #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ 183a239d69aSSimon Glass #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ 184cc7c06a2SJoseph Chen #define GD_FLG_KDTB_READY 0x10000 /* Kernel dtb is ready for use */ 18550b1fa39SSimon Glass 186adde78bfSJoseph Chen #ifdef CONFIG_ARCH_ROCKCHIP 187bc04a3ddSJoseph Chen /* BL32 is enabled */ 188bc04a3ddSJoseph Chen #define GD_FLG_BL32_ENABLED 0x20000 189*2f96fde5SJoseph Chen #define GD_FLG_SMP 0x40000 190adde78bfSJoseph Chen #endif 191adde78bfSJoseph Chen 19250b1fa39SSimon Glass #endif /* __ASM_GENERIC_GBL_DATA_H */ 193