19b880bd4SWolfgang Denk /* 29b880bd4SWolfgang Denk * (C) Copyright 2005 39b880bd4SWolfgang Denk * ARM Ltd. 49b880bd4SWolfgang Denk * Peter Pearse, <Peter.Pearse@arm.com> 59b880bd4SWolfgang Denk * Configuration for ARM Core Modules. 69b880bd4SWolfgang Denk * No standalonw port yet available 79b880bd4SWolfgang Denk * - this file is included by both integratorap.h & integratorcp.h 89b880bd4SWolfgang Denk * 9*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 109b880bd4SWolfgang Denk */ 119b880bd4SWolfgang Denk 129b880bd4SWolfgang Denk #ifndef __ARMCOREMODULE_H 139b880bd4SWolfgang Denk #define __ARMCOREMODULE_H 149b880bd4SWolfgang Denk 159b880bd4SWolfgang Denk #define CM_BASE 0x10000000 169b880bd4SWolfgang Denk 179b880bd4SWolfgang Denk /* CM registers common to all CMs */ 189b880bd4SWolfgang Denk /* Note that observed values after reboot into the ARM Boot Monitor 199b880bd4SWolfgang Denk have been used as defaults, rather than the POR values */ 209b880bd4SWolfgang Denk #define OS_CTRL 0x0000000C 219b880bd4SWolfgang Denk #define CMMASK_REMAP 0x00000005 /* set remap & led */ 229b880bd4SWolfgang Denk #define CMMASK_RESET 0x00000008 239b880bd4SWolfgang Denk #define OS_LOCK 0x00000014 249b880bd4SWolfgang Denk #define CMVAL_LOCK1 0x0000A000 /* locking value */ 259b880bd4SWolfgang Denk #define CMVAL_LOCK2 0x0000005F /* locking value */ 269b880bd4SWolfgang Denk #define CMVAL_UNLOCK 0x00000000 /* any value != CM_LOCKVAL */ 279b880bd4SWolfgang Denk #define OS_SDRAM 0x00000020 289b880bd4SWolfgang Denk #define OS_INIT 0x00000024 299b880bd4SWolfgang Denk #define CMMASK_MAP_SIMPLE 0xFFFDFFFF /* simple mapping */ 309b880bd4SWolfgang Denk #define CMMASK_TCRAM_DISABLE 0xFFFEFFFF /* TCRAM disabled */ 319b880bd4SWolfgang Denk #define CMMASK_LOWVEC 0x00000000 /* vectors @ 0x00000000 */ 329b880bd4SWolfgang Denk #define CMMASK_LE 0xFFFFFFF7 /* little endian */ 339b880bd4SWolfgang Denk #define CMMASK_CMxx6_COMMON 0x00000013 /* Common value for CMxx6 */ 349b880bd4SWolfgang Denk /* - observed reset value of */ 359b880bd4SWolfgang Denk /* CM926EJ-S */ 369b880bd4SWolfgang Denk /* CM1136-EJ-S */ 379b880bd4SWolfgang Denk 389b880bd4SWolfgang Denk #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E) 399b880bd4SWolfgang Denk #define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual */ 409b880bd4SWolfgang Denk /* - PLL test clock bypassed */ 419b880bd4SWolfgang Denk /* - bus clock ratio 2 */ 429b880bd4SWolfgang Denk /* - little endian */ 439b880bd4SWolfgang Denk /* - vectors at zero */ 449b880bd4SWolfgang Denk #endif /* CM1022xx */ 459b880bd4SWolfgang Denk 469b880bd4SWolfgang Denk /* Determine CM characteristics */ 479b880bd4SWolfgang Denk 489b880bd4SWolfgang Denk #undef CONFIG_CM_MULTIPLE_SSRAM 499b880bd4SWolfgang Denk #undef CONFIG_CM_SPD_DETECT 509b880bd4SWolfgang Denk #undef CONFIG_CM_REMAP 519b880bd4SWolfgang Denk #undef CONFIG_CM_INIT 529b880bd4SWolfgang Denk #undef CONFIG_CM_TCRAM 539b880bd4SWolfgang Denk 549b880bd4SWolfgang Denk #if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S) 559b880bd4SWolfgang Denk #define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */ 569b880bd4SWolfgang Denk #endif 579b880bd4SWolfgang Denk 589b880bd4SWolfgang Denk /* Excalibur core module has reduced functionality */ 599b880bd4SWolfgang Denk #ifndef CONFIG_CM922T_XA10 609b880bd4SWolfgang Denk #define CONFIG_CM_SPD_DETECT /* CM supports SPD query */ 619b880bd4SWolfgang Denk #define OS_SPD 0x00000100 /* Address of SPD data */ 629b880bd4SWolfgang Denk #define CONFIG_CM_REMAP /* CM supports remapping */ 639b880bd4SWolfgang Denk #define CONFIG_CM_INIT /* CM has initialization reg */ 649b880bd4SWolfgang Denk #endif /* NOT EXCALIBUR */ 659b880bd4SWolfgang Denk 669b880bd4SWolfgang Denk #if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \ 679b880bd4SWolfgang Denk defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \ 689b880bd4SWolfgang Denk defined(CONFIG_CM1136JF_S) 699b880bd4SWolfgang Denk #define CONFIG_CM_TCRAM /* CM has TCRAM */ 709b880bd4SWolfgang Denk #endif 719b880bd4SWolfgang Denk 729b880bd4SWolfgang Denk #ifdef CONFIG_CM_SPD_DETECT 739b880bd4SWolfgang Denk #define OS_SPD 0x00000100 /* The SDRAM SPD data is copied here */ 749b880bd4SWolfgang Denk #endif 759b880bd4SWolfgang Denk 769b880bd4SWolfgang Denk #endif /* __ARMCOREMODULE_H */ 77