xref: /rk3399_rockchip-uboot/include/altera.h (revision a6164205ee933fa956d9f07f4ae08b39b64629e7)
1c609719bSwdenk /*
2c609719bSwdenk  * (C) Copyright 2002
3c609719bSwdenk  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4c609719bSwdenk  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6c609719bSwdenk  */
7c609719bSwdenk 
8c609719bSwdenk #include <fpga.h>
9c609719bSwdenk 
10c609719bSwdenk #ifndef _ALTERA_H_
11c609719bSwdenk #define _ALTERA_H_
12c609719bSwdenk 
13*ff9c4c53SStefan Roese /*
14*ff9c4c53SStefan Roese  * For the StratixV FPGA programming via SPI, the following
15*ff9c4c53SStefan Roese  * information is coded in the 32bit cookie:
16*ff9c4c53SStefan Roese  * Bit 31 ... Bit 0
17*ff9c4c53SStefan Roese  * SPI-Bus | SPI-Dev | Config-Pin | Done-Pin
18*ff9c4c53SStefan Roese  */
19*ff9c4c53SStefan Roese #define FPGA_COOKIE(bus, dev, config, done)			\
20*ff9c4c53SStefan Roese 	(((bus) << 24) | ((dev) << 16) | ((config) << 8) | (done))
21*ff9c4c53SStefan Roese #define COOKIE2SPI_BUS(c)	(((c) >> 24) & 0xff)
22*ff9c4c53SStefan Roese #define COOKIE2SPI_DEV(c)	(((c) >> 16) & 0xff)
23*ff9c4c53SStefan Roese #define COOKIE2CONFIG(c)	(((c) >> 8) & 0xff)
24*ff9c4c53SStefan Roese #define COOKIE2DONE(c)		((c) & 0xff)
25*ff9c4c53SStefan Roese 
26d44ef7ffSMarek Vasut enum altera_iface {
27d44ef7ffSMarek Vasut 	/* insert all new types after this */
28d44ef7ffSMarek Vasut 	min_altera_iface_type,
29d44ef7ffSMarek Vasut 	/* serial data and external clock */
30d44ef7ffSMarek Vasut 	passive_serial,
31d44ef7ffSMarek Vasut 	/* parallel data */
32d44ef7ffSMarek Vasut 	passive_parallel_synchronous,
33d44ef7ffSMarek Vasut 	/* parallel data */
34d44ef7ffSMarek Vasut 	passive_parallel_asynchronous,
35d44ef7ffSMarek Vasut 	/* serial data w/ internal clock (not used) */
36d44ef7ffSMarek Vasut 	passive_serial_asynchronous,
37d44ef7ffSMarek Vasut 	/* jtag/tap serial (not used ) */
38d44ef7ffSMarek Vasut 	altera_jtag_mode,
39d44ef7ffSMarek Vasut 	/* fast passive parallel (FPP) */
40d44ef7ffSMarek Vasut 	fast_passive_parallel,
41d44ef7ffSMarek Vasut 	/* fast passive parallel with security (FPPS) */
42d44ef7ffSMarek Vasut 	fast_passive_parallel_security,
43d44ef7ffSMarek Vasut 	/* insert all new types before this */
44d44ef7ffSMarek Vasut 	max_altera_iface_type,
45d44ef7ffSMarek Vasut };
46c609719bSwdenk 
47d44ef7ffSMarek Vasut enum altera_family {
48d44ef7ffSMarek Vasut 	/* insert all new types after this */
49d44ef7ffSMarek Vasut 	min_altera_type,
50d44ef7ffSMarek Vasut 	/* ACEX1K Family */
51d44ef7ffSMarek Vasut 	Altera_ACEX1K,
52d44ef7ffSMarek Vasut 	/* CYCLONII Family */
53d44ef7ffSMarek Vasut 	Altera_CYC2,
54d44ef7ffSMarek Vasut 	/* StratixII Family */
55d44ef7ffSMarek Vasut 	Altera_StratixII,
56*ff9c4c53SStefan Roese 	/* StratixV Family */
57*ff9c4c53SStefan Roese 	Altera_StratixV,
58230fe9b2SPavel Machek 	/* SoCFPGA Family */
59230fe9b2SPavel Machek 	Altera_SoCFPGA,
60d44ef7ffSMarek Vasut 
61c609719bSwdenk 	/* Add new models here */
62c609719bSwdenk 
63d44ef7ffSMarek Vasut 	/* insert all new types before this */
64d44ef7ffSMarek Vasut 	max_altera_type,
65d44ef7ffSMarek Vasut };
66d44ef7ffSMarek Vasut 
67d44ef7ffSMarek Vasut typedef struct {
68d44ef7ffSMarek Vasut 	/* part type */
69d44ef7ffSMarek Vasut 	enum altera_family	family;
70d44ef7ffSMarek Vasut 	/* interface type */
71d44ef7ffSMarek Vasut 	enum altera_iface	iface;
72d44ef7ffSMarek Vasut 	/* bytes of data part can accept */
73d44ef7ffSMarek Vasut 	size_t			size;
74d44ef7ffSMarek Vasut 	/* interface function table */
75d44ef7ffSMarek Vasut 	void			*iface_fns;
76d44ef7ffSMarek Vasut 	/* base interface address */
77d44ef7ffSMarek Vasut 	void			*base;
78d44ef7ffSMarek Vasut 	/* implementation specific cookie */
79d44ef7ffSMarek Vasut 	int			cookie;
80d44ef7ffSMarek Vasut } Altera_desc;
81c609719bSwdenk 
825da627a4Swdenk /* Generic Altera Functions
835da627a4Swdenk  *********************************************************************/
84e6a857daSWolfgang Denk extern int altera_load(Altera_desc *desc, const void *image, size_t size);
85e6a857daSWolfgang Denk extern int altera_dump(Altera_desc *desc, const void *buf, size_t bsize);
86c609719bSwdenk extern int altera_info(Altera_desc *desc);
875da627a4Swdenk 
885da627a4Swdenk /* Board specific implementation specific function types
895da627a4Swdenk  *********************************************************************/
905da627a4Swdenk typedef int (*Altera_pre_fn)( int cookie );
915da627a4Swdenk typedef int (*Altera_config_fn)( int assert_config, int flush, int cookie );
925da627a4Swdenk typedef int (*Altera_status_fn)( int cookie );
935da627a4Swdenk typedef int (*Altera_done_fn)( int cookie );
945da627a4Swdenk typedef int (*Altera_clk_fn)( int assert_clk, int flush, int cookie );
955da627a4Swdenk typedef int (*Altera_data_fn)( int assert_data, int flush, int cookie );
96e6a857daSWolfgang Denk typedef int(*Altera_write_fn)(const void *buf, size_t len, int flush, int cookie);
975da627a4Swdenk typedef int (*Altera_abort_fn)( int cookie );
985da627a4Swdenk typedef int (*Altera_post_fn)( int cookie );
99c609719bSwdenk 
1003c735e74Seran liberty typedef struct {
1013c735e74Seran liberty 	Altera_pre_fn pre;
1023c735e74Seran liberty 	Altera_config_fn config;
1033c735e74Seran liberty 	Altera_status_fn status;
1043c735e74Seran liberty 	Altera_done_fn done;
1053c735e74Seran liberty 	Altera_clk_fn clk;
1063c735e74Seran liberty 	Altera_data_fn data;
107*ff9c4c53SStefan Roese 	Altera_write_fn write;
1083c735e74Seran liberty 	Altera_abort_fn abort;
1093c735e74Seran liberty 	Altera_post_fn post;
1103c735e74Seran liberty } altera_board_specific_func;
1113c735e74Seran liberty 
112230fe9b2SPavel Machek #ifdef CONFIG_FPGA_SOCFPGA
113230fe9b2SPavel Machek int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
114230fe9b2SPavel Machek #endif
115230fe9b2SPavel Machek 
116*ff9c4c53SStefan Roese #ifdef CONFIG_FPGA_STRATIX_V
117*ff9c4c53SStefan Roese int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size);
118*ff9c4c53SStefan Roese #endif
119*ff9c4c53SStefan Roese 
120c609719bSwdenk #endif /* _ALTERA_H_ */
121