1*8f8a12d1SFelipe Balbi /*
2*8f8a12d1SFelipe Balbi * Copyright (c) 2017 Intel Corporation
3*8f8a12d1SFelipe Balbi *
4*8f8a12d1SFelipe Balbi * SPDX-License-Identifier: GPL-2.0+
5*8f8a12d1SFelipe Balbi */
6*8f8a12d1SFelipe Balbi #include <common.h>
7*8f8a12d1SFelipe Balbi #include <watchdog.h>
8*8f8a12d1SFelipe Balbi #include <asm/scu.h>
9*8f8a12d1SFelipe Balbi
10*8f8a12d1SFelipe Balbi /* Hardware timeout in seconds */
11*8f8a12d1SFelipe Balbi #define WDT_PRETIMEOUT 15
12*8f8a12d1SFelipe Balbi #define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
13*8f8a12d1SFelipe Balbi #define WDT_TIMEOUT_MAX 170
14*8f8a12d1SFelipe Balbi #define WDT_DEFAULT_TIMEOUT 90
15*8f8a12d1SFelipe Balbi
16*8f8a12d1SFelipe Balbi #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
17*8f8a12d1SFelipe Balbi #define WATCHDOG_HEARTBEAT 60000
18*8f8a12d1SFelipe Balbi #else
19*8f8a12d1SFelipe Balbi #define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_TIMEOUT_MSECS
20*8f8a12d1SFelipe Balbi #endif
21*8f8a12d1SFelipe Balbi
22*8f8a12d1SFelipe Balbi enum {
23*8f8a12d1SFelipe Balbi SCU_WATCHDOG_START = 0,
24*8f8a12d1SFelipe Balbi SCU_WATCHDOG_STOP = 1,
25*8f8a12d1SFelipe Balbi SCU_WATCHDOG_KEEPALIVE = 2,
26*8f8a12d1SFelipe Balbi SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
27*8f8a12d1SFelipe Balbi };
28*8f8a12d1SFelipe Balbi
hw_watchdog_reset(void)29*8f8a12d1SFelipe Balbi void hw_watchdog_reset(void)
30*8f8a12d1SFelipe Balbi {
31*8f8a12d1SFelipe Balbi static unsigned long last;
32*8f8a12d1SFelipe Balbi unsigned long now;
33*8f8a12d1SFelipe Balbi
34*8f8a12d1SFelipe Balbi if (gd->timer)
35*8f8a12d1SFelipe Balbi now = timer_get_us();
36*8f8a12d1SFelipe Balbi else
37*8f8a12d1SFelipe Balbi now = rdtsc() / 1000;
38*8f8a12d1SFelipe Balbi
39*8f8a12d1SFelipe Balbi /* Do not flood SCU */
40*8f8a12d1SFelipe Balbi if (last > now)
41*8f8a12d1SFelipe Balbi last = 0;
42*8f8a12d1SFelipe Balbi
43*8f8a12d1SFelipe Balbi if (unlikely((now - last) > (WDT_PRETIMEOUT / 2) * 1000000)) {
44*8f8a12d1SFelipe Balbi last = now;
45*8f8a12d1SFelipe Balbi scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
46*8f8a12d1SFelipe Balbi }
47*8f8a12d1SFelipe Balbi }
48*8f8a12d1SFelipe Balbi
hw_watchdog_disable(void)49*8f8a12d1SFelipe Balbi int hw_watchdog_disable(void)
50*8f8a12d1SFelipe Balbi {
51*8f8a12d1SFelipe Balbi return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
52*8f8a12d1SFelipe Balbi }
53*8f8a12d1SFelipe Balbi
hw_watchdog_init(void)54*8f8a12d1SFelipe Balbi void hw_watchdog_init(void)
55*8f8a12d1SFelipe Balbi {
56*8f8a12d1SFelipe Balbi u32 timeout = WATCHDOG_HEARTBEAT / 1000;
57*8f8a12d1SFelipe Balbi int in_size;
58*8f8a12d1SFelipe Balbi struct ipc_wd_start {
59*8f8a12d1SFelipe Balbi u32 pretimeout;
60*8f8a12d1SFelipe Balbi u32 timeout;
61*8f8a12d1SFelipe Balbi } ipc_wd_start = { timeout - WDT_PRETIMEOUT, timeout };
62*8f8a12d1SFelipe Balbi
63*8f8a12d1SFelipe Balbi /*
64*8f8a12d1SFelipe Balbi * SCU expects the input size for watchdog IPC
65*8f8a12d1SFelipe Balbi * to be based on 4 bytes
66*8f8a12d1SFelipe Balbi */
67*8f8a12d1SFelipe Balbi in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
68*8f8a12d1SFelipe Balbi
69*8f8a12d1SFelipe Balbi scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
70*8f8a12d1SFelipe Balbi (u32 *)&ipc_wd_start, in_size, NULL, 0);
71*8f8a12d1SFelipe Balbi }
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