xref: /rk3399_rockchip-uboot/drivers/video/rockchip/rk3399_vop.c (revision 156d64fa55e9914b144c5e83f2a9e13d1223a4d3)
1*cc75afc5SPhilipp Tomsich /*
2*cc75afc5SPhilipp Tomsich  * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
3*cc75afc5SPhilipp Tomsich  * Copyright (c) 2015 Google, Inc
4*cc75afc5SPhilipp Tomsich  * Copyright 2014 Rockchip Inc.
5*cc75afc5SPhilipp Tomsich  *
6*cc75afc5SPhilipp Tomsich  * SPDX-License-Identifier: GPL-2.0+
7*cc75afc5SPhilipp Tomsich  */
8*cc75afc5SPhilipp Tomsich 
9*cc75afc5SPhilipp Tomsich #include <common.h>
10*cc75afc5SPhilipp Tomsich #include <display.h>
11*cc75afc5SPhilipp Tomsich #include <dm.h>
12*cc75afc5SPhilipp Tomsich #include <regmap.h>
13*cc75afc5SPhilipp Tomsich #include <video.h>
14*cc75afc5SPhilipp Tomsich #include <asm/hardware.h>
15*cc75afc5SPhilipp Tomsich #include <asm/io.h>
16*cc75afc5SPhilipp Tomsich #include "rk_vop.h"
17*cc75afc5SPhilipp Tomsich 
18*cc75afc5SPhilipp Tomsich DECLARE_GLOBAL_DATA_PTR;
19*cc75afc5SPhilipp Tomsich 
rk3399_set_pin_polarity(struct udevice * dev,enum vop_modes mode,u32 polarity)20*cc75afc5SPhilipp Tomsich static void rk3399_set_pin_polarity(struct udevice *dev,
21*cc75afc5SPhilipp Tomsich 				    enum vop_modes mode, u32 polarity)
22*cc75afc5SPhilipp Tomsich {
23*cc75afc5SPhilipp Tomsich 	struct rk_vop_priv *priv = dev_get_priv(dev);
24*cc75afc5SPhilipp Tomsich 	struct rk3288_vop *regs = priv->regs;
25*cc75afc5SPhilipp Tomsich 
26*cc75afc5SPhilipp Tomsich 	/*
27*cc75afc5SPhilipp Tomsich 	 * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
28*cc75afc5SPhilipp Tomsich 	 * the polarity configuration (in ctrl1).
29*cc75afc5SPhilipp Tomsich 	 */
30*cc75afc5SPhilipp Tomsich 	switch (mode) {
31*cc75afc5SPhilipp Tomsich 	case VOP_MODE_HDMI:
32*cc75afc5SPhilipp Tomsich 		clrsetbits_le32(&regs->dsp_ctrl1,
33*cc75afc5SPhilipp Tomsich 				M_RK3399_DSP_HDMI_POL,
34*cc75afc5SPhilipp Tomsich 				V_RK3399_DSP_HDMI_POL(polarity));
35*cc75afc5SPhilipp Tomsich 		break;
36*cc75afc5SPhilipp Tomsich 
37*cc75afc5SPhilipp Tomsich 	case VOP_MODE_EDP:
38*cc75afc5SPhilipp Tomsich 		clrsetbits_le32(&regs->dsp_ctrl1,
39*cc75afc5SPhilipp Tomsich 				M_RK3399_DSP_EDP_POL,
40*cc75afc5SPhilipp Tomsich 				V_RK3399_DSP_EDP_POL(polarity));
41*cc75afc5SPhilipp Tomsich 		break;
42*cc75afc5SPhilipp Tomsich 
43*cc75afc5SPhilipp Tomsich 	case VOP_MODE_MIPI:
44*cc75afc5SPhilipp Tomsich 		clrsetbits_le32(&regs->dsp_ctrl1,
45*cc75afc5SPhilipp Tomsich 				M_RK3399_DSP_MIPI_POL,
46*cc75afc5SPhilipp Tomsich 				V_RK3399_DSP_MIPI_POL(polarity));
47*cc75afc5SPhilipp Tomsich 		break;
48*cc75afc5SPhilipp Tomsich 
49*cc75afc5SPhilipp Tomsich 	case VOP_MODE_LVDS:
50*cc75afc5SPhilipp Tomsich 		/* The RK3399 has neither parallel RGB nor LVDS output. */
51*cc75afc5SPhilipp Tomsich 	default:
52*cc75afc5SPhilipp Tomsich 		debug("%s: unsupported output mode %x\n", __func__, mode);
53*cc75afc5SPhilipp Tomsich 	}
54*cc75afc5SPhilipp Tomsich }
55*cc75afc5SPhilipp Tomsich 
56*cc75afc5SPhilipp Tomsich /*
57*cc75afc5SPhilipp Tomsich  * Try some common regulators. We should really get these from the
58*cc75afc5SPhilipp Tomsich  * device tree somehow.
59*cc75afc5SPhilipp Tomsich  */
60*cc75afc5SPhilipp Tomsich static const char * const rk3399_regulator_names[] = {
61*cc75afc5SPhilipp Tomsich 	"vcc33_lcd"
62*cc75afc5SPhilipp Tomsich };
63*cc75afc5SPhilipp Tomsich 
rk3399_vop_probe(struct udevice * dev)64*cc75afc5SPhilipp Tomsich static int rk3399_vop_probe(struct udevice *dev)
65*cc75afc5SPhilipp Tomsich {
66*cc75afc5SPhilipp Tomsich 	/* Before relocation we don't need to do anything */
67*cc75afc5SPhilipp Tomsich 	if (!(gd->flags & GD_FLG_RELOC))
68*cc75afc5SPhilipp Tomsich 		return 0;
69*cc75afc5SPhilipp Tomsich 
70*cc75afc5SPhilipp Tomsich 	/* Probe regulators required for the RK3399 VOP */
71*cc75afc5SPhilipp Tomsich 	rk_vop_probe_regulators(dev, rk3399_regulator_names,
72*cc75afc5SPhilipp Tomsich 				ARRAY_SIZE(rk3399_regulator_names));
73*cc75afc5SPhilipp Tomsich 
74*cc75afc5SPhilipp Tomsich 	return rk_vop_probe(dev);
75*cc75afc5SPhilipp Tomsich }
76*cc75afc5SPhilipp Tomsich 
77*cc75afc5SPhilipp Tomsich struct rkvop_driverdata rk3399_lit_driverdata = {
78*cc75afc5SPhilipp Tomsich 	.set_pin_polarity = rk3399_set_pin_polarity,
79*cc75afc5SPhilipp Tomsich };
80*cc75afc5SPhilipp Tomsich 
81*cc75afc5SPhilipp Tomsich struct rkvop_driverdata rk3399_big_driverdata = {
82*cc75afc5SPhilipp Tomsich 	.features = VOP_FEATURE_OUTPUT_10BIT,
83*cc75afc5SPhilipp Tomsich 	.set_pin_polarity = rk3399_set_pin_polarity,
84*cc75afc5SPhilipp Tomsich };
85*cc75afc5SPhilipp Tomsich 
86*cc75afc5SPhilipp Tomsich static const struct udevice_id rk3399_vop_ids[] = {
87*cc75afc5SPhilipp Tomsich 	{ .compatible = "rockchip,rk3399-vop-big",
88*cc75afc5SPhilipp Tomsich 	  .data = (ulong)&rk3399_big_driverdata },
89*cc75afc5SPhilipp Tomsich 	{ .compatible = "rockchip,rk3399-vop-lit",
90*cc75afc5SPhilipp Tomsich 	  .data = (ulong)&rk3399_lit_driverdata },
91*cc75afc5SPhilipp Tomsich 	{ }
92*cc75afc5SPhilipp Tomsich };
93*cc75afc5SPhilipp Tomsich 
94*cc75afc5SPhilipp Tomsich static const struct video_ops rk3399_vop_ops = {
95*cc75afc5SPhilipp Tomsich };
96*cc75afc5SPhilipp Tomsich 
97*cc75afc5SPhilipp Tomsich U_BOOT_DRIVER(rk3399_vop) = {
98*cc75afc5SPhilipp Tomsich 	.name	= "rk3399_vop",
99*cc75afc5SPhilipp Tomsich 	.id	= UCLASS_VIDEO,
100*cc75afc5SPhilipp Tomsich 	.of_match = rk3399_vop_ids,
101*cc75afc5SPhilipp Tomsich 	.ops	= &rk3399_vop_ops,
102*cc75afc5SPhilipp Tomsich 	.bind	= rk_vop_bind,
103*cc75afc5SPhilipp Tomsich 	.probe	= rk3399_vop_probe,
104*cc75afc5SPhilipp Tomsich 	.priv_auto_alloc_size	= sizeof(struct rk_vop_priv),
105*cc75afc5SPhilipp Tomsich };
106