1*08a7aa1eSSimon Glass /* 2*08a7aa1eSSimon Glass * Copyright (C) 2012 Samsung Electronics 3*08a7aa1eSSimon Glass * 4*08a7aa1eSSimon Glass * Author: InKi Dae <inki.dae@samsung.com> 5*08a7aa1eSSimon Glass * Author: Donghwa Lee <dh09.lee@samsung.com> 6*08a7aa1eSSimon Glass * 7*08a7aa1eSSimon Glass * SPDX-License-Identifier: GPL-2.0+ 8*08a7aa1eSSimon Glass */ 9*08a7aa1eSSimon Glass 10*08a7aa1eSSimon Glass #ifndef _EXYNOS_MIPI_DSI_LOWLEVEL_H 11*08a7aa1eSSimon Glass #define _EXYNOS_MIPI_DSI_LOWLEVEL_H 12*08a7aa1eSSimon Glass 13*08a7aa1eSSimon Glass void exynos_mipi_dsi_register(struct mipi_dsim_device *dsim); 14*08a7aa1eSSimon Glass void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim); 15*08a7aa1eSSimon Glass void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim); 16*08a7aa1eSSimon Glass void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim); 17*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim, 18*08a7aa1eSSimon Glass unsigned int mode, unsigned int mask); 19*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim, 20*08a7aa1eSSimon Glass unsigned int count); 21*08a7aa1eSSimon Glass void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim, 22*08a7aa1eSSimon Glass unsigned int cfg); 23*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim, 24*08a7aa1eSSimon Glass unsigned int value); 25*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim, 26*08a7aa1eSSimon Glass unsigned int value); 27*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim, 28*08a7aa1eSSimon Glass unsigned int width_resol, unsigned int height_resol); 29*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim, 30*08a7aa1eSSimon Glass unsigned int cmd_allow, unsigned int vfront, unsigned int vback); 31*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim, 32*08a7aa1eSSimon Glass unsigned int front, unsigned int back); 33*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim, 34*08a7aa1eSSimon Glass unsigned int vert, unsigned int hori); 35*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim, 36*08a7aa1eSSimon Glass unsigned int vert, unsigned int hori); 37*08a7aa1eSSimon Glass void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim); 38*08a7aa1eSSimon Glass void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim, 39*08a7aa1eSSimon Glass struct mipi_dsim_config *dsim_config); 40*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim, 41*08a7aa1eSSimon Glass unsigned int count); 42*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim, 43*08a7aa1eSSimon Glass unsigned int lane, unsigned int enable); 44*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim, 45*08a7aa1eSSimon Glass unsigned int enable, unsigned int afc_code); 46*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim, 47*08a7aa1eSSimon Glass unsigned int enable); 48*08a7aa1eSSimon Glass void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim, 49*08a7aa1eSSimon Glass unsigned int freq_band); 50*08a7aa1eSSimon Glass void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim, 51*08a7aa1eSSimon Glass unsigned int pre_divider, unsigned int main_divider, 52*08a7aa1eSSimon Glass unsigned int scaler); 53*08a7aa1eSSimon Glass void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim, 54*08a7aa1eSSimon Glass unsigned int lock_time); 55*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim, 56*08a7aa1eSSimon Glass unsigned int enable); 57*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim, 58*08a7aa1eSSimon Glass unsigned int src); 59*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim, 60*08a7aa1eSSimon Glass unsigned int enable); 61*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim, 62*08a7aa1eSSimon Glass unsigned int enable, unsigned int prs_val); 63*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim, 64*08a7aa1eSSimon Glass unsigned int lane_sel, unsigned int enable); 65*08a7aa1eSSimon Glass void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim, 66*08a7aa1eSSimon Glass unsigned int enable); 67*08a7aa1eSSimon Glass unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim); 68*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim, 69*08a7aa1eSSimon Glass unsigned int cnt_val); 70*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim, 71*08a7aa1eSSimon Glass unsigned int timeout); 72*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim, 73*08a7aa1eSSimon Glass unsigned int timeout); 74*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim, 75*08a7aa1eSSimon Glass unsigned int lp); 76*08a7aa1eSSimon Glass void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim, 77*08a7aa1eSSimon Glass unsigned int lp); 78*08a7aa1eSSimon Glass void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim, 79*08a7aa1eSSimon Glass unsigned int enable); 80*08a7aa1eSSimon Glass void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim, 81*08a7aa1eSSimon Glass unsigned int swap_en); 82*08a7aa1eSSimon Glass void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim, 83*08a7aa1eSSimon Glass unsigned int hs_zero); 84*08a7aa1eSSimon Glass void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, 85*08a7aa1eSSimon Glass unsigned int prep); 86*08a7aa1eSSimon Glass void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim); 87*08a7aa1eSSimon Glass void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim); 88*08a7aa1eSSimon Glass unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim); 89*08a7aa1eSSimon Glass unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim); 90*08a7aa1eSSimon Glass unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device 91*08a7aa1eSSimon Glass *dsim); 92*08a7aa1eSSimon Glass void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim); 93*08a7aa1eSSimon Glass void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim, 94*08a7aa1eSSimon Glass unsigned int di, const unsigned char data0, const unsigned char data1); 95*08a7aa1eSSimon Glass void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim, 96*08a7aa1eSSimon Glass unsigned int tx_data); 97*08a7aa1eSSimon Glass 98*08a7aa1eSSimon Glass #endif /* _EXYNOS_MIPI_DSI_LOWLEVEL_H */ 99