1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <errno.h> 9 #include <syscon.h> 10 #include <regmap.h> 11 #include <dm/device.h> 12 #include <dm/read.h> 13 #include <dm/pinctrl.h> 14 #include <linux/media-bus-format.h> 15 16 #include "rockchip_display.h" 17 #include "rockchip_crtc.h" 18 #include "rockchip_connector.h" 19 #include "rockchip_phy.h" 20 21 #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK(h, l) << 16)) 22 23 #define PX30_GRF_PD_VO_CON1 0x0438 24 #define PX30_RGB_DATA_SYNC_BYPASS(v) HIWORD_UPDATE(v, 3, 3) 25 #define PX30_RGB_VOP_SEL(v) HIWORD_UPDATE(v, 2, 2) 26 27 #define RK1808_GRF_PD_VO_CON1 0x0444 28 #define RK1808_RGB_DATA_SYNC_BYPASS(v) HIWORD_UPDATE(v, 3, 3) 29 30 #define RK3288_GRF_SOC_CON6 0x025c 31 #define RK3288_LVDS_LCDC_SEL(v) HIWORD_UPDATE(v, 3, 3) 32 #define RK3288_GRF_SOC_CON7 0x0260 33 #define RK3288_LVDS_PWRDWN(v) HIWORD_UPDATE(v, 15, 15) 34 #define RK3288_LVDS_CON_ENABLE_2(v) HIWORD_UPDATE(v, 12, 12) 35 #define RK3288_LVDS_CON_ENABLE_1(v) HIWORD_UPDATE(v, 11, 11) 36 #define RK3288_LVDS_CON_CLKINV(v) HIWORD_UPDATE(v, 8, 8) 37 #define RK3288_LVDS_CON_TTL_EN(v) HIWORD_UPDATE(v, 6, 6) 38 39 struct rockchip_rgb; 40 41 struct rockchip_rgb_funcs { 42 void (*enable)(struct rockchip_rgb *rgb, int pipe); 43 void (*disable)(struct rockchip_rgb *rgb); 44 }; 45 46 struct rockchip_rgb { 47 struct udevice *dev; 48 struct regmap *grf; 49 bool data_sync; 50 struct rockchip_phy *phy; 51 const struct rockchip_rgb_funcs *funcs; 52 }; 53 54 static inline struct rockchip_rgb *state_to_rgb(struct display_state *state) 55 { 56 struct connector_state *conn_state = &state->conn_state; 57 58 return dev_get_priv(conn_state->dev); 59 } 60 61 static int rockchip_rgb_connector_enable(struct display_state *state) 62 { 63 struct rockchip_rgb *rgb = state_to_rgb(state); 64 struct crtc_state *crtc_state = &state->crtc_state; 65 int pipe = crtc_state->crtc_id; 66 int ret; 67 68 pinctrl_select_state(rgb->dev, "default"); 69 70 if (rgb->funcs && rgb->funcs->enable) 71 rgb->funcs->enable(rgb, pipe); 72 73 if (rgb->phy) { 74 ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL); 75 if (ret) { 76 dev_err(rgb->dev, "failed to set phy mode: %d\n", ret); 77 return ret; 78 } 79 80 rockchip_phy_power_on(rgb->phy); 81 } 82 83 return 0; 84 } 85 86 static int rockchip_rgb_connector_disable(struct display_state *state) 87 { 88 struct rockchip_rgb *rgb = state_to_rgb(state); 89 90 if (rgb->phy) 91 rockchip_phy_power_off(rgb->phy); 92 93 if (rgb->funcs && rgb->funcs->disable) 94 rgb->funcs->disable(rgb); 95 96 pinctrl_select_state(rgb->dev, "sleep"); 97 98 return 0; 99 } 100 101 static int rockchip_rgb_connector_init(struct display_state *state) 102 { 103 struct rockchip_rgb *rgb = state_to_rgb(state); 104 struct connector_state *conn_state = &state->conn_state; 105 106 rgb->phy = conn_state->phy; 107 108 conn_state->type = DRM_MODE_CONNECTOR_LVDS; 109 conn_state->color_space = V4L2_COLORSPACE_DEFAULT; 110 111 switch (conn_state->bus_format) { 112 case MEDIA_BUS_FMT_RGB666_1X18: 113 conn_state->output_mode = ROCKCHIP_OUT_MODE_P666; 114 break; 115 case MEDIA_BUS_FMT_RGB565_1X16: 116 conn_state->output_mode = ROCKCHIP_OUT_MODE_P565; 117 break; 118 case MEDIA_BUS_FMT_RGB888_1X24: 119 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 120 default: 121 conn_state->output_mode = ROCKCHIP_OUT_MODE_P888; 122 break; 123 } 124 125 return 0; 126 } 127 128 static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = { 129 .init = rockchip_rgb_connector_init, 130 .enable = rockchip_rgb_connector_enable, 131 .disable = rockchip_rgb_connector_disable, 132 }; 133 134 static int rockchip_rgb_probe(struct udevice *dev) 135 { 136 struct rockchip_rgb *rgb = dev_get_priv(dev); 137 const struct rockchip_connector *connector = 138 (const struct rockchip_connector *)dev_get_driver_data(dev); 139 140 rgb->dev = dev; 141 rgb->funcs = connector->data; 142 rgb->grf = syscon_get_regmap(dev_get_parent(dev)); 143 rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync"); 144 145 return 0; 146 } 147 148 static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe) 149 { 150 regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) | 151 PX30_RGB_DATA_SYNC_BYPASS(!rgb->data_sync)); 152 } 153 154 static const struct rockchip_rgb_funcs px30_rgb_funcs = { 155 .enable = px30_rgb_enable, 156 }; 157 158 static const struct rockchip_connector px30_rgb_driver_data = { 159 .funcs = &rockchip_rgb_connector_funcs, 160 .data = &px30_rgb_funcs, 161 }; 162 163 static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe) 164 { 165 regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1, 166 RK1808_RGB_DATA_SYNC_BYPASS(!rgb->data_sync)); 167 } 168 169 static const struct rockchip_rgb_funcs rk1808_rgb_funcs = { 170 .enable = rk1808_rgb_enable, 171 }; 172 173 static const struct rockchip_connector rk1808_rgb_driver_data = { 174 .funcs = &rockchip_rgb_connector_funcs, 175 .data = &rk1808_rgb_funcs, 176 }; 177 178 static void rk3288_rgb_enable(struct rockchip_rgb *rgb, int pipe) 179 { 180 regmap_write(rgb->grf, RK3288_GRF_SOC_CON6, RK3288_LVDS_LCDC_SEL(pipe)); 181 regmap_write(rgb->grf, RK3288_GRF_SOC_CON7, 182 RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_ENABLE_2(1) | 183 RK3288_LVDS_CON_ENABLE_1(1) | RK3288_LVDS_CON_CLKINV(0) | 184 RK3288_LVDS_CON_TTL_EN(1)); 185 } 186 187 static void rk3288_rgb_disable(struct rockchip_rgb *rgb) 188 { 189 regmap_write(rgb->grf, RK3288_GRF_SOC_CON7, 190 RK3288_LVDS_PWRDWN(1) | RK3288_LVDS_CON_ENABLE_2(0) | 191 RK3288_LVDS_CON_ENABLE_1(0) | RK3288_LVDS_CON_TTL_EN(0)); 192 } 193 194 static const struct rockchip_rgb_funcs rk3288_rgb_funcs = { 195 .enable = rk3288_rgb_enable, 196 .disable = rk3288_rgb_disable, 197 }; 198 199 static const struct rockchip_connector rk3288_rgb_driver_data = { 200 .funcs = &rockchip_rgb_connector_funcs, 201 .data = &rk3288_rgb_funcs, 202 }; 203 204 static const struct rockchip_connector rockchip_rgb_driver_data = { 205 .funcs = &rockchip_rgb_connector_funcs, 206 }; 207 208 static const struct udevice_id rockchip_rgb_ids[] = { 209 { 210 .compatible = "rockchip,px30-rgb", 211 .data = (ulong)&px30_rgb_driver_data, 212 }, 213 { 214 .compatible = "rockchip,rk1808-rgb", 215 .data = (ulong)&rk1808_rgb_driver_data, 216 }, 217 { 218 .compatible = "rockchip,rk3066-rgb", 219 .data = (ulong)&rockchip_rgb_driver_data, 220 }, 221 { 222 .compatible = "rockchip,rk3128-rgb", 223 .data = (ulong)&rockchip_rgb_driver_data, 224 }, 225 { 226 .compatible = "rockchip,rk3288-rgb", 227 .data = (ulong)&rk3288_rgb_driver_data, 228 }, 229 { 230 .compatible = "rockchip,rk3308-rgb", 231 .data = (ulong)&rockchip_rgb_driver_data, 232 }, 233 { 234 .compatible = "rockchip,rk3368-rgb", 235 .data = (ulong)&rockchip_rgb_driver_data, 236 }, 237 { 238 .compatible = "rockchip,rv1108-rgb", 239 .data = (ulong)&rockchip_rgb_driver_data, 240 }, 241 {} 242 }; 243 244 U_BOOT_DRIVER(rockchip_rgb) = { 245 .name = "rockchip_rgb", 246 .id = UCLASS_DISPLAY, 247 .of_match = rockchip_rgb_ids, 248 .probe = rockchip_rgb_probe, 249 .priv_auto_alloc_size = sizeof(struct rockchip_rgb), 250 }; 251