1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_PHY_H_ 8 #define _ROCKCHIP_PHY_H_ 9 10 enum phy_mode { 11 PHY_MODE_MIPI_DPHY, 12 PHY_MODE_LVDS, 13 }; 14 15 struct rockchip_phy; 16 17 struct rockchip_phy_funcs { 18 int (*init)(struct rockchip_phy *phy); 19 int (*power_on)(struct rockchip_phy *phy); 20 int (*power_off)(struct rockchip_phy *phy); 21 unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate); 22 int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width); 23 long (*round_rate)(struct rockchip_phy *phy, unsigned long rate); 24 int (*set_mode)(struct rockchip_phy *phy, enum phy_mode mode); 25 }; 26 27 struct rockchip_phy { 28 struct udevice *dev; 29 const struct rockchip_phy_funcs *funcs; 30 const void *data; 31 int soc_type; 32 }; 33 34 int rockchip_phy_init(struct rockchip_phy *phy); 35 int rockchip_phy_power_off(struct rockchip_phy *phy); 36 int rockchip_phy_power_on(struct rockchip_phy *phy); 37 unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy, 38 unsigned long rate); 39 int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width); 40 long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate); 41 int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode); 42 43 #endif 44