xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_lvds.c (revision 2bcebb1a79550117e5474bb586bdc094e4fe0576)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <config.h>
8 #include <common.h>
9 #include <errno.h>
10 #include <dm/device.h>
11 #include <dm/read.h>
12 #include <dm/ofnode.h>
13 #include <dm/of_access.h>
14 #include <syscon.h>
15 #include <regmap.h>
16 #include <dm/device.h>
17 #include <dm/read.h>
18 #include <linux/media-bus-format.h>
19 
20 #include "rockchip_display.h"
21 #include "rockchip_connector.h"
22 #include "rockchip_phy.h"
23 #include "rockchip_panel.h"
24 
25 #define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
26 
27 #define PX30_GRF_PD_VO_CON1		0x0438
28 #define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
29 #define PX30_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
30 #define PX30_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
31 #define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
32 #define PX30_LVDS_VOP_SEL(x)		HIWORD_UPDATE(x,  1,  1)
33 
34 #define RK3126_GRF_LVDS_CON0		0x0150
35 #define RK3126_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  9,  9)
36 #define RK3126_LVDS_MODE_EN(x)		HIWORD_UPDATE(x,  6,  6)
37 #define RK3126_LVDS_MSBSEL(x)		HIWORD_UPDATE(x,  3,  3)
38 #define RK3126_LVDS_SELECT(x)		HIWORD_UPDATE(x,  2,  1)
39 
40 #define RK3288_GRF_SOC_CON6		0x025c
41 #define RK3288_LVDS_LCDC_SEL(x)		HIWORD_UPDATE(x,  3,  3)
42 #define RK3288_GRF_SOC_CON7		0x0260
43 #define RK3288_LVDS_PWRDWN(x)		HIWORD_UPDATE(x, 15, 15)
44 #define RK3288_LVDS_CON_ENABLE_2(x)	HIWORD_UPDATE(x, 12, 12)
45 #define RK3288_LVDS_CON_ENABLE_1(x)	HIWORD_UPDATE(x, 11, 11)
46 #define RK3288_LVDS_CON_DEN_POL(x)	HIWORD_UPDATE(x, 10, 10)
47 #define RK3288_LVDS_CON_HS_POL(x)	HIWORD_UPDATE(x,  9,  9)
48 #define RK3288_LVDS_CON_CLKINV(x)	HIWORD_UPDATE(x,  8,  8)
49 #define RK3288_LVDS_CON_STARTPHASE(x)	HIWORD_UPDATE(x,  7,  7)
50 #define RK3288_LVDS_CON_TTL_EN(x)	HIWORD_UPDATE(x,  6,  6)
51 #define RK3288_LVDS_CON_STARTSEL(x)	HIWORD_UPDATE(x,  5,  5)
52 #define RK3288_LVDS_CON_CHASEL(x)	HIWORD_UPDATE(x,  4,  4)
53 #define RK3288_LVDS_CON_MSBSEL(x)	HIWORD_UPDATE(x,  3,  3)
54 #define RK3288_LVDS_CON_SELECT(x)	HIWORD_UPDATE(x,  2,  0)
55 
56 #define RK3368_GRF_SOC_CON7		0x041c
57 #define RK3368_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
58 #define RK3368_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
59 #define RK3368_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
60 #define RK3368_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
61 
62 #define RK3568_GRF_VO_CON0		0x0360
63 #define RK3568_LVDS1_SELECT(x)		HIWORD_UPDATE(x, 13, 12)
64 #define RK3568_LVDS1_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
65 #define RK3568_LVDS0_SELECT(x)		HIWORD_UPDATE(x,  5,  4)
66 #define RK3568_LVDS0_MSBSEL(x)		HIWORD_UPDATE(x,  3,  3)
67 #define RK3568_GRF_VO_CON2		0x0368
68 #define RK3568_LVDS0_DCLK_INV_SEL(x)	HIWORD_UPDATE(x,  9,  9)
69 #define RK3568_LVDS0_DCLK_DIV2_SEL(x)	HIWORD_UPDATE(x,  8,  8)
70 #define RK3568_LVDS0_MODE_EN(x)		HIWORD_UPDATE(x,  1,  1)
71 #define RK3568_LVDS0_P2S_EN(x)		HIWORD_UPDATE(x,  0,  0)
72 #define RK3568_GRF_VO_CON3		0x036c
73 #define RK3568_LVDS1_DCLK_INV_SEL(x)	HIWORD_UPDATE(x,  9,  9)
74 #define RK3568_LVDS1_DCLK_DIV2_SEL(x)	HIWORD_UPDATE(x,  8,  8)
75 #define RK3568_LVDS1_MODE_EN(x)		HIWORD_UPDATE(x,  1,  1)
76 #define RK3568_LVDS1_P2S_EN(x)		HIWORD_UPDATE(x,  0,  0)
77 
78 enum lvds_format {
79 	LVDS_8BIT_MODE_FORMAT_1,
80 	LVDS_8BIT_MODE_FORMAT_2,
81 	LVDS_8BIT_MODE_FORMAT_3,
82 	LVDS_6BIT_MODE,
83 	LVDS_10BIT_MODE_FORMAT_1,
84 	LVDS_10BIT_MODE_FORMAT_2,
85 };
86 
87 struct rockchip_lvds;
88 
89 struct rockchip_lvds_funcs {
90 	void (*enable)(struct rockchip_lvds *lvds, int pipe);
91 	void (*disable)(struct rockchip_lvds *lvds);
92 };
93 
94 struct rockchip_lvds {
95 	struct rockchip_connector connector;
96 	int id;
97 	struct udevice *dev;
98 	struct regmap *grf;
99 	struct rockchip_phy *phy;
100 	const struct drm_display_mode *mode;
101 	const struct rockchip_lvds_funcs *funcs;
102 	enum lvds_format format;
103 	bool data_swap;
104 	bool dual_channel;
105 };
106 
107 static int rockchip_lvds_connector_init(struct rockchip_connector *conn,
108 					struct display_state *state)
109 {
110 	struct rockchip_lvds *lvds = dev_get_priv(conn->dev);
111 	struct connector_state *conn_state = &state->conn_state;
112 	struct rockchip_panel *panel = conn->panel;
113 
114 	lvds->mode = &conn_state->mode;
115 	lvds->phy = conn->phy;
116 	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, lvds->id);
117 
118 	switch (panel->bus_format) {
119 	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
120 		lvds->format = LVDS_6BIT_MODE;
121 		break;
122 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
123 		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
124 		break;
125 	case MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA: /* jeida-30 */
126 		lvds->format = LVDS_10BIT_MODE_FORMAT_1;
127 	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
128 		lvds->format = LVDS_8BIT_MODE_FORMAT_3;
129 		break;
130 	case MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG: /* vesa-30 */
131 		lvds->format = LVDS_10BIT_MODE_FORMAT_2;
132 		break;
133 	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
134 	default:
135 		lvds->format = LVDS_8BIT_MODE_FORMAT_1;
136 		break;
137 	}
138 
139 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
140 
141 	if ((lvds->format == LVDS_10BIT_MODE_FORMAT_1) ||
142 		(lvds->format == LVDS_10BIT_MODE_FORMAT_2))
143 		conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
144 
145 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
146 	conn_state->output_if = VOP_OUTPUT_IF_LVDS0;
147 
148 	return 0;
149 }
150 
151 static int rockchip_lvds_connector_enable(struct rockchip_connector *conn,
152 					  struct display_state *state)
153 {
154 	struct rockchip_lvds *lvds = dev_get_priv(conn->dev);
155 	struct crtc_state *crtc_state = &state->crtc_state;
156 	int pipe = crtc_state->crtc_id;
157 	int ret;
158 
159 	if (lvds->funcs->enable)
160 		lvds->funcs->enable(lvds, pipe);
161 
162 	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_VIDEO_LVDS);
163 	if (ret) {
164 		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
165 		return ret;
166 	}
167 
168 	rockchip_phy_power_on(lvds->phy);
169 
170 	return 0;
171 }
172 
173 static int rockchip_lvds_connector_disable(struct rockchip_connector *conn,
174 					   struct display_state *state)
175 {
176 	struct rockchip_lvds *lvds = dev_get_priv(conn->dev);
177 
178 	rockchip_phy_power_off(lvds->phy);
179 
180 	if (lvds->funcs->disable)
181 		lvds->funcs->disable(lvds);
182 
183 	return 0;
184 }
185 
186 static const struct rockchip_connector_funcs rockchip_lvds_connector_funcs = {
187 	.init = rockchip_lvds_connector_init,
188 	.enable = rockchip_lvds_connector_enable,
189 	.disable = rockchip_lvds_connector_disable,
190 };
191 
192 static int rockchip_lvds_probe(struct udevice *dev)
193 {
194 	struct rockchip_lvds *lvds = dev_get_priv(dev);
195 
196 	lvds->dev = dev;
197 	lvds->funcs = (const struct rockchip_lvds_funcs *)dev_get_driver_data(dev);
198 	lvds->grf = syscon_get_regmap(dev_get_parent(dev));
199 	lvds->dual_channel = dev_read_bool(dev, "dual-channel");
200 	lvds->data_swap = dev_read_bool(dev, "rockchip,data-swap");
201 	lvds->id = of_alias_get_id(ofnode_to_np(dev->node), "lvds");
202 	if (lvds->id < 0)
203 		lvds->id = 0;
204 
205 	rockchip_connector_bind(&lvds->connector, dev, lvds->id, &rockchip_lvds_connector_funcs,
206 				NULL, DRM_MODE_CONNECTOR_LVDS);
207 
208 	return 0;
209 }
210 
211 static void px30_lvds_enable(struct rockchip_lvds *lvds, int pipe)
212 {
213 	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
214 		     PX30_LVDS_SELECT(lvds->format) |
215 		     PX30_LVDS_MODE_EN(1) | PX30_LVDS_MSBSEL(1) |
216 		     PX30_LVDS_P2S_EN(1) | PX30_LVDS_VOP_SEL(pipe));
217 }
218 
219 static void px30_lvds_disable(struct rockchip_lvds *lvds)
220 {
221 	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
222 		     PX30_LVDS_MODE_EN(0) | PX30_LVDS_P2S_EN(0));
223 }
224 
225 static const struct rockchip_lvds_funcs px30_lvds_funcs = {
226 	.enable = px30_lvds_enable,
227 	.disable = px30_lvds_disable,
228 };
229 
230 static void rk3126_lvds_enable(struct rockchip_lvds *lvds, int pipe)
231 {
232 	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
233 		     RK3126_LVDS_P2S_EN(1) | RK3126_LVDS_MODE_EN(1) |
234 		     RK3126_LVDS_MSBSEL(1) | RK3126_LVDS_SELECT(lvds->format));
235 }
236 
237 static void rk3126_lvds_disable(struct rockchip_lvds *lvds)
238 {
239 	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
240 		     RK3126_LVDS_P2S_EN(0) | RK3126_LVDS_MODE_EN(0));
241 }
242 
243 static const struct rockchip_lvds_funcs rk3126_lvds_funcs = {
244 	.enable = rk3126_lvds_enable,
245 	.disable = rk3126_lvds_disable,
246 };
247 
248 static void rk3288_lvds_enable(struct rockchip_lvds *lvds, int pipe)
249 {
250 	const struct drm_display_mode *mode = lvds->mode;
251 	u32 val;
252 
253 	regmap_write(lvds->grf, RK3288_GRF_SOC_CON6,
254 		     RK3288_LVDS_LCDC_SEL(pipe));
255 
256 	val = RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_CLKINV(0) |
257 	      RK3288_LVDS_CON_CHASEL(lvds->dual_channel) |
258 	      RK3288_LVDS_CON_SELECT(lvds->format);
259 
260 	if (lvds->dual_channel) {
261 		u32 h_bp = mode->htotal - mode->hsync_start;
262 
263 		val |= RK3288_LVDS_CON_ENABLE_2(1) |
264 		       RK3288_LVDS_CON_ENABLE_1(1) |
265 		       RK3288_LVDS_CON_STARTSEL(lvds->data_swap);
266 
267 		if (h_bp % 2)
268 			val |= RK3288_LVDS_CON_STARTPHASE(1);
269 		else
270 			val |= RK3288_LVDS_CON_STARTPHASE(0);
271 	} else {
272 		val |= RK3288_LVDS_CON_ENABLE_2(0) |
273 		       RK3288_LVDS_CON_ENABLE_1(1);
274 	}
275 
276 	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, val);
277 
278 	rockchip_phy_set_bus_width(lvds->phy, lvds->dual_channel ? 2 : 1);
279 }
280 
281 static void rk3288_lvds_disable(struct rockchip_lvds *lvds)
282 {
283 	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, RK3288_LVDS_PWRDWN(1));
284 }
285 
286 static const struct rockchip_lvds_funcs rk3288_lvds_funcs = {
287 	.enable = rk3288_lvds_enable,
288 	.disable = rk3288_lvds_disable,
289 };
290 
291 static void rk3368_lvds_enable(struct rockchip_lvds *lvds, int pipe)
292 {
293 	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
294 		     RK3368_LVDS_SELECT(lvds->format) |
295 		     RK3368_LVDS_MODE_EN(1) | RK3368_LVDS_MSBSEL(1) |
296 		     RK3368_LVDS_P2S_EN(1));
297 }
298 
299 static void rk3368_lvds_disable(struct rockchip_lvds *lvds)
300 {
301 	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
302 		     RK3368_LVDS_MODE_EN(0) | RK3368_LVDS_P2S_EN(0));
303 }
304 
305 static const struct rockchip_lvds_funcs rk3368_lvds_funcs = {
306 	.enable = rk3368_lvds_enable,
307 	.disable = rk3368_lvds_disable,
308 };
309 
310 static void rk3568_lvds_enable(struct rockchip_lvds *lvds, int pipe)
311 {
312 	regmap_write(lvds->grf, RK3568_GRF_VO_CON2,
313 		     RK3568_LVDS0_MODE_EN(1) | RK3568_LVDS0_P2S_EN(1) |
314 		     RK3568_LVDS0_DCLK_INV_SEL(1));
315 	regmap_write(lvds->grf, RK3568_GRF_VO_CON0,
316 		     RK3568_LVDS0_SELECT(lvds->format) | RK3568_LVDS0_MSBSEL(1));
317 }
318 
319 static void rk3568_lvds_disable(struct rockchip_lvds *lvds)
320 {
321 	regmap_write(lvds->grf, RK3568_GRF_VO_CON2, RK3568_LVDS0_MODE_EN(0));
322 }
323 
324 static const struct rockchip_lvds_funcs rk3568_lvds_funcs = {
325 	.enable = rk3568_lvds_enable,
326 	.disable = rk3568_lvds_disable,
327 };
328 
329 static const struct udevice_id rockchip_lvds_ids[] = {
330 	{
331 		.compatible = "rockchip,px30-lvds",
332 		.data = (ulong)&px30_lvds_funcs,
333 	},
334 	{
335 		.compatible = "rockchip,rk3126-lvds",
336 		.data = (ulong)&rk3126_lvds_funcs,
337 	},
338 	{
339 		.compatible = "rockchip,rk3288-lvds",
340 		.data = (ulong)&rk3288_lvds_funcs,
341 	},
342 	{
343 		.compatible = "rockchip,rk3368-lvds",
344 		.data = (ulong)&rk3368_lvds_funcs,
345 	},
346 	{
347 		.compatible = "rockchip,rk3568-lvds",
348 		.data = (ulong)&rk3568_lvds_funcs,
349 	},
350 	{}
351 };
352 
353 U_BOOT_DRIVER(rockchip_lvds) = {
354 	.name = "rockchip_lvds",
355 	.id = UCLASS_DISPLAY,
356 	.of_match = rockchip_lvds_ids,
357 	.probe = rockchip_lvds_probe,
358 	.priv_auto_alloc_size = sizeof(struct rockchip_lvds),
359 };
360