1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0) 16 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1) 17 #define ROCKCHIP_OUTPUT_DATA_SWAP BIT(2) 18 19 enum data_format { 20 ROCKCHIP_FMT_ARGB8888 = 0, 21 ROCKCHIP_FMT_RGB888, 22 ROCKCHIP_FMT_RGB565, 23 ROCKCHIP_FMT_YUV420SP = 4, 24 ROCKCHIP_FMT_YUV422SP, 25 ROCKCHIP_FMT_YUV444SP, 26 }; 27 28 enum display_mode { 29 ROCKCHIP_DISPLAY_FULLSCREEN, 30 ROCKCHIP_DISPLAY_CENTER, 31 }; 32 33 enum rockchip_cmd_type { 34 CMD_TYPE_DEFAULT, 35 CMD_TYPE_SPI, 36 CMD_TYPE_MCU 37 }; 38 39 enum rockchip_mcu_cmd { 40 MCU_WRCMD = 0, 41 MCU_WRDATA, 42 MCU_SETBYPASS, 43 }; 44 45 /* 46 * display output interface supported by rockchip lcdc 47 */ 48 #define ROCKCHIP_OUT_MODE_P888 0 49 #define ROCKCHIP_OUT_MODE_BT1120 0 50 #define ROCKCHIP_OUT_MODE_P666 1 51 #define ROCKCHIP_OUT_MODE_P565 2 52 #define ROCKCHIP_OUT_MODE_BT656 5 53 #define ROCKCHIP_OUT_MODE_S888 8 54 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 55 #define ROCKCHIP_OUT_MODE_YUV420 14 56 /* for use special outface */ 57 #define ROCKCHIP_OUT_MODE_AAAA 15 58 59 #define VOP_OUTPUT_IF_RGB BIT(0) 60 #define VOP_OUTPUT_IF_BT1120 BIT(1) 61 #define VOP_OUTPUT_IF_BT656 BIT(2) 62 #define VOP_OUTPUT_IF_LVDS0 BIT(3) 63 #define VOP_OUTPUT_IF_LVDS1 BIT(4) 64 #define VOP_OUTPUT_IF_MIPI0 BIT(5) 65 #define VOP_OUTPUT_IF_MIPI1 BIT(6) 66 #define VOP_OUTPUT_IF_eDP0 BIT(7) 67 #define VOP_OUTPUT_IF_eDP1 BIT(8) 68 #define VOP_OUTPUT_IF_DP0 BIT(9) 69 #define VOP_OUTPUT_IF_DP1 BIT(10) 70 #define VOP_OUTPUT_IF_HDMI0 BIT(11) 71 #define VOP_OUTPUT_IF_HDMI1 BIT(12) 72 73 struct rockchip_mcu_timing { 74 int mcu_pix_total; 75 int mcu_cs_pst; 76 int mcu_cs_pend; 77 int mcu_rw_pst; 78 int mcu_rw_pend; 79 int mcu_hold_mode; 80 }; 81 82 struct vop_rect { 83 int width; 84 int height; 85 }; 86 87 struct crtc_state { 88 struct udevice *dev; 89 struct rockchip_crtc *crtc; 90 void *private; 91 ofnode node; 92 struct device_node *ports_node; /* if (ports_node) it's vop2; */ 93 int crtc_id; 94 95 int format; 96 u32 dma_addr; 97 int ymirror; 98 int rb_swap; 99 int xvir; 100 int src_x; 101 int src_y; 102 int src_w; 103 int src_h; 104 int crtc_x; 105 int crtc_y; 106 int crtc_w; 107 int crtc_h; 108 bool yuv_overlay; 109 struct rockchip_mcu_timing mcu_timing; 110 u32 dual_channel_swap; 111 u32 feature; 112 struct vop_rect max_output; 113 }; 114 115 struct panel_state { 116 struct rockchip_panel *panel; 117 118 ofnode dsp_lut_node; 119 }; 120 121 struct overscan { 122 int left_margin; 123 int right_margin; 124 int top_margin; 125 int bottom_margin; 126 }; 127 128 struct connector_state { 129 struct udevice *dev; 130 const struct rockchip_connector *connector; 131 struct rockchip_bridge *bridge; 132 struct rockchip_phy *phy; 133 ofnode node; 134 135 void *private; 136 137 struct drm_display_mode mode; 138 struct overscan overscan; 139 u8 edid[EDID_SIZE * 4]; 140 int bus_format; 141 int output_mode; 142 int type; 143 int output_if; 144 int output_flags; 145 int color_space; 146 unsigned int bpc; 147 148 struct base2_disp_info *disp_info; /* disp_info from baseparameter 2.0 */ 149 150 struct { 151 u32 *lut; 152 int size; 153 } gamma; 154 }; 155 156 struct logo_info { 157 int mode; 158 char *mem; 159 bool ymirror; 160 u32 offset; 161 u32 width; 162 int height; 163 u32 bpp; 164 }; 165 166 struct rockchip_logo_cache { 167 struct list_head head; 168 char name[20]; 169 struct logo_info logo; 170 }; 171 172 struct display_state { 173 struct list_head head; 174 175 const void *blob; 176 ofnode node; 177 178 struct crtc_state crtc_state; 179 struct connector_state conn_state; 180 struct panel_state panel_state; 181 182 char ulogo_name[30]; 183 char klogo_name[30]; 184 185 struct logo_info logo; 186 int logo_mode; 187 int charge_logo_mode; 188 void *mem_base; 189 int mem_size; 190 191 int enable; 192 int is_init; 193 int is_enable; 194 }; 195 196 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 197 { 198 struct panel_state *panel_state = &s->panel_state; 199 200 return panel_state->panel; 201 } 202 203 int drm_mode_vrefresh(const struct drm_display_mode *mode); 204 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 205 bool drm_mode_is_420(const struct drm_display_info *display, 206 struct drm_display_mode *mode); 207 struct base2_disp_info *rockchip_get_disp_info(int type, int id); 208 209 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 210 struct vop_rect *max_output); 211 unsigned long get_cubic_lut_buffer(int crtc_id); 212 213 #endif 214