1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0) 16 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1) 17 #define ROCKCHIP_OUTPUT_DATA_SWAP BIT(2) 18 19 enum data_format { 20 ROCKCHIP_FMT_ARGB8888 = 0, 21 ROCKCHIP_FMT_RGB888, 22 ROCKCHIP_FMT_RGB565, 23 ROCKCHIP_FMT_YUV420SP = 4, 24 ROCKCHIP_FMT_YUV422SP, 25 ROCKCHIP_FMT_YUV444SP, 26 }; 27 28 enum display_mode { 29 ROCKCHIP_DISPLAY_FULLSCREEN, 30 ROCKCHIP_DISPLAY_CENTER, 31 }; 32 33 enum rockchip_cmd_type { 34 CMD_TYPE_DEFAULT, 35 CMD_TYPE_SPI, 36 CMD_TYPE_MCU 37 }; 38 39 enum rockchip_mcu_cmd { 40 MCU_WRCMD = 0, 41 MCU_WRDATA, 42 MCU_SETBYPASS, 43 }; 44 45 /* 46 * display output interface supported by rockchip lcdc 47 */ 48 #define ROCKCHIP_OUT_MODE_P888 0 49 #define ROCKCHIP_OUT_MODE_P666 1 50 #define ROCKCHIP_OUT_MODE_P565 2 51 #define ROCKCHIP_OUT_MODE_S888 8 52 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 53 #define ROCKCHIP_OUT_MODE_YUV420 14 54 /* for use special outface */ 55 #define ROCKCHIP_OUT_MODE_AAAA 15 56 57 #define VOP_OUTPUT_IF_RGB BIT(0) 58 #define VOP_OUTPUT_IF_BT1120 BIT(1) 59 #define VOP_OUTPUT_IF_BT656 BIT(2) 60 #define VOP_OUTPUT_IF_LVDS0 BIT(3) 61 #define VOP_OUTPUT_IF_LVDS1 BIT(4) 62 #define VOP_OUTPUT_IF_MIPI0 BIT(5) 63 #define VOP_OUTPUT_IF_MIPI1 BIT(6) 64 #define VOP_OUTPUT_IF_eDP0 BIT(7) 65 #define VOP_OUTPUT_IF_eDP1 BIT(8) 66 #define VOP_OUTPUT_IF_DP0 BIT(9) 67 #define VOP_OUTPUT_IF_DP1 BIT(10) 68 #define VOP_OUTPUT_IF_HDMI0 BIT(11) 69 #define VOP_OUTPUT_IF_HDMI1 BIT(12) 70 71 struct rockchip_mcu_timing { 72 int mcu_pix_total; 73 int mcu_cs_pst; 74 int mcu_cs_pend; 75 int mcu_rw_pst; 76 int mcu_rw_pend; 77 int mcu_hold_mode; 78 }; 79 80 struct vop_rect { 81 int width; 82 int height; 83 }; 84 85 struct crtc_state { 86 struct udevice *dev; 87 struct rockchip_crtc *crtc; 88 void *private; 89 ofnode node; 90 struct device_node *ports_node; 91 int crtc_id; 92 93 int format; 94 u32 dma_addr; 95 int ymirror; 96 int rb_swap; 97 int xvir; 98 int src_x; 99 int src_y; 100 int src_w; 101 int src_h; 102 int crtc_x; 103 int crtc_y; 104 int crtc_w; 105 int crtc_h; 106 bool yuv_overlay; 107 struct rockchip_mcu_timing mcu_timing; 108 u32 dual_channel_swap; 109 struct vop_rect max_output; 110 }; 111 112 struct panel_state { 113 struct rockchip_panel *panel; 114 115 ofnode dsp_lut_node; 116 }; 117 118 struct overscan { 119 int left_margin; 120 int right_margin; 121 int top_margin; 122 int bottom_margin; 123 }; 124 125 struct connector_state { 126 struct udevice *dev; 127 const struct rockchip_connector *connector; 128 struct rockchip_bridge *bridge; 129 struct rockchip_phy *phy; 130 ofnode node; 131 132 void *private; 133 134 struct drm_display_mode mode; 135 struct overscan overscan; 136 u8 edid[EDID_SIZE * 4]; 137 int bus_format; 138 int output_mode; 139 int type; 140 int output_if; 141 int output_flags; 142 int color_space; 143 unsigned int bpc; 144 145 struct { 146 u32 *lut; 147 int size; 148 } gamma; 149 }; 150 151 struct logo_info { 152 int mode; 153 char *mem; 154 bool ymirror; 155 u32 offset; 156 u32 width; 157 int height; 158 u32 bpp; 159 }; 160 161 struct rockchip_logo_cache { 162 struct list_head head; 163 char name[20]; 164 struct logo_info logo; 165 }; 166 167 struct display_state { 168 struct list_head head; 169 170 const void *blob; 171 ofnode node; 172 173 struct crtc_state crtc_state; 174 struct connector_state conn_state; 175 struct panel_state panel_state; 176 177 char ulogo_name[30]; 178 char klogo_name[30]; 179 180 struct logo_info logo; 181 int logo_mode; 182 int charge_logo_mode; 183 void *mem_base; 184 int mem_size; 185 186 int enable; 187 int is_init; 188 int is_enable; 189 }; 190 191 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 192 { 193 struct panel_state *panel_state = &s->panel_state; 194 195 return panel_state->panel; 196 } 197 198 int drm_mode_vrefresh(const struct drm_display_mode *mode); 199 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 200 bool drm_mode_is_420(const struct drm_display_info *display, 201 struct drm_display_mode *mode); 202 203 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 204 struct vop_rect *max_output); 205 206 #endif 207