1 /* 2 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ROCKCHIP_DISPLAY_H 8 #define _ROCKCHIP_DISPLAY_H 9 10 #include <bmp_layout.h> 11 #include <drm_modes.h> 12 #include <edid.h> 13 #include <dm/ofnode.h> 14 15 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL BIT(0) 16 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK BIT(1) 17 18 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE BIT(0) 19 #define ROCKCHIP_OUTPUT_DUAL_CHANNEL_ODD_EVEN_MODE BIT(1) 20 #define ROCKCHIP_OUTPUT_DATA_SWAP BIT(2) 21 22 enum data_format { 23 ROCKCHIP_FMT_ARGB8888 = 0, 24 ROCKCHIP_FMT_RGB888, 25 ROCKCHIP_FMT_RGB565, 26 ROCKCHIP_FMT_YUV420SP = 4, 27 ROCKCHIP_FMT_YUV422SP, 28 ROCKCHIP_FMT_YUV444SP, 29 }; 30 31 enum display_mode { 32 ROCKCHIP_DISPLAY_FULLSCREEN, 33 ROCKCHIP_DISPLAY_CENTER, 34 }; 35 36 enum rockchip_cmd_type { 37 CMD_TYPE_DEFAULT, 38 CMD_TYPE_SPI, 39 CMD_TYPE_MCU 40 }; 41 42 enum rockchip_mcu_cmd { 43 MCU_WRCMD = 0, 44 MCU_WRDATA, 45 MCU_SETBYPASS, 46 }; 47 48 /* 49 * display output interface supported by rockchip lcdc 50 */ 51 #define ROCKCHIP_OUT_MODE_P888 0 52 #define ROCKCHIP_OUT_MODE_P666 1 53 #define ROCKCHIP_OUT_MODE_P565 2 54 #define ROCKCHIP_OUT_MODE_S888 8 55 #define ROCKCHIP_OUT_MODE_S888_DUMMY 12 56 #define ROCKCHIP_OUT_MODE_YUV420 14 57 /* for use special outface */ 58 #define ROCKCHIP_OUT_MODE_AAAA 15 59 60 #define VOP_OUTPUT_IF_RGB BIT(0) 61 #define VOP_OUTPUT_IF_BT1120 BIT(1) 62 #define VOP_OUTPUT_IF_BT656 BIT(2) 63 #define VOP_OUTPUT_IF_LVDS0 BIT(3) 64 #define VOP_OUTPUT_IF_LVDS1 BIT(4) 65 #define VOP_OUTPUT_IF_MIPI0 BIT(5) 66 #define VOP_OUTPUT_IF_MIPI1 BIT(6) 67 #define VOP_OUTPUT_IF_eDP0 BIT(7) 68 #define VOP_OUTPUT_IF_eDP1 BIT(8) 69 #define VOP_OUTPUT_IF_DP0 BIT(9) 70 #define VOP_OUTPUT_IF_DP1 BIT(10) 71 #define VOP_OUTPUT_IF_HDMI0 BIT(11) 72 #define VOP_OUTPUT_IF_HDMI1 BIT(12) 73 74 struct rockchip_mcu_timing { 75 int mcu_pix_total; 76 int mcu_cs_pst; 77 int mcu_cs_pend; 78 int mcu_rw_pst; 79 int mcu_rw_pend; 80 int mcu_hold_mode; 81 }; 82 83 struct vop_rect { 84 int width; 85 int height; 86 }; 87 88 struct crtc_state { 89 struct udevice *dev; 90 struct rockchip_crtc *crtc; 91 void *private; 92 ofnode node; 93 int crtc_id; 94 95 int format; 96 u32 dma_addr; 97 int ymirror; 98 int rb_swap; 99 int xvir; 100 int src_x; 101 int src_y; 102 int src_w; 103 int src_h; 104 int crtc_x; 105 int crtc_y; 106 int crtc_w; 107 int crtc_h; 108 bool yuv_overlay; 109 struct rockchip_mcu_timing mcu_timing; 110 u32 dual_channel_swap; 111 struct vop_rect max_output; 112 }; 113 114 struct panel_state { 115 struct rockchip_panel *panel; 116 117 ofnode dsp_lut_node; 118 }; 119 120 struct overscan { 121 int left_margin; 122 int right_margin; 123 int top_margin; 124 int bottom_margin; 125 }; 126 127 struct connector_state { 128 struct udevice *dev; 129 const struct rockchip_connector *connector; 130 struct rockchip_bridge *bridge; 131 struct rockchip_phy *phy; 132 ofnode node; 133 134 void *private; 135 136 struct drm_display_mode mode; 137 struct overscan overscan; 138 u8 edid[EDID_SIZE * 4]; 139 int bus_format; 140 int output_mode; 141 int type; 142 int output_type; 143 int output_if; 144 int output_flags; 145 int color_space; 146 unsigned int bpc; 147 148 struct { 149 u32 *lut; 150 int size; 151 } gamma; 152 }; 153 154 struct logo_info { 155 int mode; 156 char *mem; 157 bool ymirror; 158 u32 offset; 159 u32 width; 160 int height; 161 u32 bpp; 162 }; 163 164 struct rockchip_logo_cache { 165 struct list_head head; 166 char name[20]; 167 struct logo_info logo; 168 }; 169 170 struct display_state { 171 struct list_head head; 172 173 const void *blob; 174 ofnode node; 175 176 struct crtc_state crtc_state; 177 struct connector_state conn_state; 178 struct panel_state panel_state; 179 180 char ulogo_name[30]; 181 char klogo_name[30]; 182 183 struct logo_info logo; 184 int logo_mode; 185 int charge_logo_mode; 186 void *mem_base; 187 int mem_size; 188 189 int enable; 190 int is_init; 191 int is_enable; 192 }; 193 194 static inline struct rockchip_panel *state_get_panel(struct display_state *s) 195 { 196 struct panel_state *panel_state = &s->panel_state; 197 198 return panel_state->panel; 199 } 200 201 int drm_mode_vrefresh(const struct drm_display_mode *mode); 202 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val); 203 bool drm_mode_is_420(const struct drm_display_info *display, 204 struct drm_display_mode *mode); 205 206 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data, 207 struct vop_rect *max_output); 208 209 #endif 210